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/openbmc/linux/drivers/soc/rockchip/
H A Dio-domain.c1 // SPDX-License-Identifier: GPL-2.0-only
26 * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
28 * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
71 int (*write)(struct rockchip_iodomain_supply *supply, int uV);
79 int (*write)(struct rockchip_iodomain_supply *supply, int uV);
82 static int rk3568_iodomain_write(struct rockchip_iodomain_supply *supply, int uV) in rk3568_iodomain_write() argument
84 struct rockchip_iodomain *iod = supply->iod; in rk3568_iodomain_write()
89 switch (supply->idx) { in rk3568_iodomain_write()
93 b = supply->idx; in rk3568_iodomain_write()
95 b = supply->idx + 4; in rk3568_iodomain_write()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/power/
H A Drockchip-io-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
42 to report their voltage. The IO Voltage Domain for any non-specified
48 - rockchip,px30-io-voltage-domain
49 - rockchip,px30-pmu-io-voltage-domain
50 - rockchip,rk3188-io-voltage-domain
51 - rockchip,rk3228-io-voltage-domain
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_cyclone5_is1.dts1 // SPDX-License-Identifier: GPL-2.0+
10 compatible = "anonymous,socfpga-is1", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
28 regulator_3_3v: 3-3-v-regulator {
29 compatible = "regulator-fixed";
30 regulator-name = "3.3V";
31 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>;
36 u-boot,dm-pre-reloc;
42 phy-mode = "rgmii";
[all …]
H A Dimx6sx-sdb.dts9 #include "imx6sx-sdb.dtsi"
16 clock-frequency = <100000>;
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_i2c1>;
27 regulator-min-microvolt = <300000>;
28 regulator-max-microvolt = <1875000>;
29 regulator-boot-on;
30 regulator-always-on;
31 regulator-ramp-delay = <6250>;
35 regulator-min-microvolt = <800000>;
[all …]
H A Dsocfpga_cyclone5_socdk.dts1 // SPDX-License-Identifier: GPL-2.0+
10 compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
53 regulator_3_3v: 3-3-v-regulator {
54 compatible = "regulator-fixed";
55 regulator-name = "3.3V";
56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>;
67 phy-mode = "rgmii";
[all …]
H A Dstm32mp157c-ev1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
8 #include "stm32mp157c-ed1.dts"
12 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
17 pinctrl-names = "default";
18 pinctrl-0 = <&cec_pins_a>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&i2c2_pins_a>;
25 i2c-scl-rising-time-ns = <185>;
[all …]
H A Drk3288-miqi.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
14 ext_gmac: external-gmac-clock {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <125000000>;
18 clock-output-names = "ext_gmac";
21 io_domains: io-domains {
22 compatible = "rockchip,rk3288-io-voltage-domain";
25 audio-supply = <&vcca_33>;
26 flash0-supply = <&vcc_flash>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sx-sdb.dts1 // SPDX-License-Identifier: GPL-2.0
5 #include "imx6sx-sdb.dtsi"
12 clock-frequency = <100000>;
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_i2c1>;
23 regulator-min-microvolt = <300000>;
24 regulator-max-microvolt = <1875000>;
25 regulator-boot-on;
26 regulator-always-on;
27 regulator-ramp-delay = <6250>;
[all …]
H A Dimx6sx-sdb-reva.dts1 // SPDX-License-Identifier: GPL-2.0
5 #include "imx6sx-sdb.dtsi"
9 compatible = "fsl,imx6sx-sdb-reva", "fsl,imx6sx";
13 clock-frequency = <100000>;
14 pinctrl-names = "default";
15 pinctrl-0 = <&pinctrl_i2c1>;
24 regulator-min-microvolt = <300000>;
25 regulator-max-microvolt = <1875000>;
26 regulator-boot-on;
27 regulator-always-on;
[all …]
H A Dimx7-tqma7.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Device Tree Include file for TQ-Systems TQMa7x boards with full mounted PCB.
5 * Copyright (C) 2016 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
13 /* 512 MB - default configuration */
19 cpu-supply = <&sw1a_reg>;
24 qspi-reset-hog {
25 gpio-hog;
28 line-name = "qspi-reset";
33 pinctrl-names = "default";
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx93-tqma9352.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2022 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
11 model = "TQ-Systems i.MX93 TQMa93xxLA/TQMa93xxCA SOM";
12 compatible = "tq,imx93-tqma9352", "fsl,imx93";
14 reserved-memory {
15 #address-cells = <2>;
16 #size-cells = <2>;
20 compatible = "shared-dma-pool";
22 alloc-ranges = <0 0x80000000 0 0x40000000>;
[all …]
H A Dimx8mq-tqma8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2019-2021 TQ-Systems GmbH
9 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ";
10 compatible = "tq,imx8mq-tqma8mq", "fsl,imx8mq";
18 /* e-MMC IO, needed for HS modes */
19 reg_vcc1v8: regulator-vcc1v8 {
20 compatible = "regulator-fixed";
21 regulator-name = "TQMA8MX_VCC1V8";
22 regulator-min-microvolt = <1800000>;
23 regulator-max-microvolt = <1800000>;
[all …]
H A Dimx8mp-tqma8mpql.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
10 model = "TQ-Systems i.MX8MPlus TQMa8MPxL";
11 compatible = "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
19 reg_vcc3v3: regulator-vcc3v3 {
20 compatible = "regulator-fixed";
21 regulator-name = "VCC3V3";
22 regulator-min-microvolt = <3300000>;
23 regulator-max-microvolt = <3300000>;
[all …]
H A Dimx8mp-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
18 reg_wl_bt: regulator-wifi-bt {
19 compatible = "regulator-fixed";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_reg_wl_bt>;
22 regulator-name = "wl-bt-pow-dwn";
23 regulator-min-microvolt = <3300000>;
24 regulator-max-microvolt = <3300000>;
26 startup-delay-us = <70000>;
27 regulator-always-on;
[all …]
H A Dimx8mn-tqma8mqnl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
9 model = "TQ-Systems i.MX8MN TQMa8MxNL";
10 compatible = "tq,imx8mn-tqma8mqnl", "fsl,imx8mn";
18 /* e-MMC IO, needed for HS modes */
19 reg_vcc1v8: regulator-vcc1v8 {
20 compatible = "regulator-fixed";
21 regulator-name = "TQMA8MXNL_VCC1V8";
22 regulator-min-microvolt = <1800000>;
23 regulator-max-microvolt = <1800000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_cyclone5_sodia.dts1 // SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "macnica,sodia", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
30 compatible = "regulator-fixed";
31 regulator-name = "3.3V";
32 regulator-min-microvolt = <3300000>;
33 regulator-max-microvolt = <3300000>;
36 leds: gpio-leds {
[all …]
H A Dsocfpga_cyclone5_socdk.dts1 // SPDX-License-Identifier: GPL-2.0+
10 compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
32 led-hps0 {
37 led-hps1 {
42 led-hps2 {
47 led-hps3 {
54 compatible = "regulator-fixed";
55 regulator-name = "3.3V";
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-rock2-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/pwm/pwm.h>
12 emmc_pwrseq: emmc-pwrseq {
13 compatible = "mmc-pwrseq-emmc";
14 pinctrl-0 = <&emmc_reset>;
15 pinctrl-names = "default";
16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
[all …]
H A Drk3288-firefly-reload-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
16 ext_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <125000000>;
20 clock-output-names = "ext_gmac";
24 vcc_flash: flash-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc_flash";
[all …]
H A Drk3288-vmarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
12 compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
14 vccio_flash: vccio-flash-regulator {
15 compatible = "regulator-fixed";
16 regulator-name = "vccio_flash";
17 regulator-min-microvolt = <1800000>;
18 regulator-max-microvolt = <1800000>;
19 vin-supply = <&vcc_io>;
[all …]
H A Drk3288-miqi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <125000000>;
27 clock-output-names = "ext_gmac";
31 compatible = "gpio-leds";
[all …]
H A Drk3288-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Phytec phyCORE-RK3288 SoM
8 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
29 ext_gmac: external-gmac-clock {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <125000000>;
33 clock-output-names = "ext_gmac";
36 leds: user-leds {
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcor-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
8 #include "stm32mp15-pinctrl.dtsi"
9 #include "stm32mp15xxac-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/mfd/st,stpmic1.h>
23 reserved-memory {
24 #address-cells = <1>;
25 #size-cells = <1>;
29 compatible = "shared-dma-pool";
[all …]
H A Dstm32mp157c-ev1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
8 #include "stm32mp157c-ed1.dts"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/media/video-interfaces.h>
15 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
23 stdout-path = "serial0:115200n8";
27 clk_ext_camera: clk-ext-camera {
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368-lion.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
15 stdout-path = "serial0:115200n8";
18 ext_gmac: gmac-clk {
19 compatible = "fixed-clock";
20 clock-frequency = <125000000>;
21 clock-output-names = "ext_gmac";
22 #clock-cells = <0>;
26 compatible = "i2c-mux-gpio";
27 #address-cells = <1>;
[all …]

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