arm/dts/socfpga_cyclone5_is1.dts

1 // SPDX-License-Identifier: GPL-2.0+
10 	compatible = "anonymous,socfpga-is1", "altr,socfpga-cyclone5", "altr,socfpga";
14 		stdout-path = "serial0:115200n8";
28 	regulator_3_3v: 3-3-v-regulator {
29 		compatible = "regulator-fixed";
30 		regulator-name = "3.3V";
31 		regulator-min-microvolt = <3300000>;
32 		regulator-max-microvolt = <3300000>;
36 		u-boot,dm-pre-reloc;
42 	phy-mode = "rgmii";
44 	rxd0-skew-ps = <0>;
45 	rxd1-skew-ps = <0>;
46 	rxd2-skew-ps = <0>;
47 	rxd3-skew-ps = <0>;
48 	txen-skew-ps = <0>;
49 	txc-skew-ps = <2600>;
50 	rxdv-skew-ps = <0>;
51 	rxc-skew-ps = <2000>;
59 	bank-name = "porta";
79 	u-boot,dm-pre-reloc;
81 	cd-gpios = <&portb 18 0>;
82 	vmmc-supply = <&regulator_3_3v>;
83 	vqmmc-supply = <&regulator_3_3v>;
88 	u-boot,dm-pre-reloc;
90 	flash0: n25q00@0 {  label
91 		u-boot,dm-pre-reloc;
92 		#address-cells = <1>;
93 		#size-cells = <1>;
94 		compatible = "n25q00", "spi-flash";
96 		spi-max-frequency = <100000000>;
97 		m25p,fast-read;
98 		page-size = <256>;
99 		block-size = <16>; /* 2^16, 64KB */
100 		cdns,tshsl-ns = <50>;
101 		cdns,tsd2d-ns = <50>;
102 		cdns,tchsh-ns = <4>;
103 		cdns,tslch-ns = <4>;
112 	u-boot,dm-pre-reloc;