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/openbmc/linux/arch/arm/boot/dts/intel/axm/
H A Daxm5516-cpus.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/boot/dts/axm5516-cpus.dtsi
10 #address-cells = <1>;
11 #size-cells = <0>;
13 cpu-map {
74 compatible = "arm,cortex-a15";
76 clock-frequency = <1400000000>;
77 cpu-release-addr = <0>; // Fixed by the boot loader
82 compatible = "arm,cortex-a15";
84 clock-frequency = <1400000000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm11351.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2012-2013 Broadcom Corporation
4 #include <dt-bindings/clock/bcm281xx.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&gic>;
20 #address-cells = <1>;
21 #size-cells = <0>;
[all …]
H A Dbcm21664.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
4 #include <dt-bindings/clock/bcm21664.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&gic>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a9";
[all …]
H A Dbcm23550.dtsi34 #include <dt-bindings/clock/bcm21664.h>
35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/interrupt-controller/irq.h>
39 #address-cells = <1>;
40 #size-cells = <1>;
43 interrupt-parent = <&gic>;
46 #address-cells = <1>;
47 #size-cells = <0>;
51 compatible = "arm,cortex-a7";
53 clock-frequency = <1000000000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-clks.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 compatible = "fixed-clock";
10 #clock-cells = <0>;
11 clock-frequency = <100000000>;
12 clock-output-names = "adl3clk_100mhz";
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <375000000>;
19 clock-output-names = "ccpclk_375mhz";
23 compatible = "fixed-clock";
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp-clk.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2015 - 2018, Xilinx, Inc.
12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <100000000>;
15 u-boot,dm-pre-reloc;
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <125000000>;
25 compatible = "fixed-clock";
[all …]
H A Dtegra30-beaver.dts1 /dts-v1/;
10 stdout-path = &uarta;
31 pcie-controller@00003000 {
34 avdd-pexa-supply = <&ldo1_reg>;
35 vdd-pexa-supply = <&ldo1_reg>;
36 avdd-pexb-supply = <&ldo1_reg>;
37 vdd-pexb-supply = <&ldo1_reg>;
38 avdd-pex-pll-supply = <&ldo1_reg>;
39 avdd-plle-supply = <&ldo1_reg>;
40 vddio-pex-ctl-supply = <&sys_3v3_reg>;
[all …]
H A Dtegra30-cardhu.dts1 /dts-v1/;
10 stdout-path = &uarta;
30 pcie-controller@00003000 {
34 avdd-pexb-supply = <&ldo1_reg>;
35 vdd-pexb-supply = <&ldo1_reg>;
36 avdd-pex-pll-supply = <&ldo1_reg>;
37 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
38 vddio-pex-ctl-supply = <&sys_3v3_reg>;
39 avdd-plle-supply = <&ldo2_reg>;
42 nvidia,num-lanes = <4>;
[all …]
H A Dsalvator-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for common parts of Salvator-X board variants
5 * Copyright (C) 2015-2016 Renesas Electronics Corp.
9 * SSI-AK4613
31 #include <dt-bindings/gpio/gpio.h>
42 stdout-path = "serial0:115200n8";
45 audio_clkout: audio-clkout {
48 * but needed to avoid cs2000/rcar_sound probe dead-lock
50 compatible = "fixed-clock";
51 #clock-cells = <0>;
[all …]
H A Dtegra124-cei-tk1-som.dts1 /dts-v1/;
6 model = "Colorado Engineering TK1-SOM";
7 compatible = "nvidia,cei-tk1-som", "nvidia,tegra124";
10 stdout-path = &uartd;
32 pcie-controller@01003000 {
35 avddio-pex-supply = <&vdd_1v05_run>;
36 dvddio-pex-supply = <&vdd_1v05_run>;
37 avdd-pex-pll-supply = <&vdd_1v05_run>;
38 hvdd-pex-supply = <&vdd_3v3_lp0>;
39 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
[all …]
H A Dtegra124-jetson-tk1.dts1 /dts-v1/;
7 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
10 stdout-path = &uartd;
32 pcie-controller@01003000 {
35 avddio-pex-supply = <&vdd_1v05_run>;
36 dvddio-pex-supply = <&vdd_1v05_run>;
37 avdd-pex-pll-supply = <&vdd_1v05_run>;
38 hvdd-pex-supply = <&vdd_3v3_lp0>;
39 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
40 vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-clocks.dtsi4 * Copyright (c) 2013-2014 ARM Ltd
10 /* SoC fixed clocks */
12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <7372800>;
15 clock-output-names = "juno:uartclk";
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <48000000>;
22 clock-output-names = "clk48mhz";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dnuvoton,npcm750-clk.txt8 There are six fixed clocks that are generated outside the BMC. All clocks are of
9 a known fixed value that cannot be changed. clk_refclk, clk_mcbypck and
17 dt-bindings/clock/nuvoton,npcm7xx-clock.h
22 - compatible: "nuvoton,npcm750-clk" : for clock controller of Nuvoton
25 - reg: physical base address of the clock controller and length of
28 - #clock-cells: should be 1.
32 clk: clock-controller@f0801000 {
33 compatible = "nuvoton,npcm750-clk";
34 #clock-cells = <1>;
36 clock-names = "refclk", "sysbypck", "mcbypck";
[all …]
H A Dfixed-clock.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple fixed-rate clock sources
10 - Michael Turquette <mturquette@baylibre.com>
11 - Stephen Boyd <sboyd@kernel.org>
15 const: fixed-clock
17 "#clock-cells":
20 clock-frequency: true
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of
25 [2] include/dt-bindings/pinctrl/lochnagar.h
26 [3] include/dt-bindings/clock/lochnagar.h
28 And these documents for the required sub-node binding details:
35 - if:
39 - cirrus,lochnagar2
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Ddm814x-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
10 #clock-cells = <1>;
11 compatible = "ti,dm814-adpll-s-clock";
14 clock-names = "clkinp", "clkinpulow", "clkinphif";
15 clock-output-names = "481c5040.adpll.dcoclkldo",
22 #clock-cells = <1>;
23 compatible = "ti,dm814-adpll-lj-clock";
26 clock-names = "clkinp", "clkinpulow";
27 clock-output-names = "481c5080.adpll.dcoclkldo",
33 #clock-cells = <1>;
[all …]
/openbmc/linux/arch/arc/boot/dts/
H A Dhsdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/reset/snps,hsdk-reset.h>
18 #address-cells = <2>;
19 #size-cells = <2>;
22 … "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
30 #address-cells = <1>;
31 #size-cells = <0>;
62 input_clk: input-clk {
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dhihope-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/gpio/gpio.h>
30 stdout-path = "serial0:115200n8";
33 hdmi0-out {
34 compatible = "hdmi-connector";
39 remote-endpoint = <&rcar_dw_hdmi0_out>;
45 compatible = "gpio-leds";
64 reg_1p8v: regulator-1p8v {
65 compatible = "regulator-fixed";
66 regulator-name = "fixed-1.8V";
[all …]
H A Dr8a779a0-falcon-cpu.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
16 compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
30 stdout-path = "serial0:115200n8";
34 compatible = "gpio-keys";
36 pinctrl-0 = <&keys_pins>;
37 pinctrl-names = "default";
39 key-1 {
[all …]
H A Dr8a779f0-spider-cpu.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
15 compatible = "renesas,spider-cpu", "renesas,r8a779f0";
24 stdout-path = "serial0:1843200n8";
28 compatible = "gpio-leds";
30 led-7 {
34 function-enumerator = <7>;
37 led-8 {
41 function-enumerator = <8>;
[all …]
H A Dulcb.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car Gen3 ULCB board
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
13 model = "Renesas R-Car Gen3 ULCB board";
32 stdout-path = "serial0:115200n8";
35 audio_clkout: audio-clkout {
38 * but needed to avoid cs2000/rcar_sound probe dead-lock
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5260-xyref5260.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
27 stdout-path = "serial2:115200n8";
31 compatible = "fixed-clock";
32 clock-frequency = <24000000>;
33 clock-output-names = "fin_pll";
34 #clock-cells = <0>;
37 ioclk_pcm: clock-pcm-ext {
38 compatible = "fixed-clock";
39 clock-frequency = <2048000>;
[all …]
/openbmc/linux/arch/nios2/boot/dts/
H A D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
10 compatible = "altr,niosii-max10";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "altr,nios2-1.1";
22 interrupt-controller;
23 #interrupt-cells = <1>;
[all …]
/openbmc/u-boot/arch/nios2/dts/
H A D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
12 compatible = "altr,niosii-max10";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 u-boot,dm-pre-reloc;
23 compatible = "altr,nios2-1.1";
25 interrupt-controller;
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-puma-haikou.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3399-puma.dtsi"
10 model = "Theobroma Systems RK3399-Q7 SoM";
11 compatible = "tsd,rk3399-puma-haikou", "rockchip,rk3399";
18 stdout-path = "serial0:115200n8";
22 pinctrl-0 = <&module_led_pin>, <&sd_card_led_pin>;
24 sd_card_led: led-1 {
27 linux,default-trigger = "mmc0";
31 i2s0-sound {
[all …]

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