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/openbmc/linux/drivers/media/platform/renesas/
H A Drcar_fdp1.c57 #define dprintk(fdp1, fmt, arg...) \ argument
58 v4l2_dbg(1, debug, &fdp1->v4l2_dev, "%s: " fmt, __func__, ## arg)
61 * FDP1 registers and bits
64 /* FDP1 start register - Imm */
271 * struct fdp1_fmt - The FDP1 internal format data
277 * @fmt: 7-bit format code for the fdp1 hardware
412 * FDP1 Lookup tables range from 0...255 only
516 * FDP1 operates on potentially 3 fields, which are tracked
581 struct fdp1_dev *fdp1; member
652 static struct fdp1_job *list_remove_job(struct fdp1_dev *fdp1, in list_remove_job() argument
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Drenesas,fdp1.yaml4 $id: http://devicetree.org/schemas/media/renesas,fdp1.yaml#
7 title: Renesas R-Car Fine Display Processor (FDP1)
13 The FDP1 is a de-interlacing module which converts interlaced video to
21 - renesas,fdp1
41 A phandle referencing the FCP that handles memory accesses for the FDP1.
60 fdp1@fe940000 {
61 compatible = "renesas,fdp1";
/openbmc/linux/Documentation/admin-guide/media/
H A Drcar-fdp1.rst3 Renesas R-Car Fine Display Processor (FDP1) Driver
6 The R-Car FDP1 driver implements driver-specific controls as follows.
9 The video deinterlacing mode (such as Bob, Weave, ...). The R-Car FDP1
H A Dv4l-drivers.rst24 rcar-fdp1
/openbmc/linux/drivers/clk/renesas/
H A Dr8a7742-cpg-mssr.c91 DEF_MOD("fdp1-2", 117, R8A7742_CLK_ZS),
92 DEF_MOD("fdp1-1", 118, R8A7742_CLK_ZS),
93 DEF_MOD("fdp1-0", 119, R8A7742_CLK_ZS),
H A Dr8a7790-cpg-mssr.c102 DEF_MOD("fdp1-2", 117, R8A7790_CLK_ZS),
103 DEF_MOD("fdp1-1", 118, R8A7790_CLK_ZS),
104 DEF_MOD("fdp1-0", 119, R8A7790_CLK_ZS),
H A Dr8a7743-cpg-mssr.c87 DEF_MOD("fdp1-1", 118, R8A7743_CLK_ZS),
88 DEF_MOD("fdp1-0", 119, R8A7743_CLK_ZS),
H A Dr8a7791-cpg-mssr.c97 DEF_MOD("fdp1-1", 118, R8A7791_CLK_ZS),
98 DEF_MOD("fdp1-0", 119, R8A7791_CLK_ZS),
H A Dr8a774e1-cpg-mssr.c129 DEF_MOD("fdp1-1", 118, R8A774E1_CLK_S0D1),
130 DEF_MOD("fdp1-0", 119, R8A774E1_CLK_S0D1),
H A Dr8a7795-cpg-mssr.c133 DEF_MOD("fdp1-1", 118, R8A7795_CLK_S0D1),
134 DEF_MOD("fdp1-0", 119, R8A7795_CLK_S0D1),
H A Dr8a77470-cpg-mssr.c83 DEF_MOD("fdp1-0", 119, R8A77470_CLK_ZS),
H A Dr8a7745-cpg-mssr.c87 DEF_MOD("fdp1-0", 119, R8A7745_CLK_ZS),
H A Dr8a7794-cpg-mssr.c94 DEF_MOD("fdp1-0", 119, R8A7794_CLK_ZS),
H A Dr8a774b1-cpg-mssr.c130 DEF_MOD("fdp1-0", 119, R8A774B1_CLK_S0D1),
H A Dr8a774a1-cpg-mssr.c133 DEF_MOD("fdp1-0", 119, R8A774A1_CLK_S0D1),
/openbmc/u-boot/drivers/clk/renesas/
H A Dr8a7790-cpg-mssr.c104 DEF_MOD("fdp1-2", 117, R8A7790_CLK_ZS),
105 DEF_MOD("fdp1-1", 118, R8A7790_CLK_ZS),
106 DEF_MOD("fdp1-0", 119, R8A7790_CLK_ZS),
H A Dr8a7795-cpg-mssr.c112 DEF_MOD("fdp1-2", 117, R8A7795_CLK_S2D1), /* ES1.x */
113 DEF_MOD("fdp1-1", 118, R8A7795_CLK_S0D1),
114 DEF_MOD("fdp1-0", 119, R8A7795_CLK_S0D1),
H A Dr8a7791-cpg-mssr.c97 DEF_MOD("fdp1-1", 118, R8A7791_CLK_ZS),
98 DEF_MOD("fdp1-0", 119, R8A7791_CLK_ZS),
H A Dr8a7794-cpg-mssr.c96 DEF_MOD("fdp1-0", 119, R8A7794_CLK_ZS),
/openbmc/u-boot/arch/arm/dts/
H A Dr8a7790.dtsi1673 fdp1@fe940000 {
1674 compatible = "renesas,fdp1";
1682 fdp1@fe944000 {
1683 compatible = "renesas,fdp1";
1691 fdp1@fe948000 {
1692 compatible = "renesas,fdp1";
H A Dr8a7793.dtsi1318 fdp1@fe940000 {
1319 compatible = "renesas,fdp1";
1327 fdp1@fe944000 {
1328 compatible = "renesas,fdp1";
H A Dr8a7791.dtsi1648 fdp1@fe940000 {
1649 compatible = "renesas,fdp1";
1657 fdp1@fe944000 {
1658 compatible = "renesas,fdp1";
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr8a7790.dtsi1766 fdp1@fe940000 {
1767 compatible = "renesas,fdp1";
1775 fdp1@fe944000 {
1776 compatible = "renesas,fdp1";
1784 fdp1@fe948000 {
1785 compatible = "renesas,fdp1";
H A Dr8a7793.dtsi1323 fdp1@fe940000 {
1324 compatible = "renesas,fdp1";
1332 fdp1@fe944000 {
1333 compatible = "renesas,fdp1";
H A Dr8a7791.dtsi1735 fdp1@fe940000 {
1736 compatible = "renesas,fdp1";
1744 fdp1@fe944000 {
1745 compatible = "renesas,fdp1";

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