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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos7885-clock.yaml4 $id: http://devicetree.org/schemas/clock/samsung,exynos7885-clock.yaml#
7 title: Samsung Exynos7885 SoC clock controller
17 Exynos7885 clock controller is comprised of several CMU units, generating
29 'dt-bindings/clock/exynos7885.h' header.
34 - samsung,exynos7885-cmu-top
35 - samsung,exynos7885-cmu-core
36 - samsung,exynos7885-cmu-fsys
37 - samsung,exynos7885-cmu-peri
58 const: samsung,exynos7885-cmu-top
74 const: samsung,exynos7885-cmu-core
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/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7885.dtsi3 * Samsung Exynos7885 SoC device tree source
9 #include <dt-bindings/clock/exynos7885.h>
13 compatible = "samsung,exynos7885";
193 compatible = "samsung,exynos7885-cmu-peri";
220 compatible = "samsung,exynos7885-cmu-core";
235 compatible = "samsung,exynos7885-cmu-top";
244 compatible = "samsung,exynos7885-cmu-fsys";
263 compatible = "samsung,exynos7885-pinctrl";
274 compatible = "samsung,exynos7885-pinctrl";
280 compatible = "samsung,exynos7885-pinctrl";
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H A Dexynos7885-jackpotlte.dts10 #include "exynos7885.dtsi"
17 compatible = "samsung,jackpotlte", "samsung,exynos7885";
H A DMakefile6 exynos7885-jackpotlte.dtb \
H A Dexynos-pinctrl.h25 * Drive strengths for Exynos5410, Exynos542x, Exynos5800, Exynos7885, Exynos850
H A Dexynos7885-pinctrl.dtsi3 * Samsung Exynos7885 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7885 SoC pin-mux and pin-config options are listed as
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos7885.c6 * Common Clock Framework support for Exynos7885 SoC.
14 #include <dt-bindings/clock/exynos7885.h>
353 CLK_OF_DECLARE(exynos7885_cmu_top, "samsung,exynos7885-cmu-top",
573 CLK_OF_DECLARE(exynos7885_cmu_peri, "samsung,exynos7885-cmu-peri",
773 .compatible = "samsung,exynos7885-cmu-core",
776 .compatible = "samsung,exynos7885-cmu-fsys",
784 .name = "exynos7885-cmu",
H A Dclk-exynos-arm64.h9 * such as Exynos7885 or Exynos850 to register and init CMUs.
H A DMakefile21 obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7885.o
H A Dclk-exynos-arm64.c9 * such as Exynos7885 or Exynos850 to register and init CMUs.
/openbmc/linux/Documentation/devicetree/bindings/arm/samsung/
H A Dsamsung-boards.yaml215 - description: Exynos7885 based boards
219 - const: samsung,exynos7885
/openbmc/linux/include/dt-bindings/clock/
H A Dexynos7885.h5 * Device Tree binding constants for Exynos7885 clock controller.
/openbmc/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos-arm64.c444 /* pin banks of exynos7885 pin-controller 0 (ALIVE) */
454 /* pin banks of exynos7885 pin-controller 1 (DISPAUD) */
461 /* pin banks of exynos7885 pin-controller 2 (FSYS) */
469 /* pin banks of exynos7885 pin-controller 3 (TOP) */
H A Dpinctrl-samsung.c1314 { .compatible = "samsung,exynos7885-pinctrl",
/openbmc/linux/drivers/soc/samsung/
H A Dexynos-chipid.c59 { "EXYNOS7885", 0xE7885000 },
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dsamsung,pinctrl.yaml53 - samsung,exynos7885-pinctrl
/openbmc/linux/
H A Dopengrok2.0.log[all...]
H A Dopengrok0.0.log402 2024-12-28 20:09:06.039-0600 FINEST t1151 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/clk/samsung/clk-exynos7885.c.gz'
5089 2024-12-28 20:09:06.915-0600 FINEST t1099 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/include/dt-bindings/clock/exynos7885.h.gz'
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H A Dopengrok1.0.log[all...]