Searched +full:exynos7 +full:- +full:clock +full:- +full:top1 (Results 1 – 3 of 3) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | samsung,exynos7-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/samsung,exynos7-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos7 SoC clock controller 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 - Tomasz Figa <tomasz.figa@gmail.com> 16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching [all …]
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/openbmc/linux/arch/arm64/boot/dts/exynos/ |
H A D | exynos7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung Exynos7 SoC device tree source 9 #include <dt-bindings/clock/exynos7-clk.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 compatible = "samsung,exynos7"; 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 31 arm-pmu { 32 compatible = "arm,cortex-a57-pmu"; [all …]
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/openbmc/linux/drivers/clk/samsung/ |
H A D | clk-exynos7.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <linux/clk-provider.h> 11 #include <dt-bindings/clock/exynos7-clk.h> 207 CLK_OF_DECLARE(exynos7_clk_topc, "samsung,exynos7-clock-topc", 399 CLK_OF_DECLARE(exynos7_clk_top0, "samsung,exynos7-clock-top0", 541 * This clock is required for the CMU_FSYS1 registers access, keep it 581 CLK_OF_DECLARE(exynos7_clk_top1, "samsung,exynos7-clock-top1", 626 CLK_OF_DECLARE(exynos7_clk_ccore, "samsung,exynos7-clock-ccore", 700 CLK_OF_DECLARE(exynos7_clk_peric0, "samsung,exynos7-clock-peric0", 817 CLK_OF_DECLARE(exynos7_clk_peric1, "samsung,exynos7-clock-peric1", [all …]
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