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/openbmc/linux/drivers/clk/sprd/
H A Dums512-clk.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/sprd,ums512-clk.h>
33 static CLK_FIXED_FACTOR_FW_NAME(clk_26m_aud, "clk-26m-aud", "ext-26m", 1, 1, 0);
34 static CLK_FIXED_FACTOR_FW_NAME(clk_13m, "clk-13m", "ext-26m", 2, 1, 0);
35 static CLK_FIXED_FACTOR_FW_NAME(clk_6m5, "clk-6m5", "ext-26m", 4, 1, 0);
36 static CLK_FIXED_FACTOR_FW_NAME(clk_4m3, "clk-4m3", "ext-26m", 6, 1, 0);
37 static CLK_FIXED_FACTOR_FW_NAME(clk_2m, "clk-2m", "ext-26m", 13, 1, 0);
38 static CLK_FIXED_FACTOR_FW_NAME(clk_1m, "clk-1m", "ext-26m", 26, 1, 0);
39 static CLK_FIXED_FACTOR_FW_NAME(clk_250k, "clk-250k", "ext-26m", 104, 1, 0);
[all …]
H A Dsc9863a-clk.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/sprd,sc9863a-clk.h>
26 static SPRD_PLL_SC_GATE_CLK_FW_NAME(mpll0_gate, "mpll0-gate", "ext-26m", 0x94,
28 static SPRD_PLL_SC_GATE_CLK_FW_NAME(dpll0_gate, "dpll0-gate", "ext-26m", 0x98,
30 static SPRD_PLL_SC_GATE_CLK_FW_NAME(lpll_gate, "lpll-gate", "ext-26m", 0x9c,
32 static SPRD_PLL_SC_GATE_CLK_FW_NAME(gpll_gate, "gpll-gate", "ext-26m", 0xa8,
34 static SPRD_PLL_SC_GATE_CLK_FW_NAME(dpll1_gate, "dpll1-gate", "ext-26m", 0x1dc,
36 static SPRD_PLL_SC_GATE_CLK_FW_NAME(mpll1_gate, "mpll1-gate", "ext-26m", 0x1e0,
38 static SPRD_PLL_SC_GATE_CLK_FW_NAME(mpll2_gate, "mpll2-gate", "ext-26m", 0x1e4,
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H A Dsc9860-clk.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/sprd,sc9860-clk.h>
25 static CLK_FIXED_FACTOR(fac_4m, "fac-4m", "ext-26m",
27 static CLK_FIXED_FACTOR(fac_2m, "fac-2m", "ext-26m",
29 static CLK_FIXED_FACTOR(fac_1m, "fac-1m", "ext-26m",
30 26, 1, 0);
31 static CLK_FIXED_FACTOR(fac_250k, "fac-250k", "ext-26m",
33 static CLK_FIXED_FACTOR(fac_rpll0_26m, "rpll0-26m", "ext-26m",
35 static CLK_FIXED_FACTOR(fac_rpll1_26m, "rpll1-26m", "ext-26m",
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/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dsharkl3.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
14 compatible = "simple-bus";
15 #address-cells = <2>;
16 #size-cells = <2>;
20 compatible = "sprd,sc9863a-glbregs", "syscon",
21 "simple-mfd";
23 #address-cells = <1>;
[all …]
H A Dums512.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/sprd,ums512-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <2>;
18 #size-cells = <0>;
20 cpu-map {
51 compatible = "arm,cortex-a55";
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H A Dsc9863a.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/clock/sprd,sc9863a-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #address-cells = <2>;
15 #size-cells = <0>;
17 cpu-map {
48 compatible = "arm,cortex-a55";
50 enable-method = "psci";
51 cpu-idle-states = <&CORE_PD>;
56 compatible = "arm,cortex-a55";
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H A Dwhale2.dtsi6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/clock/sprd,sc9860-clk.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "simple-bus";
18 #address-cells = <2>;
19 #size-cells = <2>;
67 ap-apb {
68 compatible = "simple-bus";
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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsprd,ums512-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/clock/sprd,ums512-clk.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Orson Zhai <orsonzhai@gmail.com>
12 - Baolin Wang <baolin.wang7@gmail.com>
13 - Chunyan Zhang <zhang.lyra@gmail.com>
18 - sprd,ums512-apahb-gate
19 - sprd,ums512-ap-clk
20 - sprd,ums512-aonapb-clk
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H A Dsprd,sc9863a-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Orson Zhai <orsonzhai@gmail.com>
12 - Baolin Wang <baolin.wang7@gmail.com>
13 - Chunyan Zhang <zhang.lyra@gmail.com>
16 "#clock-cells":
21 - sprd,sc9863a-ap-clk
22 - sprd,sc9863a-aon-clk
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/openbmc/linux/arch/riscv/include/asm/
H A Dhwcap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <asm/alternative-macros.h>
16 #define RISCV_ISA_EXT_a ('a' - 'a')
17 #define RISCV_ISA_EXT_b ('b' - 'a')
18 #define RISCV_ISA_EXT_c ('c' - 'a')
19 #define RISCV_ISA_EXT_d ('d' - 'a')
20 #define RISCV_ISA_EXT_f ('f' - 'a')
21 #define RISCV_ISA_EXT_h ('h' - 'a')
22 #define RISCV_ISA_EXT_i ('i' - 'a')
23 #define RISCV_ISA_EXT_j ('j' - 'a')
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/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/
H A D0016-Platform-corstone1000-Fix-isolation-L2-memory-protection.patch11 so that the App RoT sub-region overlapping S_DATA has a higher region
12 number and so takes priority in the operation of the Armv6-M MPU.
14 Signed-off-by: Jamie Fox <jamie.fox@arm.com>
15 Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/30951]
16 ---
17 .../arm/corstone1000/tfm_hal_isolation.c | 43 +++++++++----------
18 1 file changed, 21 insertions(+), 22 deletions(-)
20 diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c b/platform/ext/target/arm/cor…
22 --- a/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c
23 +++ b/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c
[all …]
H A D0001-Platform-Corstone1000-Align-capsule-UEFI-structs.patch3 Date: Thu, 26 Oct 2023 11:46:04 +0100
6 The UEFI capsules are generated using the U-Boot mkeficapsule tool.
7 U-Boot uses packed struct for the UEFI and FMP structures, see [1].
8 The structs have to be aligned in the TF-M side parser to avoid
11 [1] https://github.com/u-boot/u-boot/blob/u-boot-2023.07.y/include/efi_api.h#L245
13 Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
14 Signed-off-by: Bence Balogh <bence.balogh@arm.com>
15 Upstream-Status: Backport [6ac0d4ce58c1a957c5f086e8c32268fdfc3ea531]
16 ---
17 .../fw_update_agent/uefi_capsule_parser.c | 17 +++++++++--------
[all …]
H A D0007-Plaform-Corstone1000-Switch-to-metadata-v2.patch10 The TrustedFirmware-A v2.11 release supports only the metadata v2. The
11 structs in TF-M side had to be aligned to keep the compatibility.
13 Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
14 Signed-off-by: Bence Balogh <bence.balogh@arm.com>
15 Upstream-Status: Backport [c731d187fbe9fc1e10ad8ecfb3d04bb480bc86b6]
16 ---
17 .../corstone1000/fw_update_agent/fwu_agent.c | 86 +++++++++++++++----
18 1 file changed, 69 insertions(+), 17 deletions(-)
20 diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target…
22 --- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
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/openbmc/u-boot/include/faraday/
H A Dftsdmc021.h1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Po-Yu Chuang <ratbert@faraday-tech.com>
11 * FTSDMC021 - SDRAM Controller
18 unsigned int tp1; /* 0x00 - SDRAM Timing Parameter 1 */
19 unsigned int tp2; /* 0x04 - SDRAM Timing Parameter 2 */
20 unsigned int cr1; /* 0x08 - SDRAM Configuration Reg 1 */
21 unsigned int cr2; /* 0x0c - SDRAM Configuration Reg 2 */
22 unsigned int bank0_bsr; /* 0x10 - Ext. Bank Base/Size Reg 0 */
23 unsigned int bank1_bsr; /* 0x14 - Ext. Bank Base/Size Reg 1 */
24 unsigned int bank2_bsr; /* 0x18 - Ext. Bank Base/Size Reg 2 */
[all …]
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc10 * See the COPYING file in the top-level directory for details.
13 #include "../tcg-ldst.c.inc"
14 #include "../tcg-pool.c.inc"
17 /* We're going to re-use TCGType in setting of the SF bit, which controls
56 /* V8 - V15 are call-saved, and skipped. */
85 ptrdiff_t offset = target - src_rx;
87 if (offset == sextract64(offset, 0, 26)) {
90 *src_rw = deposit32(*src_rw, 0, 26, offset);
99 ptrdiff_t offset = target - src_rx;
111 ptrdiff_t offset = target - src_rx;
[all …]
/openbmc/linux/drivers/clk/ingenic/
H A Djz4760-cgu.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/ingenic,jz4760-cgu.h>
45 0x0, 0x1, -1, 0x2, -1, -1, -1, 0x3,
61 unsigned int m, n, od, m_max = (1 << pll_info->m_bits) - 1; in jz4760_cgu_calc_m_n_od() local
67 n = clamp_val(n, 2, 1 << pll_info->n_bits); in jz4760_cgu_calc_m_n_od()
72 for (m = m_max; m >= m_max && n >= 2; n--) { in jz4760_cgu_calc_m_n_od()
73 m = rate * n / parent_rate; in jz4760_cgu_calc_m_n_od()
74 od = m & 1; in jz4760_cgu_calc_m_n_od()
75 m <<= od; in jz4760_cgu_calc_m_n_od()
[all …]
H A Dx1000-cgu.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/ingenic,x1000-cgu.h>
53 #define USBPCR1_REFCLKSEL_SHIFT 26
70 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_recalc_rate()
119 return -EINVAL; in x1000_otg_phy_set_rate()
122 spin_lock_irqsave(&cgu->lock, flags); in x1000_otg_phy_set_rate()
124 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_set_rate()
127 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_set_rate()
129 spin_unlock_irqrestore(&cgu->lock, flags); in x1000_otg_phy_set_rate()
[all …]
/openbmc/linux/drivers/media/i2c/
H A Dmt9t112.c1 // SPDX-License-Identifier: GPL-2.0
14 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
20 * v4l-utils compliance tools will report errors.
30 #include <linux/v4l2-mediabus.h>
34 #include <media/v4l2-common.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-subdev.h>
158 msg[0].addr = client->addr; in __mt9t112_reg_read()
163 msg[1].addr = client->addr; in __mt9t112_reg_read()
172 ret = i2c_transfer(client->adapter, msg, 2); in __mt9t112_reg_read()
[all …]
/openbmc/linux/drivers/mmc/core/
H A Dsd.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2003-2004 Russell King, All Rights Reserved.
7 * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
62 const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1; \
63 const int __off = 3 - ((start) / 32); \
69 __res |= resp[__off-1] << ((32 - __shft) % 32); \
86 u32 *resp = card->raw_cid; in mmc_decode_cid()
92 add_device_randomness(&card->raw_cid, sizeof(card->raw_cid)); in mmc_decode_cid()
98 card->cid.manfid = UNSTUFF_BITS(resp, 120, 8); in mmc_decode_cid()
99 card->cid.oemid = UNSTUFF_BITS(resp, 104, 16); in mmc_decode_cid()
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/openbmc/openbmc/poky/scripts/lib/wic/
H A Dhelp.py3 # SPDX-License-Identifier: GPL-2.0-only
35 pager.communicate(hlp.encode('utf-8'))
67 Dispatch to subcommand handler borrowed from combo-layer.
94 usage: wic [--version] | [--help] | [COMMAND [ARGS]]
102 overview wic overview - General overview of wic
103 plugins wic plugins - Overview and API
104 kickstart wic kickstart - wic kickstart reference
118 usage: wic create <wks file or image name> [-o <DIRNAME> | --outdir <DIRNAME>]
119 [-e | --image-name] [-s, --skip-build-check] [-D, --debug]
120 [-r, --rootfs-dir] [-b, --bootimg-dir]
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/openbmc/linux/drivers/net/wireless/intersil/orinoco/
H A Dwext.c13 #include <net/cfg80211-wext.h>
34 kfree_sensitive(priv->keys[index].key); in orinoco_set_key()
35 kfree_sensitive(priv->keys[index].seq); in orinoco_set_key()
38 priv->keys[index].key = kzalloc(key_len, GFP_ATOMIC); in orinoco_set_key()
39 if (!priv->keys[index].key) in orinoco_set_key()
42 priv->keys[index].key = NULL; in orinoco_set_key()
45 priv->keys[index].seq = kzalloc(seq_len, GFP_ATOMIC); in orinoco_set_key()
46 if (!priv->keys[index].seq) in orinoco_set_key()
49 priv->keys[index].seq = NULL; in orinoco_set_key()
51 priv->keys[index].key_len = key_len; in orinoco_set_key()
[all …]
/openbmc/u-boot/drivers/video/
H A Dmvebu_lcd.c1 // SPDX-License-Identifier: GPL-2.0+
113 for (i = 0; i < dram->num_cs; i++) { in mvebu_lcd_conf_mbus_registers()
114 const struct mbus_dram_window *cs = dram->cs + i; in mvebu_lcd_conf_mbus_registers()
115 writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) | in mvebu_lcd_conf_mbus_registers()
116 (dram->mbus_dram_target_id << 4) | 1, in mvebu_lcd_conf_mbus_registers()
119 writel(cs->base & 0xffff0000, regs + MVEBU_LCD_WIN_BASE(i)); in mvebu_lcd_conf_mbus_registers()
128 int x = lcd_info->x_res; in mvebu_lcd_register_init()
129 int y = lcd_info->y_res; in mvebu_lcd_register_init()
144 * end (currently 1GB-64MB but also may be 2GB-64MB). in mvebu_lcd_register_init()
147 writel(lcd_info->fb_base, regs + MVEBU_LCD_CFG_GRA_START_ADDR0); in mvebu_lcd_register_init()
[all …]
/openbmc/linux/arch/m68k/include/asm/
H A Dmath-emu.h1 /* SPDX-License-Identifier: GPL-2.0 */
27 /* quotient byte, assumes big-endian, of course */
33 #define FPSR_CC_Z 26
124 __count--; \
128 #define FPDATA ((struct fp_data *)current->thread.fp)
231 old_gas=-1
236 .irp m b,w,l
237 .macro getuser.\m src,dest,label,addr
238 getuser .\m,\src,\dest,\label,\addr
240 .macro putuser.\m src,dest,label,addr
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/openbmc/linux/net/netfilter/
H A Dnft_set_pipapo_avx2.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2019-2020 Red Hat GmbH
29 /* Load from memory into YMM register with non-temporal hint ("stream load"),
33 * - loading buckets from lookup tables, as they are not going to be used
36 * - loading the result bitmap from the previous field, as it's never used
40 asm volatile("vmovntdqa %0, %%ymm" #reg : : "m" (loc))
68 asm volatile("vmovdqa %%ymm" #reg ", %0" : "=m" (loc))
75 * nft_pipapo_avx2_prepare() - Prepare before main algorithm body
86 * nft_pipapo_avx2_fill() - Fill a bitmap region with ones
113 *data |= GENMASK(len - 1 + offset, offset); in nft_pipapo_avx2_fill()
[all …]
/openbmc/linux/arch/riscv/kernel/
H A Dcpufeature.c1 // SPDX-License-Identifier: GPL-2.0-only
27 #include "copy-unaligned.h"
29 #define NUM_ALPHA_EXTS ('z' - 'a' + 1)
33 #define MISALIGNED_COPY_SIZE ((MISALIGNED_BUFFER_SIZE / 2) - 0x80)
40 /* Per-cpu ISA extensions. */
47 * riscv_isa_extension_base() - Get base extension word
63 * __riscv_isa_extension_available() - Check whether given extension
88 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_isa_extension_check()
91 pr_err("Zicbom disabled as cbom-block-size present, but is not a power-of-2\n"); in riscv_isa_extension_check()
97 pr_err("Zicboz detected in ISA string, but no cboz-block-size found\n"); in riscv_isa_extension_check()
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