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/openbmc/linux/drivers/edac/
H A DKconfig13 tristate "EDAC (Error Detection And Correction) reporting"
16 EDAC is a subsystem along with hardware-specific drivers designed to
17 report hardware errors. These are low-level errors that are reported
22 The mailing list for the EDAC project is linux-edac@vger.kernel.org.
40 levels are 0-4 (from low to high) and by default it is set to 2.
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
49 occurring on your machine in human-readable form.
60 Not all machines support hardware-driven error report. Some of those
61 provide a BIOS-driven error report mechanism via ACPI, using the
62 APEI/GHES driver. By enabling this option, the error reports provided
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/openbmc/linux/include/uapi/linux/dvb/
H A Dfrontend.h1 /* SPDX-License-Identifier: LGPL-2.1+ WITH Linux-syscall-note */
18 * enum fe_caps - Frontend capabilities
23 * @FE_CAN_INVERSION_AUTO: Can auto-detect frequency spectral
33 * @FE_CAN_FEC_AUTO: Can auto-detect FEC
35 * @FE_CAN_QAM_16: Supports 16-QAM modulation
36 * @FE_CAN_QAM_32: Supports 32-QAM modulation
37 * @FE_CAN_QAM_64: Supports 64-QAM modulation
38 * @FE_CAN_QAM_128: Supports 128-QAM modulation
39 * @FE_CAN_QAM_256: Supports 256-QAM modulation
40 * @FE_CAN_QAM_AUTO: Can auto-detect QAM modulation
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/openbmc/linux/Documentation/driver-api/
H A Dmtdnand.rst10 The generic NAND driver supports almost all NAND and AG-AND based chips
31 --------------------------
37 - [MTD Interface]
43 - [NAND Interface]
48 - [GENERIC]
53 - [DEFAULT]
65 -------------------------------
71 - [INTERN]
77 - [REPLACEABLE]
86 - [BOARDSPECIFIC]
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/openbmc/linux/drivers/mtd/nand/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
23 This enables support for software Hamming error
24 correction. This correction can correct up to 1 bit error
27 more strength correction and in this case BCH or RS will be
44 This enables support for software BCH error correction. Binary BCH
47 of error correction.
H A Decc-sw-bch.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * This file provides ECC correction for more than 1 bit per block of data,
15 #include <linux/mtd/nand-ecc-sw-bch.h>
18 * nand_ecc_sw_bch_calculate - Calculate the ECC corresponding to a data block
26 struct nand_ecc_sw_bch_conf *engine_conf = nand->ecc.ctx.priv; in nand_ecc_sw_bch_calculate()
29 memset(code, 0, engine_conf->code_size); in nand_ecc_sw_bch_calculate()
30 bch_encode(engine_conf->bch, buf, nand->ecc.ctx.conf.step_size, code); in nand_ecc_sw_bch_calculate()
33 for (i = 0; i < engine_conf->code_size; i++) in nand_ecc_sw_bch_calculate()
34 code[i] ^= engine_conf->eccmask[i]; in nand_ecc_sw_bch_calculate()
41 * nand_ecc_sw_bch_correct - Detect, correct and report bit error(s)
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/openbmc/linux/drivers/mtd/nand/raw/ingenic/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
8 based boards, using the BCH controller for hardware error correction.
19 Enable this driver to support the Reed-Solomon error-correction
23 will be called jz4740-ecc.
29 Enable this driver to support the BCH error-correction hardware
33 will be called jz4725b-bch.
39 Enable this driver to support the BCH error-correction hardware
43 will be called jz4780-bch.
/openbmc/linux/Documentation/core-api/
H A Dlibrs.rst2 Reed-Solomon Library Programming Interface
10 The generic Reed-Solomon Library provides encoding, decoding and error
11 correction functions.
13 Reed-Solomon codes are used in communication and storage applications to
30 ------------
33 which holds the necessary information for encoding, decoding and error
34 correction with the given polynomial. It either uses an existing
54 --------
56 The encoder calculates the Reed-Solomon code over the given data length
60 The expanded data can be inverted on the fly by providing a non-zero
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/openbmc/linux/drivers/macintosh/
H A Dwindfarm_pm121.c1 // SPDX-License-Identifier: GPL-2.0-only
16 * that none of the code has been re-used, it's a complete
17 * re-implementation
21 * controls with a tiny difference. The control-ids of hard-drive-fan
22 * and cpu-fan is swapped.
24 * Target Correction :
26 * controls have a target correction calculated as :
31 * OD Fan control correction.
34 * offset : -19563152
38 * offset : -15650652
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/openbmc/linux/Documentation/devicetree/bindings/edac/
H A Daspeed-sdram-edac.txt3 The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error
4 correction check).
6 The memory controller supports SECDED (single bit error correction, double bit
7 error detection) and single bit error auto scrubbing by reserving 8 bits for
14 - compatible: should be one of
15 - "aspeed,ast2400-sdram-edac"
16 - "aspeed,ast2500-sdram-edac"
17 - "aspeed,ast2600-sdram-edac"
18 - reg: sdram controller register set should be <0x1e6e0000 0x174>
19 - interrupts: should be AVIC interrupt #0
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/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dnand_bch.c1 // SPDX-License-Identifier: GPL-2.0+
3 * This file provides ECC correction for more than 1 bit per block of data,
22 * struct nand_bch_control - private NAND BCH control structure
25 * @errloc: error location array
36 * nand_bch_calculate_ecc - [NAND Interface] Calculate ECC for data block
45 struct nand_bch_control *nbc = chip->ecc.priv; in nand_bch_calculate_ecc()
48 memset(code, 0, chip->ecc.bytes); in nand_bch_calculate_ecc()
49 encode_bch(nbc->bch, buf, chip->ecc.size, code); in nand_bch_calculate_ecc()
52 for (i = 0; i < chip->ecc.bytes; i++) in nand_bch_calculate_ecc()
53 code[i] ^= nbc->eccmask[i]; in nand_bch_calculate_ecc()
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H A DKconfig9 This option, if enabled, provides more flexible and linux-like
102 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
118 ELM controller is used for ECC error detection (not ECC calculation)
120 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
121 thus such SoC platforms need to depend on software library for ECC error
153 bool "24-error correction (45 ECC bytes)"
156 bool "32-error correction (60 ECC bytes)"
178 ---help---
256 This flag prevent U-boot reconfigure NAND flash controller and reuse
280 Number of bytes in the Out-Of-Band area for the NAND chip on
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/openbmc/linux/drivers/gpu/drm/sun4i/
H A Dsunxi_engine.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
17 * struct sunxi_engine_ops - helper operations for sunXi engines
39 * This callback allows to validate plane-update related CRTC
48 * 0 on success or a negative error code.
75 * error pointer on failure.
83 * This callback will enable the color correction in the
93 * This callback will stop the color correction in the
103 * This callback is used to implement engine-specific
126 * struct sunxi_engine - the common parts of an engine for sun4i-drm driver
130 * @id: the id of the engine (-1 if not used)
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/openbmc/u-boot/doc/
H A DREADME.AX251 AX25 is Andes CPU IP to adopt RISC-V architecture.
7 - 5-stage in-order execution pipeline
8 - Hardware Multiplier
9 - radix-2/radix-4/radix-16/radix-256/fast
10 - Hardware Divider
11 - Optional branch prediction
12 - Machine mode and optional user mode
13 - Optional performance monitoring
16 - RV64I base integer instructions
17 - RVC for 16-bit compressed instructions
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnuvoton,npcm-memory-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nuvoton,npcm-memory-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marvin Lin <kflin@nuvoton.com>
11 - Stanley Chu <yschu@nuvoton.com>
14 The Nuvoton BMC SoC supports DDR4 memory with or without ECC (error correction
17 The memory controller supports single bit error correction, double bit error
18 detection (in-line ECC in which a section (1/8th) of the memory device used to
26 - nuvoton,npcm750-memory-controller
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/openbmc/linux/lib/reed_solomon/
H A Dtest_rslib.c1 // SPDX-License-Identifier: GPL-2.0
34 __param(int, bc, 1, "Test for correct behaviour beyond error correction capacity");
80 uint16_t *corr; /* correction buffer */
103 kfree(ws->errlocs); in free_ws()
104 kfree(ws->c); in free_ws()
110 int nroots = rs->nroots; in alloc_ws()
112 int nn = rs->nn; in alloc_ws()
118 ws->c = kmalloc_array(2 * (nn + nroots), in alloc_ws()
120 if (!ws->c) in alloc_ws()
123 ws->r = ws->c + nn; in alloc_ws()
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/openbmc/linux/drivers/staging/media/omap4iss/
H A Diss_ipipeif.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * TI OMAP4 ISS V4L2 Driver - ISP IPIPEIF module
31 * struct iss_ipipeif_device - Structure for the IPIPEIF module to store its own
39 * @error: A hardware error occurred during capture
40 * @alaw: A-law compression enabled (1) or disabled (0)
42 * @obclamp: Optical-black clamp enabled (1) or disabled (0)
43 * @fpc_en: Faulty pixels correction enabled (1) or disabled (0)
45 * @clamp: Optical-black or digital clamp configuration
46 * @fpc: Faulty pixels correction configuration
67 unsigned int error; member
/openbmc/linux/Documentation/userspace-api/media/dvb/
H A Dfrontend-stat-properties.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _frontend-stat-properties:
32 - ``svalue`` or ``uvalue``, where ``svalue`` is for signed values of
36 - ``scale`` - Scale for the value. It can be:
38 - ``FE_SCALE_NOT_AVAILABLE`` - The parameter is supported by the
42 - ``FE_SCALE_DECIBEL`` - parameter is a signed value, measured in
45 - ``FE_SCALE_RELATIVE`` - parameter is a unsigned value, where 0
48 - ``FE_SCALE_COUNTER`` - parameter is a unsigned value that counts
49 the occurrence of an event, like bit error, block error, or lapsed
53 .. _DTV-STAT-SIGNAL-STRENGTH:
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H A Ddvb-frontend-parameters.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 per-system parameters. However, as newer delivery systems required more
24 DVB-S2, DVB-T2, DVB-C2, ISDB, etc.
30 .. code-block:: c
61 .. code-block:: c
65 fe_code_rate_t fec_inner; /* forward error correction (see above) */
77 .. code-block:: c
81 fe_code_rate_t fec_inner; /* forward error correction (see above) */
94 .. code-block:: c
106 DVB-T frontends are supported by the ``dvb_ofdm_parameters`` structure:
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/openbmc/linux/Documentation/admin-guide/
H A Dras.rst33 -------------
44 * Memory – add error correction logic (ECC) to detect and correct errors;
47 Self-Monitoring, Analysis and Reporting Technology (SMART).
49 By monitoring the number of occurrences of error detections, it is possible
55 ---------------
58 Codes that allow error correction when the number of errors on a bit packet
60 can indicate with a high degree of confidence that an error happened, but
63 Also, sometimes an error occur on a component that it is not used. For
68 * **Correctable Error (CE)** - the error detection mechanism detected and
69 corrected the error. Such errors are usually not fatal, although some
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/openbmc/linux/drivers/staging/media/atomisp/pci/runtime/binary/interface/
H A Dia_css_binary.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 Copyright (c) 2010 - 2015, Intel Corporation.
28 /* The binary mode is used in pre-processor expressions so we cannot
102 struct ia_css_frame_info *in_info; /* the info of the input-frame with the
176 /* @brief Get the shading information of the specified shading correction type.
178 * @param[in] binary: The isp binary which has the shading correction.
179 * @param[in] type: The shading correction type.
188 * @return 0 or error code upon error.
/openbmc/linux/include/linux/
H A Dtimex.h28 * Added defines for hybrid phase/frequency-lock loop.
32 * defines for PPS phase-lock loop.
46 * 1995-08-13 Torsten Duwe
47 * kernel PLL updated to 1994-12-13 specs (rfc-1589)
48 * 1997-08-30 Ulrich Windl
50 * 2004-08-12 Christoph Lameter
59 #define ADJ_OFFSET_SINGLESHOT 0x0001 /* old-fashioned adjtime */
60 #define ADJ_OFFSET_READONLY 0x2000 /* read-only adjtime */
73 * when an interrupt takes places versus a high speed, fine-grained
91 * adjust the frequency correction for a given offset in PLL mode.
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/openbmc/docs/designs/
H A Decc-dbus-sel.md1 ### ECC Error SEL for BMC
5 Created: 2019-02-26
9 The IPMI SELs only define memory Error Correction Code (ECC) errors for host
20 error logging limits are reached.[1]. The BMC ECC SEL will follow IPMI SEL
23 OpenBMC currently support for generating SEL entries based on parsing the D-Bus
25 Therefore, the memory ECC information will be registered to D-Bus and generate
28 …](https://www.intel.com/content/www/us/en/servers/ipmi/ipmi-second-gen-interface-spec-v2-rev1-1.ht…
32 Currently, the OpenBMC project does not support ECC event logs in D-Bus because
33 there is no relevant ECC information in the OpenBMC D-Bus architecture. The new
34 ECC D-Bus information will be added to the OpenBMC project and an ECC monitor
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/openbmc/linux/drivers/media/i2c/ccs/
H A Dccs-quirk.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/media/i2c/ccs/ccs-quirk.c
8 * Copyright (C) 2011--2012 Nokia Corporation
15 #include "ccs-limits.h"
20 struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd); in ccs_write_addr_8s()
23 for (; len > 0; len--, regs++) { in ccs_write_addr_8s()
24 rval = ccs_write_addr(sensor, regs->reg, regs->val); in ccs_write_addr_8s()
26 dev_err(&client->dev, in ccs_write_addr_8s()
27 "error %d writing reg 0x%4.4x, val 0x%2.2x", in ccs_write_addr_8s()
28 rval, regs->reg, regs->val); in ccs_write_addr_8s()
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/openbmc/linux/drivers/mtd/tests/
H A Dsubpagetest.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006-2007 Nokia Corporation
5 * Test sub-page read and write on MTD device.
6 * Author: Adrian Hunter <ext-adrian.hunter@nokia.com>
22 static int dev = -EINVAL;
47 loff_t addr = (loff_t)ebnum * mtd->erasesize; in write_eraseblock()
52 pr_err("error: write failed at %#llx\n", in write_eraseblock()
58 return err ? err : -1; in write_eraseblock()
66 pr_err("error: write failed at %#llx\n", in write_eraseblock()
72 return err ? err : -1; in write_eraseblock()
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/openbmc/linux/drivers/staging/media/atomisp/pci/
H A Datomisp_cmd.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 #include <media/v4l2-subdev.h>
87 * Function to enable/disable lens geometry distortion correction (GDC) and
88 * chromatic aberration correction (CAC)
130 /* Function to update gamma correction parameters */
173 /* Function to configure bad pixel correction */
177 /* Function to configure bad pixel correction params */
193 /* Function to configure false color correction */
197 /* Function to configure false color correction params */
276 void atomisp_buf_done(struct atomisp_sub_device *asd, int error,

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