Searched +full:enable +full:- +full:srns (Results 1 – 3 of 3) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | nvidia,tegra194-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 - Vidya Sagar <vidyas@nvidia.com> 16 inherits all the common properties defined in snps,dw-pcie-ep.yaml. Some 23 Note: On Tegra194's P2972-0000 platform, only C5 controller can be enabled to 29 - nvidia,tegra194-pcie-ep [all …]
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H A D | nvidia,tegra194-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 - Vidya Sagar <vidyas@nvidia.com> 16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of 20 See nvidia,tegra194-pcie-ep.yaml for details on the Endpoint mode device 26 - nvidia,tegra194-pcie [all …]
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/openbmc/linux/drivers/pci/controller/dwc/ |
H A D | pcie-tegra194.c | 1 // SPDX-License-Identifier: GPL-2.0+ 7 * Copyright (C) 2019-2022 NVIDIA Corporation. 35 #include "pcie-designware.h" 37 #include <soc/tegra/bpmp-abi.h> 303 writel_relaxed(value, pcie->appl_base + reg); in appl_writel() 308 return readl_relaxed(pcie->appl_base + reg); in appl_readl() 317 struct dw_pcie *pci = &pcie->pci; in tegra_pcie_icc_set() 320 val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA); in tegra_pcie_icc_set() 327 if (icc_set_bw(pcie->icc_path, MBps_to_icc(val), 0)) in tegra_pcie_icc_set() 328 dev_err(pcie->dev, "can't set bw[%u]\n", val); in tegra_pcie_icc_set() [all …]
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