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/openbmc/linux/Documentation/driver-api/thermal/
H A Dintel_dptf.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Intel(R) Dynamic Platform and Thermal Framework Sysfs Interface
12 ------------
14 Intel(R) Dynamic Platform and Thermal Framework (DPTF) is a platform
15 level hardware/software solution for power and thermal management.
17 As a container for multiple power/thermal technologies, DPTF provides
26 "Linux Thermal Daemon" to read platform specific thermal and power
31 ----------------------------
43 "42A441D6-AE6A-462b-A84B-4A8CE79027D3" : Passive 1
45 "3A95C389-E4B8-4629-A526-C52C88626BAE" : Active
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/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dusb251xb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip USB 2.0 Hi-Speed Hub Controller
10 - Richard Leitner <richard.leitner@skidata.com>
15 - microchip,usb2422
16 - microchip,usb2512b
17 - microchip,usb2512bi
18 - microchip,usb2513b
19 - microchip,usb2513bi
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/openbmc/linux/Documentation/sound/soc/
H A Ddapm.rst2 Dynamic Audio Power Management for Portable Devices
8 Dynamic Audio Power Management (DAPM) is designed to allow portable
9 Linux devices to use the minimum amount of power within the audio
11 such, can easily co-exist with the other PM systems.
14 all power switching is done within the ASoC core. No code changes or
15 recompiling are required for user space applications. DAPM makes power
16 switching decisions based upon any audio stream (capture/playback)
19 DAPM spans the whole machine. It covers power control within the entire
20 audio subsystem, this includes internal codec power blocks and machine
21 level power systems.
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/openbmc/linux/Documentation/devicetree/bindings/power/supply/
H A Dltc4162-l.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/power/supply/ltc4162-l.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Linear Technology (Analog Devices) LTC4162-L Charger
11 - Mike Looijmans <mike.looijmans@topic.nl>
14 The LTC ® 4162-L is an advanced monolithic synchronous step-down switching
15 battery charger and PowerPath (TM) manager that seamlessly manages power
17 panels, etc., and a rechargeable Lithium-Ion/Polymer battery.
20 https://www.analog.com/en/products/ltc4162-s.html
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/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dhardwaremanager.h46 /* Automatic Power State Throttling */
92 …PHM_PlatformCaps_PerformanceStateOnly, /* indicates only performance power state …
97 PHM_PlatformCaps_DisablePowerGating, /* to disable power gating */
98 …PHM_PlatformCaps_CustomThermalPolicy, /* indicates only performance power state …
99 … /* Stay in Boot State, do not do clock/voltage or PCIe Lane and Gen switching (RV7xx and up). …
112 …PHM_PlatformCaps_DynamicACTiming, /* if the SMC dynamically re-programs MC S…
114 …tStateOnAlert, /* Go to boot state on alerts, e.g. on an AC->DC transition. */
115 …rVBlankOnAlert, /* Do NOT wait for VBLANK during an alert (e.g. AC->DC transition). */
126 …PHM_PlatformCaps_DynamicPatchPowerState, /* this ASIC supports to patch power state…
131 …PHM_PlatformCaps_PowerContainment, /* support DPM2 power containment (AKA TDP…
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/openbmc/linux/Documentation/driver-api/usb/
H A Dpower-management.rst1 .. _usb-power-management:
3 Power Management for USB
7 :Date: Last-updated: February 2014
11 ---------
12 * What is Power Management?
15 * Forms of dynamic PM
16 * The user interface for dynamic PM
17 * Changing the default idle-delay time
19 * The driver interface for Power Management
23 * Interaction between dynamic PM and system PM
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/openbmc/linux/tools/power/cpupower/bench/
H A DREADME-BENCH1 This is cpufreq-bench, a microbenchmark for the cpufreq framework.
7 - Identify worst case performance loss when doing dynamic frequency
9 - Identify average reaction time of a governor to CPU load changes
10 - (Stress) Testing whether a cpufreq low level driver or governor works
12 - Identify cpufreq related performance regressions between kernels
13 - Possibly Real time priority testing? -> what happens if there are
15 - ...
18 - Power saving related regressions (In fact as better the performance
19 throughput is, the worse the power savings will be, but the first should
21 - Real world (workloads)
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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dxlnx,zynqmp-r5fss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ben Levinsky <ben.levinsky@amd.com>
11 - Tanmay Shah <tanmay.shah@amd.com>
14 The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for
15 real-time processing based on the Cortex-R5F processor core from ARM.
16 The Cortex-R5F processor implements the Arm v7-R architecture and includes a
17 floating-point unit that implements the Arm VFPv3 instruction set.
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/openbmc/linux/drivers/cpufreq/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
8 CPUs on the fly. This is a nice method to save power, because
9 the lower the CPU clock speed, the less power the CPU consumes.
12 clock speed, you need to either enable a dynamic cpufreq governor
16 <file:Documentation/admin-guide/pm/cpufreq.rst>.
79 you to get a full dynamic frequency capable system by simply
80 loading your cpufreq low-level hardware driver.
92 you to get a full dynamic frequency capable system by simply
93 loading your cpufreq low-level hardware driver.
149 'ondemand' - This driver adds a dynamic cpufreq policy governor.
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H A Dpmac64-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 * and Markus Demleitner <msdemlei@cl.uni-heidelberg.de>
72 /* Power mode data is an array of the 32 bits PCR values to use for
73 * the various frequencies, retrieved from the device-tree
93 * SMU based voltage switching for Neo2 platforms
108 * Platform function based voltage/vdnap switching for Neo2
145 * SCOM based frequency switching for 970FX rev3
205 * Fake voltage switching for platforms with missing support
215 * Platform function based voltage switching for PowerMac7,2 & 7,3
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H A Dpmac32-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
41 * init/main.c to make it non-init before enabling DEBUG_FREQ
254 * the above didn't re-enable the DEC */ in pmu_set_cpu_speed()
270 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed()
271 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed()
299 switch_mmu_context(NULL, current->active_mm, NULL); in pmu_set_cpu_speed()
310 * as soon as interrupts are re-enabled and the generic in pmu_set_cpu_speed()
390 * GPIO space, and the device-tree doesn't help. in read_gpio()
451 "voltage-gpio"); in pmac_cpufreq_init_MacRISC3()
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/openbmc/linux/Documentation/timers/
H A Dhighres.rst2 High resolution timers and dynamic ticks design notes
8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
40 - time ordered enqueueing into a rb-tree
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/openbmc/linux/drivers/opp/
H A Dopp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
40 * struct opp_config_data - data for set config operations
56 * |- device 1 (represents voltage domain 1)
57 * | |- opp 1 (availability, freq, voltage)
58 * | |- opp 2 ..
60 * | `- opp n ..
61 * |- device 2 (represents the next voltage domain)
63 * `- device m (represents mth voltage domain)
69 * struct dev_pm_opp - Generic OPP description structure
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/openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Dspl_power_init.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/imx-regs.h>
24 * mxs_power_clock2xtal() - Switch CPU core clock source to 24MHz XTAL
35 debug("SPL: Switching CPU clock to 24MHz XTAL\n"); in mxs_power_clock2xtal()
39 &clkctrl_regs->hw_clkctrl_clkseq_set); in mxs_power_clock2xtal()
43 * mxs_power_clock2pll() - Switch CPU core clock source to PLL
46 * to PLL. This can only be called once the PLL has re-locked and once
54 debug("SPL: Switching CPU core clock source to PLL\n"); in mxs_power_clock2pll()
63 setbits_le32(&clkctrl_regs->hw_clkctrl_pll0ctrl0, in mxs_power_clock2pll()
71 setbits_le32(&clkctrl_regs->hw_clkctrl_clkseq, in mxs_power_clock2pll()
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/openbmc/linux/drivers/staging/rtl8723bs/include/
H A Dhal_data.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
16 /* <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. */
53 /* Tx Power Limit Table Size */
98 /* for High Power */
101 u8 DynamicTxHighPowerLvl;/* Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 */
103 /* for tx power tracking */
166 enum rt_multi_func MultiFunc; /* For multi-function consideration. */
168 enum rt_regulator_mode RegulatorMode; /* switching regulator or LDO */
180 u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */
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/openbmc/linux/include/linux/regulator/
H A Dconsumer.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * consumer.h -- SoC Regulator consumer support.
11 * A Power Management Regulator framework for SoC based devices.
12 * Features:-
19 * Dynamic Regulator operating Mode Switching (DRMS) - allows regulators
46 * output load. This allows further system power savings by selecting the
53 * In order of power efficiency (least efficient at top).
60 * NORMAL Normal regulator power supply mode. Most drivers will
64 * loads. Can be used for devices that have a low power
67 * to handle fast load switching.
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H A Dmachine.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * machine.h -- SoC Regulator support, machine/board driver API.
31 * DRMS: Dynamic Regulator Mode Switching is enabled for this regulator.
44 * DO_NOTHING_IN_SUSPEND - the default value
45 * DISABLE_IN_SUSPEND - turn off regulator in suspend states
46 * ENABLE_IN_SUSPEND - keep regulator on in suspend states
60 * struct regulator_state - regulator state during low power system states
62 * This describes a regulators state during a system wide low power
72 * - DO_NOTHING_IN_SUSPEND
73 * - DISABLE_IN_SUSPEND
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/openbmc/linux/Documentation/sound/designs/
H A Dcompress-offload.rst2 ALSA Compress-Offload API
5 Pierre-Louis.Bossart <pierre-louis.bossart@linux.intel.com>
18 in system-on-chip designs, and DSPs are also integrated in audio
20 reduction of power consumption compared to host-based
27 provide a control and data-streaming interface for audio DSPs.
29 The design of this API was inspired by the 2-year experience with the
39 - separation between byte counts and time. Compressed formats may have
41 may vary from frame-to-frame. As a result, it is not possible to
44 reliable audio-video synchronization, which requires precise
47 - Handling of multiple formats. PCM data only requires a specification
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/openbmc/linux/drivers/staging/rtl8723bs/hal/
H A Dodm.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
24 /* 3 Tx Power Tracking */
54 /* 8723A High Power IGI Setting */
67 /* for 8723A Ant Definition--2012--06--07 due to different IC may be different ANT define */
79 /* Remoce BB power saving by Yuchn */
224 u8 signal_quality; /* in 0-100 index. */
225 s8 rx_mimo_signal_quality[4]; /* per-path's EVM */
226 u8 rx_mimo_evm_dbm[4]; /* per-path's EVM dbm */
230 u16 cfo_short[4]; /* per-path's Cfo_short */
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/openbmc/linux/sound/pci/hda/
H A Dhda_generic.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Generic BIOS auto-parser helper functions for HD-audio
16 /* table entry for multi-io paths */
18 hda_nid_t pin; /* multi-io widget pin NID */
20 unsigned int ctl_in; /* cached input-pin control value */
25 * For output, stored in the order of DAC -> ... -> pin,
26 * for input, pin -> ... -> ADC.
30 * multi[] indicates whether it's a selector widget with multi-connectors
56 /* mic/line-in auto switching entry */
62 int idx; /* imux index, -1 = invalid */
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/openbmc/linux/drivers/regulator/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 output in order to save power and prolong battery life. This applies
38 managed regulators and simple non-configurable regulators.
55 control power supplies for such devices.
65 They provide two I2C-controlled DC/DC step-down converters with
69 tristate "Marvell 88PM800 Power regulators"
79 tristate "Marvell 88PM8607 Power regulators"
85 tristate "Active-semi act8865 voltage regulator"
90 This driver controls a active-semi act8865 voltage output
94 tristate "Active-semi ACT8945A voltage regulator"
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/openbmc/linux/sound/soc/
H A Dsoc-dapm.c1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-dapm.c -- ALSA SoC Dynamic Audio Power Management
9 // o Changes power status of internal codec blocks depending on the
10 // dynamic configuration of codec internal audio paths and active
12 // o Platform power domain - can support external components i.e. amps and
15 // o Jack insertion power event initiation - e.g. hp insertion will enable
17 // o Delayed power down of audio subsystem to reduce pops between a quick
42 #define DAPM_UPDATE_STAT(widget, val) widget->dapm->card->dapm_stats.val++;
67 /* dapm power sequences - make this per codec in the future */
152 if (snd_soc_card_is_instantiated(dapm->card)) in dapm_assert_locked()
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/openbmc/linux/drivers/usb/dwc3/
H A Ddwc3-meson-g12a.c1 // SPDX-License-Identifier: GPL-2.0
11 * - Control registers for each USB2 Ports
12 * - Control registers for the USB PHY layer
13 * - SuperSpeed PHY can be enabled only if port is used
14 * - Dynamic OTG switching with ID change interrupt
33 /* USB2 Ports Control Registers, offsets are per-port */
120 "usb2-phy0", "usb2-phy1", "usb2-phy2",
124 "usb2-phy0", "usb2-phy1", "usb3-phy0",
133 * correctly when only the "usb2-phy1" phy is specified on-par with the
137 "usb2-phy0", "usb2-phy1"
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/openbmc/linux/drivers/memory/samsung/
H A Dexynos5422-dmc.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/devfreq-event.h>
100 * struct dmc_opp_table - Operating level desciption
112 * struct exynos5_dmc - main structure describing DMC device
127 * @timing_power: balues for timing power register, for each OPP
132 * @bypass_timing_power: value for timing power register for bypass
149 * The main structure for the Dynamic Memory Controller which covers clocks,
195 __val = (t_val) << (timing)->bit_beg; \
219 TIMING_FIELD("tW2W-C2C", 14, 14),
220 TIMING_FIELD("tR2R-C2C", 12, 12),
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/openbmc/linux/arch/arm/mach-at91/
H A Dpm_suspend.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-at91/pm_slow_clock.S
13 #include "pm_data-offsets.h"
16 .arch armv7-a
28 * Wait until master clock is ready (after switching master clock source)
91 * Set state for 2.5V low power regulator
92 * @ena: 0 - disable regulator
93 * 1 - enable regulator
125 * Enable self-refresh
164 /* Switch to self-refresh. */
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