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/openbmc/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2hk.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
33 compatible = "arm,cortex-a15";
39 compatible = "arm,cortex-a15";
[all …]
H A Dkeystone-k2l.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
42 /include/ "keystone-k2l-clocks.dtsi"
45 compatible = "ti,da830-uart", "ns16550a";
[all …]
H A Dkeystone-k2e.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
33 compatible = "arm,cortex-a15";
39 compatible = "arm,cortex-a15";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-dsp-keystone.txt1 Keystone 2 DSP GPIO controller bindings
3 HOST OS userland running on ARM can send interrupts to DSP cores using
4 the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core.
7 For example TCI6638K2K SoC has 8 DSP GPIO controllers:
8 - 8 for C66x CorePacx CPUs 0-7
10 Keystone 2 DSP GPIO controller has specific features:
11 - each GPIO can be configured only as output pin;
12 - setting GPIO value to 1 causes IRQ generation on target DSP core;
13 - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
17 - compatible: should be "ti,keystone-dsp-gpio"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
25 [1] GPIO : ../gpio/gpio.txt
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
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/openbmc/u-boot/arch/arm/dts/
H A Dkeystone-k2hk.dtsi2 * Copyright 2013-2014 Texas Instruments, Inc.
13 #address-cells = <1>;
14 #size-cells = <0>;
16 interrupt-parent = <&gic>;
19 compatible = "arm,cortex-a15";
25 compatible = "arm,cortex-a15";
31 compatible = "arm,cortex-a15";
37 compatible = "arm,cortex-a15";
44 /include/ "keystone-k2hk-clocks.dtsi"
47 compatible = "ti,keystone-dsp-gpio";
[all …]
H A Dkeystone-k2l.dtsi13 #address-cells = <1>;
14 #size-cells = <0>;
16 interrupt-parent = <&gic>;
19 compatible = "arm,cortex-a15";
25 compatible = "arm,cortex-a15";
32 /include/ "keystone-k2l-clocks.dtsi"
36 current-speed = <115200>;
37 reg-shift = <2>;
38 reg-io-width = <4>;
46 current-speed = <115200>;
[all …]
H A Domap3.dtsi4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/omap.h>
17 interrupt-parent = <&intc>;
18 #address-cells = <1>;
19 #size-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <0>;
36 compatible = "arm,cortex-a8";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,keystone-rproc.txt1 TI Keystone DSP devices
4 The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core
5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
10 a dedicated local power/sleep controller etc. The DSP processor core in
13 DSP Device Node:
15 Each DSP Core sub-system is represented as a single DT node, and should also
22 --------------------
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
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/openbmc/linux/arch/powerpc/boot/dts/
H A Dwii.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2008-2009 The GameCube Linux Team
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
15 * This is commented-out for now.
20 /*/memreserve/ 0x10000000 0x0004000;*/ /* DSP RAM */
25 #address-cells = <1>;
26 #size-cells = <1>;
29 bootargs = "root=/dev/mmcblk0p2 rootwait udbg-immortal";
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/openbmc/linux/Documentation/devicetree/bindings/powerpc/nintendo/
H A Dwii.txt11 - model : Should be "nintendo,wii"
12 - compatible : Should be "nintendo,wii"
16 This node represents the multi-function "Hollywood" chip, which packages
21 - compatible : Should be "nintendo,hollywood"
30 - compatible : should be "nintendo,hollywood-vi","nintendo,flipper-vi"
31 - reg : should contain the VI registers location and length
32 - interrupts : should contain the VI interrupt
41 - compatible : should be "nintendo,hollywood-pi","nintendo,flipper-pi"
42 - reg : should contain the PI registers location and length
52 - #interrupt-cells : <1>
[all …]
/openbmc/linux/drivers/remoteproc/
H A Dkeystone_remoteproc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI Keystone DSP remoteproc driver
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
17 #include <linux/gpio/consumer.h>
25 #define KEYSTONE_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
28 * struct keystone_rproc_mem - internal memory structure
31 * @dev_addr: Device address of the memory region from DSP view
42 * struct keystone_rproc - keystone remote processor driver structure
52 * @kick_gpio: gpio used for virtio kicks
69 /* Put the DSP processor into reset */
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dcs35l45.c1 // SPDX-License-Identifier: GPL-2.0
3 // cs35l45.c - CS35L45 ALSA SoC audio driver
5 // Copyright 2019-2022 Cirrus Logic, Inc.
9 #include <linux/gpio/consumer.h>
53 if (!cs35l45->dsp.cs_dsp.running) { in cs35l45_set_cspl_mbox_cmd()
54 dev_err(cs35l45->dev, "DSP not running\n"); in cs35l45_set_cspl_mbox_cmd()
55 return -EPERM; in cs35l45_set_cspl_mbox_cmd()
62 dev_err(cs35l45->dev, "Failed to write MBOX: %d\n", ret); in cs35l45_set_cspl_mbox_cmd()
72 dev_err(cs35l45->dev, "Failed to read MBOX STS: %d\n", ret); in cs35l45_set_cspl_mbox_cmd()
77 dev_dbg(cs35l45->dev, "[%u] cmd %u returned invalid sts %u", i, cmd, sts); in cs35l45_set_cspl_mbox_cmd()
[all …]
H A Dcs35l56.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/gpio/consumer.h>
27 #include <sound/soc-dapm.h>
39 flush_work(&cs35l56->dsp_work); in cs35l56_wait_dsp_ready()
73 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(cs35l56->component); in cs35l56_sync_asp1_mixer_widgets_with_firmware()
74 const char *prefix = cs35l56->component->name_prefix; in cs35l56_sync_asp1_mixer_widgets_with_firmware()
82 if (cs35l56->asp1_mixer_widgets_initialized) in cs35l56_sync_asp1_mixer_widgets_with_firmware()
89 ret = pm_runtime_resume_and_get(cs35l56->base.dev); in cs35l56_sync_asp1_mixer_widgets_with_firmware()
96 ret = regmap_bulk_read(cs35l56->base.regmap, CS35L56_ASP1TX1_INPUT, in cs35l56_sync_asp1_mixer_widgets_with_firmware()
99 pm_runtime_mark_last_busy(cs35l56->base.dev); in cs35l56_sync_asp1_mixer_widgets_with_firmware()
[all …]
/openbmc/linux/sound/soc/intel/boards/
H A Dbdw-rt5677.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/gpio/consumer.h>
18 #include <sound/soc-acpi.h>
30 struct snd_soc_dapm_context *dapm = w->dapm; in bdw_rt5677_event_hp()
31 struct snd_soc_card *card = dapm->card; in bdw_rt5677_event_hp()
37 gpiod_set_value_cansleep(bdw_rt5677->gpio_hp_en, in bdw_rt5677_event_hp()
74 {"DSP Capture", NULL, "DSP Buffer"},
76 /* DSP Clock Connections */
77 { "DSP Buffer", NULL, "SSP0 CODEC IN" },
104 .name = "plug-det",
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/openbmc/qemu/include/hw/arm/
H A Darmv7m.h20 #define TYPE_BITBAND "ARM-bitband-memory"
40 * + Unnamed GPIO input lines: external IRQ lines for the NVIC
41 * + Named GPIO output SYSRESETREQ: signalled for guest AIRCR.SYSRESETREQ.
42 * If this GPIO is not wired up then the NVIC will default to performing
44 * + Property "cpu-type": CPU type to instantiate
45 * + Property "num-irq": number of external IRQ lines
46 * + Property "num-prio-bits": number of priority bits in the NVIC
48 * that CPU accesses see. (The NVIC, bitbanding and other CPU-internal
51 * + Property "init-svtor": secure VTOR reset value (forwarded to CPU object)
52 * + Property "init-nsvtor": non-secure VTOR reset value (forwarded to CPU object)
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dtas5805m.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Beer <daniel.beer@igorinstitute.com>
13 The TAS5805M is a class D audio amplifier with a built-in DSP.
18 - ti,tas5805m
25 pvdd-supply:
29 pdn-gpios:
31 Power-down control GPIO (PDN pin in the datasheet).
33 ti,dsp-config-name:
[all …]
H A Dzl38060.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 which consists of a Digital Signal Processor (DSP), several Digital
15 - Jaroslav Kysela <perex@perex.cz>
16 - Takashi Iwai <tiwai@suse.com>
19 - $ref: dai-common.yaml#
30 spi-max-frequency:
33 reset-gpios:
35 A GPIO line handling reset of the chip. As the line is active low,
[all …]
/openbmc/u-boot/board/Barix/ipam390/
H A Dipam390.c1 // SPDX-License-Identifier: GPL-2.0+
5 * U-Boot:board/davinci/da8xxevm/da850evm.c
7 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
22 #include <asm/ti-common/davinci_nand.h>
28 #include <asm/gpio.h>
31 #include <asm/mach-types.h>
49 mdstat = &psc_regs->psc0.mdstat[id]; in dsp_lpsc_on()
50 mdctl = &psc_regs->psc0.mdctl[id]; in dsp_lpsc_on()
51 ptstat = &psc_regs->ptstat; in dsp_lpsc_on()
52 ptcmd = &psc_regs->ptcmd; in dsp_lpsc_on()
[all …]
/openbmc/linux/sound/pci/ice1712/
H A Dhoontech.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 "{Hoontech,SoundTrack DSP 24}," \
15 "{Hoontech,SoundTrack DSP 24 Value}," \
16 "{Hoontech,SoundTrack DSP 24 Media 7.1}," \
19 #define ICE1712_SUBDEVICE_STDSP24 0x12141217 /* Hoontech SoundTrack Audio DSP 24 */
20 #define ICE1712_SUBDEVICE_STDSP24_VALUE 0x00010010 /* A dummy id for Hoontech SoundTrack Audio DSP
28 /* Hoontech SoundTrack Audio DSP 24 GPIO definitions */
45 /* Hoontech SoundTrack Audio DSP 24 box configuration definitions */
58 /* Hoontech SoundTrack Audio DSP 24 Value definitions for modified hardware */
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap5-uevm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
7 #include "omap5-board-common.dtsi"
11 compatible = "ti,omap5-uevm", "ti,omap5";
18 reserved-memory {
19 #address-cells = <2>;
20 #size-cells = <2>;
23 dsp_memory_region: dsp-memory@95000000 {
24 compatible = "shared-dma-pool";
[all …]
H A Domap3.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/omap.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
33 #address-cells = <1>;
[all …]
/openbmc/u-boot/board/freescale/bsc9131rdb/
H A DREADME2 --------
3 - BSC9131 is integrated device that targets Femto base station market.
4 It combines Power Architecture e500v2 and DSP StarCore SC3850 core
5 technologies with MAPLE-B2F baseband acceleration processing elements.
6 - It's MAPLE disabled personality is called 9231.
9 . Power Architecture subsystem including a e500 processor with 256-Kbyte shared
11 . StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache
13 Processing (MAPLE-B2F)
14 . A multi-standard baseband algorithm accelerator for Channel Decoding/Encoding,
20 . DDR3/3L memory interface with 32-bit data width without ECC and 16-bit with
[all …]
/openbmc/u-boot/board/freescale/bsc9132qds/
H A DREADME2 --------
4 Microcell, Picocell, and Enterprise-Femto base station market subsegments.
6 The BSC9132 device combines Power Architecture e500 and DSP StarCore SC3850
7 core technologies with MAPLE-B2P baseband acceleration processing elements
15 - Power Architecture subsystem including two e500 processors with
16 512-Kbyte shared L2 cache
17 - Two StarCore SC3850 DSP subsystems, each with a 512-Kbyte private L2
19 - 32 Kbyte of shared M3 memory
20 - The Multi Accelerator Platform Engine for Pico BaseStation Baseband
21 Processing (MAPLE-B2P)
[all …]
/openbmc/linux/arch/arm/mach-omap1/
H A Dpm.c2 * linux/arch/arm/mach-omap1/pm.c
55 #include <linux/soc/ti/omap1-io.h>
57 #include <linux/omap-dma.h>
58 #include <clocksource/timer-ti-dm.h>
91 return -EINVAL; in idle_store()
163 * Turn off all interrupts except GPIO bank 1, L1-2nd level cascade, in omap_pm_wakeup_setup()
166 * wake up to a GPIO interrupt. in omap_pm_wakeup_setup()
184 /* INT_1610_WAKE_UP_REQ is needed for GPIO wakeup... */ in omap_pm_wakeup_setup()
263 /* (Step 3 removed - we now allow deep sleep by default) */ in omap1_pm_suspend()
266 * Step 4: OMAP DSP Shutdown in omap1_pm_suspend()
[all …]

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