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/openbmc/linux/Documentation/networking/dsa/
H A Ddsa.rst5 This document describes the **Distributed Switch Architecture (DSA)** subsystem
22 An Ethernet switch typically comprises multiple front-panel ports and one
23 or more CPU or management ports. The DSA subsystem currently relies on the
27 gateways, or even top-of-rack switches. This host Ethernet controller will
28 be later referred to as "master" and "cpu" in DSA terminology and code.
30 The D in DSA stands for Distributed, because the subsystem has been designed
33 ports are referred to as "dsa" ports in DSA terminology and code. A collection
36 For each front-panel port, DSA creates specialized network devices which are
37 used as controlling and data-flowing endpoints for use by the Linux networking
39 interfaces in DSA terminology and code.
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H A Dconfiguration.rst1 .. SPDX-License-Identifier: GPL-2.0
4 DSA switch configuration from userspace
7 The DSA switch configuration is not integrated into the main userspace
10 .. _dsa-config-showcases:
13 -----------------------
15 To configure a DSA switch a couple of commands need to be executed. In this
32 Through DSA every port of a switch is handled like a normal linux Ethernet
42 - when a DSA slave interface is brought up, the master interface is
44 - when the master interface is brought down, all DSA slave interfaces are
71 * lan1: 192.0.2.1/30 (192.0.2.0 - 192.0.2.3)
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H A Dsja1105.rst8 The NXP SJA1105 is a family of 10 SPI-managed automotive switches:
10 - SJA1105E: First generation, no TTEthernet
11 - SJA1105T: First generation, TTEthernet
12 - SJA1105P: Second generation, no TTEthernet, no SGMII
13 - SJA1105Q: Second generation, TTEthernet, no SGMII
14 - SJA1105R: Second generation, no TTEthernet, SGMII
15 - SJA1105S: Second generation, TTEthernet, SGMII
16 - SJA1110A: Third generation, TTEthernet, SGMII, integrated 100base-T1 and
17 100base-TX PHYs
18 - SJA1110B: Third generation, TTEthernet, SGMII, 100base-T1, 100base-TX
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/openbmc/linux/net/dsa/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
22 tristate "No-op tag driver"
24 Say Y or M if you want to enable support for switches which don't tag
28 tristate "Tag driver for Atheros AR9331 SoC with built-in switch"
31 the Atheros AR9331 SoC with built-in switch.
38 tristate "Tag driver for Broadcom switches using in-frame headers"
42 Broadcom switches which place the tag after the MAC source address.
45 tristate "Tag driver for Broadcom legacy switches using in-frame headers"
49 Broadcom legacy switches which place the tag after the MAC source
53 tristate "Tag driver for Broadcom switches using prepended headers"
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H A Dtag_rtl4_a.c1 // SPDX-License-Identifier: GPL-2.0
3 * Handler for Realtek 4 byte DSA switch tags
4 * Currently only supports protocol "A" found in RTL8366RB
7 * This "proprietary tag" header looks like so:
9 * -------------------------------------------------
10 * | MAC DA | MAC SA | 0x8899 | 2 bytes tag | Type |
11 * -------------------------------------------------
13 * The 2 bytes tag form a 16 bit big endian word. The exact
21 #include "tag.h"
29 * 0x1 = Realtek Remote Control protocol (RRCP)
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H A Dtag.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 #include <net/dsa.h>
29 return ops->needed_headroom + ops->needed_tailroom; in dsa_tag_protocol_overhead()
35 struct dsa_port *cpu_dp = dev->dsa_ptr; in dsa_master_find_slave()
36 struct dsa_switch_tree *dst = cpu_dp->dst; in dsa_master_find_slave()
39 list_for_each_entry(dp, &dst->ports, list) in dsa_master_find_slave()
40 if (dp->ds->index == device && dp->index == port && in dsa_master_find_slave()
41 dp->type == DSA_PORT_TYPE_USER) in dsa_master_find_slave()
42 return dp->slave; in dsa_master_find_slave()
47 /* If under a bridge with vlan_filtering=0, make sure to send pvid-tagged
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H A Ddsa.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DSA topology and switch handling
5 * Copyright (c) 2008-2009 Marvell Semiconductor
24 #include "dsa.h"
30 #include "tag.h"
54 * dsa_lag_map() - Map LAG structure to a linear LAG array
60 * driver by setting ds->num_lag_ids. It is perfectly legal to leave
62 * no-ops.
68 for (id = 1; id <= dst->lags_len; id++) { in dsa_lag_map()
70 dst->lags[id - 1] = lag; in dsa_lag_map()
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H A Dtag_dsa.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Regular and Ethertype DSA tagging
4 * Copyright (c) 2008-2009 Marvell Semiconductor
6 * Regular DSA
7 * -----------
10 * the tag between the SA and the ethertype of the original
11 * packet. Tagged frames will instead have their outermost .1Q tag
12 * converted to a DSA tag. It expects the same layout when receiving
17 * .----.----.----.---------
19 * '----'----'----'---------
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H A Dmaster.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2017 Savoir-faire Linux Inc.
12 #include <net/dsa.h>
14 #include "dsa.h"
17 #include "tag.h"
21 struct dsa_port *cpu_dp = dev->dsa_ptr; in dsa_master_get_regs_len()
22 const struct ethtool_ops *ops = cpu_dp->orig_ethtool_ops; in dsa_master_get_regs_len()
23 struct dsa_switch *ds = cpu_dp->ds; in dsa_master_get_regs_len()
24 int port = cpu_dp->index; in dsa_master_get_regs_len()
28 if (ops->get_regs_len) { in dsa_master_get_regs_len()
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H A Dtag.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DSA tagging protocol handling
5 * Copyright (c) 2008-2009 Marvell Semiconductor
13 #include <net/dsa.h>
17 #include "tag.h"
26 * timestamp when it reads the packet out of the hardware. However in a DSA
27 * switch, the DSA driver owning the interface to which the packet is
33 struct dsa_switch *ds = p->dp->ds; in dsa_skb_defer_rx_timestamp()
36 if (!ds->ops->port_rxtstamp) in dsa_skb_defer_rx_timestamp()
51 return ds->ops->port_rxtstamp(ds, p->dp->index, skb, type); in dsa_skb_defer_rx_timestamp()
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H A Dtag_mtk.c1 // SPDX-License-Identifier: GPL-2.0
3 * Mediatek DSA Tag support
11 #include "tag.h"
30 skb_set_queue_mapping(skb, dp->index); in mtk_tag_xmit()
32 /* Build the special tag after the MAC Source Address. If VLAN header in mtk_tag_xmit()
33 * is present, it's required that VLAN header and special tag is in mtk_tag_xmit()
35 * the both special and VLAN tag at the same time and then look up VLAN in mtk_tag_xmit()
38 switch (skb->protocol) { in mtk_tag_xmit()
53 /* Mark tag attribute on special tag insertion to notify hardware in mtk_tag_xmit()
54 * whether that's a combined special tag with 802.1Q header. in mtk_tag_xmit()
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H A Dtag_rtl8_4.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2021 Alvin Šipraga <alsi@bang-olufsen.dk>
7 * NOTE: Currently only supports protocol "4" found in the RTL8365MB, hence
10 * This tag has the following format:
13 * |-----------------------------------+-----------------------------------|---
14 * | (16-bit) | ^
16 * |-----------------------------------+-----------------------------------| 8
17 * | (8-bit) | (8-bit) |
18 * | Protocol [0x04] | REASON | b
19 * |-----------------------------------+-----------------------------------| y
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H A Dslave.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * net/dsa/slave.c - Slave device handling
4 * Copyright (c) 2008-2009 Marvell Semiconductor
26 #include "dsa.h"
32 #include "tag.h"
70 return ds->ops->port_fdb_add && ds->ops->port_fdb_del && in dsa_switch_supports_uc_filtering()
71 ds->fdb_isolation && !ds->vlan_filtering_is_global && in dsa_switch_supports_uc_filtering()
72 !ds->needs_standalone_vlan_filtering; in dsa_switch_supports_uc_filtering()
77 return ds->ops->port_mdb_add && ds->ops->port_mdb_del && in dsa_switch_supports_mc_filtering()
78 ds->fdb_isolation && !ds->vlan_filtering_is_global && in dsa_switch_supports_mc_filtering()
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H A Dtag_sja1105.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/dsa/sja1105.h>
6 #include <linux/dsa/8021q.h>
9 #include "tag.h"
23 /* Trap-to-host format (no trailer present) */
33 /* Meta frame format (for 2-step TX timestamps) */
74 return ds->tagger_data; in sja1105_tagger_private()
77 /* Similar to is_link_local_ether_addr(hdr->h_dest) but also covers PTP */
81 u64 dmac = ether_addr_to_u64(hdr->h_dest); in sja1105_is_link_local()
83 if (ntohs(hdr->h_proto) == ETH_P_SJA1105_META) in sja1105_is_link_local()
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/openbmc/linux/Documentation/devicetree/bindings/net/dsa/
H A Ddsa-port.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/dsa/dsa-port.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic DSA Switch Port
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Vladimir Oltean <olteanv@gmail.com>
15 A DSA switch port is a component of a switch that manages one MAC, and can
17 DSA-specific functionality.
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/openbmc/linux/include/uapi/linux/
H A Dif_ether.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * INET An implementation of the TCP/IP protocol suite for the LINUX
44 * These are the defined Ethernet Protocol ID's.
52 #define ETH_P_IP 0x0800 /* Internet Protocol packet */
58 #define ETH_P_BATMAN 0x4305 /* B.A.T.M.A.N.-Advanced packet [ NOT AN OFFICIALLY REGISTERED ID ] */
76 #define ETH_P_SLOW 0x8809 /* Slow Protocol. See 802.3ad 43B */
77 #define ETH_P_WCCP 0x883E /* Web-cache coordination protocol
78 * defined in draft-wilson-wrec-wccp-v2-00.txt */
85 #define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport
97 #define ETH_P_LLDP 0x88CC /* Link Layer Discovery Protocol */
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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1028a-kontron-sl28.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
9 /dts-v1/;
10 #include "fsl-ls1028a.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
16 model = "Kontron SMARC-sAL28";
33 compatible = "gpio-keys";
35 power-button {
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/openbmc/u-boot/include/linux/
H A Dif_ether.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * INET An implementation of the TCP/IP protocol suite for the LINUX
44 * These are the defined Ethernet Protocol ID's.
52 #define ETH_P_IP 0x0800 /* Internet Protocol packet */
59 #define ETH_P_BATMAN 0x4305 /* B.A.T.M.A.N.-Advanced packet */
78 #define ETH_P_SLOW 0x8809 /* Slow Protocol. See 802.3ad 43B */
79 #define ETH_P_WCCP 0x883E /* Web-cache coordination */
80 /* protocol defined in */
81 /* draft-wilson-wrec-wccp-v2-00.txt */
88 #define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport over Ethernet */
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/openbmc/linux/include/net/
H A Ddsa.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/net/dsa.h - Driver for Distributed Switch Architecture switch chips
4 * Copyright (c) 2008-2009 Marvell Semiconductor
20 #include <linux/platform_data/dsa.h>
105 * address, in which case the DSA master would drop packets on ingress
126 /* Notifier chain for switch-wide events */
135 /* Maps offloaded LAG netdevs to a zero-based linear ID for
140 /* Tagging protocol operations */
143 /* Default tagging protocol preferred by the switches in this
153 * this dsa switch tree instance.
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/openbmc/linux/Documentation/networking/
H A Dnf_flowtable.rst1 .. SPDX-License-Identifier: GPL-2.0
13 --------
28 n-tuple selectors: layer 2 protocol encapsulation (VLAN and PPPoE), layer 3
51 _________ __________ --------- _____\/_____
53 --> ingress ---> prerouting ---> |decision| | postrouting |--> neigh_xmit
54 \_________/ \__________/ ---------- \____________/ ^
58 __\/___ | | forward |------------ |
59 |-----| | \_________/ |
60 |-----| | 'flow offload' rule |
61 |-----| | adds entry to |
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/openbmc/linux/drivers/net/ethernet/marvell/prestera/
H A Dprestera_rxtx.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2019-2020 Marvell International Ltd. All rights reserved */
28 ((le32_to_cpu((desc)->word2) >> 16) & GENMASK(13, 0))
31 ((le32_to_cpu((desc)->word1) & BIT(31)) >> 31)
47 ((le32_to_cpu((desc)->word1) & BIT(31)) >> 31)
116 desc = dma_pool_alloc(sdma->desc_pool, GFP_DMA | GFP_KERNEL, &dma); in prestera_sdma_buf_init()
118 return -ENOMEM; in prestera_sdma_buf_init()
120 buf->buf_dma = DMA_MAPPING_ERROR; in prestera_sdma_buf_init()
121 buf->desc_dma = dma; in prestera_sdma_buf_init()
122 buf->desc = desc; in prestera_sdma_buf_init()
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/openbmc/linux/drivers/net/dsa/ocelot/
H A Dfelix.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2019-2021 NXP
5 * register-compatible with Ocelot and that perform I/O to their host CPU
16 #include <linux/dsa/8021q.h>
17 #include <linux/dsa/ocelot.h>
25 #include <net/dsa.h>
28 /* Translate the DSA database API into the ocelot switch library API,
41 return ERR_PTR(-EOPNOTSUPP); in felix_classify_db()
48 struct ocelot *ocelot = ds->priv; in felix_cpu_port_for_master()
53 mutex_lock(&ocelot->fwd_domain_lock); in felix_cpu_port_for_master()
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/openbmc/linux/drivers/net/dsa/mv88e6xxx/
H A Dchip.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Marvell 88E6xxx Ethernet switch single-chip definition
19 #include <net/dsa.h>
28 /* PVT limits for 4-bit port and 5-bit switch */
110 * enum mv88e6xxx_edsa_support - Ethertype DSA tag support level
114 * tag is reserved for future use, but
149 * ports 2-4 are not routet to pins.
152 /* Multi-chip Addressing Mode.
154 * when it is non-zero, and use indirect access to internal registers.
157 /* Dual-chip Addressing Mode
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/openbmc/linux/drivers/scsi/sym53c8xx_2/
H A Dsym_hipd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * of PCI-SCSI IO processors.
6 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
10 * Copyright (C) 1998-2000 Gerard Roudier
13 * a port of the FreeBSD ncr driver to Linux-1.2.13.
17 * Stefan Esser <se@mi.Uni-Koeln.de>
25 *-----------------------------------------------------------------------------
44 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa);
55 while (n-- > 0) in sym_printl_hex()
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/openbmc/linux/Documentation/arch/x86/
H A Dsva.rst1 .. SPDX-License-Identifier: GPL-2.0
19 application page-faults. For more information please refer to the PCIe
34 Unlike Single Root I/O Virtualization (SR-IOV), Scalable IOV (SIOV) permits
40 ID (PASID), which is a 20-bit number defined by the PCIe SIG.
43 IOMMU to track I/O on a per-PASID granularity in addition to using the PCIe
55 ENQCMD works with non-posted semantics and carries a status back if the
67 A new thread-scoped MSR (IA32_PASID) provides the connection between
69 accesses an SVA-capable device, this MSR is initialized with a newly
70 allocated PASID. The driver for the device calls an IOMMU-specific API
71 that sets up the routing for DMA and page-requests.
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