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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Danalogix,anx7625.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
28 enable-gpios:
32 reset-gpios:
36 vdd10-supply:
39 vdd18-supply:
42 vdd33-supply:
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62-verdin-wifi.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
11 wifi_pwrseq: wifi-pwrseq {
12 compatible = "mmc-pwrseq-simple";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_wifi_en>;
15 reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_LOW>;
19 /* On-module Wi-Fi */
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_sdhci2>;
[all …]
H A Dk3-am6548-iot2050-advanced-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) Siemens AG, 2018-2021
12 /dts-v1/;
14 #include "k3-am65-iot2050-common.dtsi"
25 main_mmc0_pins_default: main-mmc0-default-pins {
26 pinctrl-single,pins = <
46 pinctrl-names = "default";
47 pinctrl-0 = <&main_mmc0_pins_default>;
48 bus-width = <8>;
49 non-removable;
[all …]
H A Dk3-j7200-common-proc-board.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j7200-som-p0.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/phy/phy.h>
13 #include "k3-serdes.h"
16 compatible = "ti,j7200-evm", "ti,j7200";
30 stdout-path = "serial2:115200n8";
[all …]
H A Dk3-am62-verdin-dahlia.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
8 * https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit
12 reg_1v8_sw: regulator-1v8-sw {
13 compatible = "regulator-fixed";
14 regulator-max-microvolt = <1800000>;
15 regulator-min-microvolt = <1800000>;
16 regulator-name = "On-carrier +V1.8_SW";
20 compatible = "simple-audio-card";
21 simple-audio-card,bitclock-master = <&codec_dai>;
[all …]
H A Dk3-am62-verdin-dev.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
8 * https://www.toradex.com/products/carrier-board/verdin-development-board-kit
13 compatible = "simple-audio-card";
14 simple-audio-card,bitclock-master = <&codec_dai>;
15 simple-audio-card,format = "i2s";
16 simple-audio-card,frame-master = <&codec_dai>;
17 simple-audio-card,name = "verdin-nau8822";
18 simple-audio-card,routing =
29 simple-audio-card,widgets =
[all …]
H A Dk3-am62x-sk-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2021-2023 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include "k3-am625.dtsi"
27 stdout-path = "serial2:115200n8";
36 reserved-memory {
37 #address-cells = <2>;
38 #size-cells = <2>;
[all …]
H A Dk3-am642-tqma64xxl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
7 #include "k3-am642.dtsi"
18 /* 1G RAM - default variant */
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
31 no-map;
34 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
[all …]
/openbmc/linux/drivers/staging/pi433/Documentation/
H A Dpi433.txt8 This driver is for controlling pi433, a radio module for the Raspberry Pi
14 The driver supports on the fly reloading of the hardware fifo of the rf
17 Description of driver operation
23 module. Therefore each application can set its own set of parameters. The driver
46 Now the driver is waiting, that a predefined RSSI level (signal strength at the
56 Driver API
59 The driver is currently implemented as a character device. Therefore it supports
64 ----------------
67 PI433_IOC_RD_TX_CFG - get the transmission parameters from the driver
68 PI433_IOC_WR_TX_CFG - set the transmission parameters
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx-pinctrl.txt10 Please refer to pinctrl-bindings.txt in this directory for details of the
18 such as pull-up, open drain, drive strength, etc.
21 - compatible: "fsl,<soc>-iomuxc"
22 Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs.
25 - fsl,pins: each entry consists of 6 integers and represents the mux and config
28 imx*-pinfunc.h under device tree source folder. The last integer CONFIG is
29 the pad setting value like pull-up on this pin. And that's why fsl,pins entry
41 Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part
45 Some requirements for using fsl,imx-pinctrl binding:
52 3. The driver can use the function node's name and pin configuration node's
[all …]
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dpinctrl-bindings.txt4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
26 driver loads. This would allow representing a board's static pin configuration
47 pinctrl-0: List of phandles, each pointing at a pin configuration
65 pinctrl-1: List of phandles, each pointing at a pin configuration
68 pinctrl-n: List of phandles, each pointing at a pin configuration
70 pinctrl-names: The list of names to assign states. List entry 0 defines the
78 pinctrl-names = "active", "idle";
79 pinctrl-0 = <&state_0_node_a>;
80 pinctrl-1 = <&state_1_node_a &state_1_node_b>;
[all …]
/openbmc/u-boot/board/freescale/t208xrdb/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0
28 if (!pdimm->n_ranks) in fsl_ddr_board_options()
37 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
38 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
39 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
40 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
41 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
42 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
43 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
44 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/freescale/ls1043aqds/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
28 if (!pdimm->n_ranks) in fsl_ddr_board_options()
37 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
38 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
39 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
40 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
41 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
42 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
43 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
44 popts->cpo_override = pbsp->cpo_override; in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/freescale/t4rdb/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
28 if (!pdimm->n_ranks) in fsl_ddr_board_options()
35 if (popts->registered_dimm_en) in fsl_ddr_board_options()
45 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
46 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
47 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
48 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
49 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
50 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
51 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/freescale/t208xqds/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0
28 if (!pdimm->n_ranks) in fsl_ddr_board_options()
35 if (popts->registered_dimm_en) in fsl_ddr_board_options()
44 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
45 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
46 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
47 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
48 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
49 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
50 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/freescale/p2041rdb/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0
32 * wr_data_delay = 0-6
33 * clk adjust = 0-8
34 * cpo 2-0x1E (30)
60 if (!pdimm->n_ranks) in fsl_ddr_board_options()
70 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
71 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
72 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
73 popts->cpo_override = pbsp->cpo; in fsl_ddr_board_options()
74 popts->write_data_delay = in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/freescale/t4qds/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0
28 if (!pdimm->n_ranks) in fsl_ddr_board_options()
35 if (popts->registered_dimm_en) in fsl_ddr_board_options()
45 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
46 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
47 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
48 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
49 popts->cpo_override = pbsp->cpo; in fsl_ddr_board_options()
50 popts->write_data_delay = in fsl_ddr_board_options()
51 pbsp->write_data_delay; in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/freescale/t1040qds/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
29 if (!pdimm->n_ranks) in fsl_ddr_board_options()
38 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
39 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
40 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
41 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
42 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
43 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
44 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/freescale/t104xrdb/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
29 if (!pdimm->n_ranks) in fsl_ddr_board_options()
38 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
39 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
40 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
41 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
42 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
43 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
44 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
45 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/freescale/ls2080a/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
26 if (!pdimm->n_ranks) in fsl_ddr_board_options()
33 if (popts->registered_dimm_en) in fsl_ddr_board_options()
43 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
44 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
45 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
46 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
47 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
48 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
49 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
[all …]
/openbmc/u-boot/board/freescale/ls1021aqds/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
26 if (!pdimm->n_ranks) in fsl_ddr_board_options()
35 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
36 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
37 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
38 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
39 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
40 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
41 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
42 popts->cpo_override = pbsp->cpo_override; in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/freescale/t102xqds/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
65 struct cpu_type *cpu = gd->arch.cpu; in fsl_ddr_board_options()
71 if (!pdimm->n_ranks) in fsl_ddr_board_options()
80 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
81 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
82 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
83 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
84 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
85 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
86 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/varisys/cyrus/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
106 if (!pdimm->n_ranks) in fsl_ddr_board_options()
109 if (popts->registered_dimm_en) in fsl_ddr_board_options()
119 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
120 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
121 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
122 popts->cpo_override = pbsp->cpo; in fsl_ddr_board_options()
123 popts->write_data_delay = in fsl_ddr_board_options()
124 pbsp->write_data_delay; in fsl_ddr_board_options()
125 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
[all …]
/openbmc/linux/drivers/pinctrl/bcm/
H A Dpinctrl-bcm281xx.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2013-2017 Broadcom
13 #include <linux/pinctrl/pinconf-generic.h>
19 #include "../pinctrl-utils.h"
56 * bcm281xx_pin_type - types of pin register
70 * bcm281xx_pin_function- define pin function
79 * bcm281xx_pinctrl_data - Broadcom-specific pinctrl data
80 * @reg_base - base of pinctrl registers
921 /* Every pin can implement all ALT1-ALT4 functions */
948 if (pin >= pdata->npins) in pin_type_get()
[all …]

12