freescale/t4rdb/ddr.c

1 // SPDX-License-Identifier: GPL-2.0+
28 	if (!pdimm->n_ranks)  in fsl_ddr_board_options()
35 	if (popts->registered_dimm_en)  in fsl_ddr_board_options()
45 	while (pbsp->datarate_mhz_high) {  in fsl_ddr_board_options()
46 		if (pbsp->n_ranks == pdimm->n_ranks &&  in fsl_ddr_board_options()
47 		    (pdimm->rank_density >> 30) >= pbsp->rank_gb) {  in fsl_ddr_board_options()
48 			if (ddr_freq <= pbsp->datarate_mhz_high) {  in fsl_ddr_board_options()
49 				popts->clk_adjust = pbsp->clk_adjust;  in fsl_ddr_board_options()
50 				popts->wrlvl_start = pbsp->wrlvl_start;  in fsl_ddr_board_options()
51 				popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;  in fsl_ddr_board_options()
52 				popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;  in fsl_ddr_board_options()
64 			ddr_freq, pbsp_highest->datarate_mhz_high);  in fsl_ddr_board_options()
65 		popts->clk_adjust = pbsp_highest->clk_adjust;  in fsl_ddr_board_options()
66 		popts->wrlvl_start = pbsp_highest->wrlvl_start;  in fsl_ddr_board_options()
67 		popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;  in fsl_ddr_board_options()
68 		popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;  in fsl_ddr_board_options()
76 		pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb,  in fsl_ddr_board_options()
77 		pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2,  in fsl_ddr_board_options()
78 		pbsp->wrlvl_ctl_3);  in fsl_ddr_board_options()
81 	 * Factors to consider for half-strength driver enable:  in fsl_ddr_board_options()
82 	 *	- number of DIMMs installed  in fsl_ddr_board_options()
84 	popts->half_strength_driver_enable = 0;  in fsl_ddr_board_options()
88 	popts->wrlvl_override = 1;  in fsl_ddr_board_options()
89 	popts->wrlvl_sample = 0xf;  in fsl_ddr_board_options()
94 	popts->rtt_override = 0;  in fsl_ddr_board_options()
97 	popts->zq_en = 1;  in fsl_ddr_board_options()
99 	/* DHC_EN =1, ODT = 75 Ohm */  in fsl_ddr_board_options()
100 	popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);  in fsl_ddr_board_options()
101 	popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);  in fsl_ddr_board_options()
103 	/* optimize cpo for erratum A-009942 */  in fsl_ddr_board_options()
104 	popts->cpo_sample = 0x64;  in fsl_ddr_board_options()
122 	gd->ram_size = dram_size;  in dram_init()