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/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dst,stm32mp1.txt38 0x1: division by 2
39 0x2: division by 4
40 0x3: division by 8
45 0x1: division by 2
46 0x2: division by 3
47 0x3: division by 4
62 0x0: bypass (division by 1)
63 0x1: division by 2
64 0x2: division by 3
65 0x3: division by 4
/openbmc/u-boot/include/
H A Dmpc85xx.h17 #define SCCR_DFBRG_MSK 0x00000003 /* Division by BRGCLK Mask */
20 #define SCCR_DFBRG00 0x00000000 /* BRGCLK division by 4 */
22 #define SCCR_DFBRG10 0x00000002 /* BRGCLK division by 64 */
23 #define SCCR_DFBRG11 0x00000003 /* BRGCLK division by 256 */
H A Dmpc8xx.h171 #define SCCR_DFSYNC00 0x00000000 /* SyncCLK division by 1 (normal op.) */
172 #define SCCR_DFSYNC01 0x00002000 /* SyncCLK division by 4 */
173 #define SCCR_DFSYNC10 0x00004000 /* SyncCLK division by 16 */
174 #define SCCR_DFSYNC11 0x00006000 /* SyncCLK division by 64 */
175 #define SCCR_DFBRG00 0x00000000 /* BRGCLK division by 1 (normal op.) */
176 #define SCCR_DFBRG01 0x00000800 /* BRGCLK division by 4 */
177 #define SCCR_DFBRG10 0x00001000 /* BRGCLK division by 16 */
178 #define SCCR_DFBRG11 0x00001800 /* BRGCLK division by 64 */
179 #define SCCR_DFNL000 0x00000000 /* Division by 2 (default = minimum) */
180 #define SCCR_DFNL001 0x00000100 /* Division by 4 */
[all …]
/openbmc/u-boot/arch/arm/lib/
H A Ddiv64.S31 * __do_div64: perform a division with 64-bit dividend and 32-bit divisor.
87 @ The division loop for needed upper bit positions.
103 @ The division loop for lower bit positions.
143 @ If possible, branch for another shift in the division loop.
150 8: @ Division by a power of 2: determine what that divisor order is
190 @ eq -> division by 1: obvious enough...
201 @ Division by 0:
H A Dlib1funcs.S3 * linux/arch/arm/lib/lib1funcs.S: Optimized ARM division routines
42 @ at the left end of each 4 bit nibbles in the division loop
51 @ division loop. Continue shifting until the divisor is
71 @ Division loop
138 @ division loop. Continue shifting until the divisor is
255 subs r2, r1, #1 @ division by 1 or -1 ?
H A Ddiv0.c7 /* Replacement (=dummy) for GNU/Linux division-by zero handler */
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_common.c14 /* ceiling division for positive integers */
31 /* round division of two positive integers to the nearest whole number */
40 printf("%s: error: division by zero\n", __func__); in round_div()
/openbmc/qemu/linux-user/alpha/
H A Dtarget_signal.h68 #define TARGET_GEN_INTDIV -2 /* integer division by zero */
70 #define TARGET_GEN_FLTDIV -4 /* fp division by zero */
75 #define TARGET_GEN_DECDIV -9 /* decimal division by zero */
/openbmc/qemu/target/s390x/tcg/
H A Dint_helper.c36 /* 64/32 -> 32 signed division */
57 /* 64/32 -> 32 unsigned division */
78 /* 64/64 -> 64 signed division */
88 /* 128 -> 64/64 unsigned division */
/openbmc/entity-manager/src/entity_manager/
H A Dexpression.cpp31 return Operation::division; in parseOperation()
53 case Operation::division: in evaluate()
H A Dexpression.hpp15 division, enumerator
/openbmc/openbmc/poky/meta/conf/machine/include/arm/
H A Dfeature-arm-idiv.inc1 TUNEVALID[idiv] = "ARM-state integer division instructions"
/openbmc/qemu/tests/tcg/alpha/system/
H A Dboot.S195 * Division routines that are normally in libc.
207 * Unsigned 64-bit division.
292 * Signed 64-bit division.
371 * Unsigned 32-bit division.
426 * Signed 32-bit division.
/openbmc/qemu/util/
H A Dhost-utils.c90 * Unsigned 128-by-64 division.
154 * Signed 128-by-64 division.
271 * Unsigned 256-by-128 division.
333 * Unsigned 256-by-128 division.
400 * Signed 256-by-128 division.
H A Dint128.c2 * 128-bit division and remainder for compilers not supporting __int128
32 * Division and remainder algorithms for 128-bit due to Stefan Kanthak,
/openbmc/openbmc/poky/meta/recipes-graphics/graphene/files/
H A Dfloat-div.patch27 message('Cross-building, assuming IEEE 754 division:', ieee754_float_div)
/openbmc/u-boot/doc/
H A DREADME.AX2518 - RVM for multiplication and division instructions
/openbmc/openbmc/poky/meta/recipes-core/glib-2.0/files/
H A D0001-meson.build-do-not-enable-pidfd-features-on-native-g.patch29 # Check for __uint128_t (gcc) by checking for 128-bit division
/openbmc/qemu/include/libdecnumber/
H A DdecContext.h205 #define DEC_Condition_DZ "Division by zero"
206 #define DEC_Condition_DI "Division impossible"
207 #define DEC_Condition_DU "Division undefined"
/openbmc/openbmc/poky/meta/files/common-licenses/
H A Dmpich210 …30) 252-5986; e-mail: lusk@mcs.anl.gov Mathematics and Computer Science Division Argonne National …
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/
H A DChassis.interface.yaml49 A logical division or portion of a physical chassis that
/openbmc/u-boot/arch/arc/cpu/arcv2/
H A Divt.S22 .word EV_DivZero /* 0x0B - Division by Zero */
/openbmc/u-boot/drivers/sound/
H A Dwm8994.h23 /* OPCLK is also configured with set_dai_sysclk, specify division*10 as rate. */
/openbmc/u-boot/lib/
H A Dldiv.c22 zero, never -infinity. Machine division and remainer may in ldiv()
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/sox/sox/
H A DCVE-2021-3643_CVE-2021-23210.patch4 Subject: [PATCH] voc: word width should never be 0 to avoid division by zero

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