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/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2017-2020 MediaTek Inc.
10 #include <dt-bindings/memory/mt2701-larb-port.h>
18 g3dsys: syscon@13000000 {
19 compatible = "mediatek,mt7623-g3dsys",
20 "mediatek,mt2701-g3dsys",
21 "syscon";
23 #clock-cells = <1>;
24 #reset-cells = <1>;
28 compatible = "mediatek,mt7623-mali", "arm,mali-450";
[all …]
H A Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dsamsung,mipi-video-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,mipi-video-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 For samsung,s5pv210-mipi-video-phy compatible PHYs the second cell in the
17 0 - MIPI CSIS 0,
18 1 - MIPI DSIM 0,
[all …]
/openbmc/linux/drivers/video/fbdev/
H A Dclps711x-fb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/mfd/syscon.h>
18 #include <linux/mfd/syscon/clps711x.h>
22 #define CLPS711X_FB_NAME "clps711x-fb"
36 struct regmap *syscon; member
47 struct clps711x_fb_info *cfb = info->par; in clps711x_fb_setcolreg()
50 if (regno >= BIT(info->var.bits_per_pixel)) in clps711x_fb_setcolreg()
51 return -EINVAL; in clps711x_fb_setcolreg()
57 if (cfb->cmap_invert) in clps711x_fb_setcolreg()
58 level = 0xf - level; in clps711x_fb_setcolreg()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos5433-mic.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos5433-mic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
24 const: samsung,exynos5433-mic
29 clock-names:
[all …]
H A Dsamsung,exynos-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,exynos4210-hdmi
19 - samsung,exynos4212-hdmi
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mm-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
15 peripherals located in the DISP domain of the SoC.
20 - const: fsl,imx8mm-disp-blk-ctrl
21 - const: syscon
[all …]
H A Dfsl,imx8mn-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MN DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
15 peripherals located in the DISP domain of the SoC.
20 - const: fsl,imx8mn-disp-blk-ctrl
21 - const: syscon
[all …]
H A Dfsl,imx93-media-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX93 Media blk-ctrl
10 - Peng Fan <peng.fan@nxp.com>
15 clocking, reset, and miscellaneous top-level controls for peripherals
21 - const: fsl,imx93-media-blk-ctrl
22 - const: syscon
27 '#power-domain-cells':
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsprd,sc9860-clk.txt2 ------------------------
5 - compatible: should contain the following compatible strings:
6 - "sprd,sc9860-pmu-gate"
7 - "sprd,sc9860-pll"
8 - "sprd,sc9860-ap-clk"
9 - "sprd,sc9860-aon-prediv"
10 - "sprd,sc9860-apahb-gate"
11 - "sprd,sc9860-aon-gate"
12 - "sprd,sc9860-aonsecure-clk"
13 - "sprd,sc9860-agcp-gate"
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/mt8173-clk.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/memory/mt8173-larb-port.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/power/mt8173-power.h>
13 #include <dt-bindings/reset/mt8173-resets.h>
14 #include <dt-bindings/gce/mt8173-gce.h>
15 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Dmt8192.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8192-clk.h>
9 #include <dt-bindings/gce/mt8192-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8192-larb-port.h>
13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 #include <dt-bindings/phy/phy.h>
15 #include <dt-bindings/power/mt8192-power.h>
[all …]
H A Dmt8186.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
6 /dts-v1/;
7 #include <dt-bindings/clock/mt8186-clk.h>
8 #include <dt-bindings/gce/mt8186-gce.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/memory/mt8186-memory-port.h>
12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
13 #include <dt-bindings/power/mt8186-power.h>
[all …]
H A Dmt8183.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/gce/mt8183-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8183-larb-port.h>
13 #include <dt-bindings/power/mt8183-power.h>
14 #include <dt-bindings/reset/mt8183-resets.h>
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/samsung/
H A Dsamsung,exynos-sysreg.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/samsung,exynos-sysreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - items:
16 - enum:
17 - samsung,exynos3-sysreg
18 - samsung,exynos4-sysreg
19 - samsung,exynos5-sysreg
[all …]
/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dsc9860.dtsi6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
53 compatible = "arm,cortex-a53";
55 enable-method = "psci";
56 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
[all …]
/openbmc/u-boot/drivers/video/rockchip/
H A Drk_vop.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include <syscon.h>
21 #include <dm/device-internal.h>
22 #include <dm/uclass-internal.h>
41 u32 hactive = edid->hactive.typ; in rkvop_enable()
42 u32 vactive = edid->vactive.typ; in rkvop_enable()
44 writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), in rkvop_enable()
45 &regs->win0_act_info); in rkvop_enable()
47 writel(V_DSP_XST(edid->hsync_len.typ + edid->hback_porch.typ) | in rkvop_enable()
48 V_DSP_YST(edid->vsync_len.typ + edid->vback_porch.typ), in rkvop_enable()
[all …]
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
[all …]
/openbmc/linux/drivers/phy/samsung/
H A Dphy-exynos-mipi-video.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/soc/samsung/exynos-regs-pmu.h>
19 #include <linux/mfd/syscon.h>
22 EXYNOS_MIPI_PHY_ID_NONE = -1,
56 .regmap_names = {"syscon"},
101 .regmap_names = {"syscon"},
160 "samsung,pmu-syscon",
161 "samsung,disp-sysreg",
162 "samsung,cam0-sysreg",
163 "samsung,cam1-sysreg"
[all …]
/openbmc/u-boot/drivers/video/tegra124/
H A Dsor.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2011-2013, NVIDIA Corporation.
11 #include <syscon.h>
15 #include <asm/arch-tegra/dc.h>
50 return readl((u32 *)sor->base + reg); in tegra_sor_readl()
56 writel(val, (u32 *)sor->base + reg); in tegra_sor_writel()
72 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dp_disable_tx_pu()
81 tegra_sor_write_field(sor, PR(sor->portnum), mask, pe_reg); in tegra_dp_set_pe_vs_pc()
82 tegra_sor_write_field(sor, DC(sor->portnum), mask, vs_reg); in tegra_dp_set_pe_vs_pc()
84 tegra_sor_write_field(sor, POSTCURSOR(sor->portnum), mask, in tegra_dp_set_pe_vs_pc()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dimx6sx.dtsi9 #include <dt-bindings/clock/imx6sx-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6sx-pinfunc.h"
55 #address-cells = <1>;
56 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
62 next-level-cache = <&L2>;
63 operating-points = <
[all …]
/openbmc/linux/drivers/gpu/drm/exynos/
H A Dexynos_drm_mic.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/mfd/syscon.h>
114 ret = regmap_read(mic->sysreg, DSD_CFG_MUX, &val); in mic_set_path()
116 DRM_DEV_ERROR(mic->dev, in mic_set_path()
122 if (mic->i80_mode) in mic_set_path()
131 ret = regmap_write(mic->sysreg, DSD_CFG_MUX, val); in mic_set_path()
133 DRM_DEV_ERROR(mic->dev, in mic_set_path()
142 writel(MIC_SW_RST, mic->reg + MIC_OP); in mic_sw_reset()
144 while (retry-- > 0) { in mic_sw_reset()
145 ret = readl(mic->reg + MIC_OP); in mic_sw_reset()
[all …]
/openbmc/linux/drivers/media/platform/mediatek/vcodec/decoder/
H A Dmtk_vcodec_dec_drv.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 #define MTK_VCODEC_DEC_NAME "mtk-vcodec-dec"
22 * enum mtk_vdec_format_types - Structure used to get supported
38 * enum mtk_vdec_hw_count - Supported hardware count
48 * enum mtk_vdec_hw_arch - Used to separate different hardware architecture
56 * struct vdec_pic_info - picture size information
65 * @reserved: align struct to 64-bit in order to adjust 32-bit and 64-bit os.
78 * struct mtk_vcodec_dec_pdata - compatible data for each IC
84 * @cap_to_disp: put capture buffer to disp list for lat and core arch
94 * @is_subdev_supported: whether support parent-node architecture(subdev)
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/fsl,imx93-power.h>
11 #include <dt-bindings/thermal/thermal.h>
13 #include "imx93-pinfunc.h"
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
[all …]

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