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/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c77 /* Array of Deskew results */ in ddr3_pbs_tx()
256 * Bit# Deskew <- Bit# Deskew - in ddr3_pbs_tx()
258 * Deskew For all bits (per PUP) in ddr3_pbs_tx()
304 …/* Bit# Deskew <- Bit# Deskew - last / first failing bit Deskew For all bits (per PUP) (minimize … in ddr3_pbs_tx()
356 * Bit# Deskew <- Bit# Deskew - last / first in ddr3_pbs_tx()
357 * failing bit Deskew For all bits (per PUP) in ddr3_pbs_tx()
767 * Bit# Deskew <- Bit# Deskew - in ddr3_pbs_rx()
769 * Deskew For all bits (per PUP) in ddr3_pbs_rx()
837 * Bit# Deskew <- Bit# Deskew - last / first in ddr3_pbs_rx()
838 * failing bit Deskew For all bits (per PUP) in ddr3_pbs_rx()
[all …]
H A Dddr3_write_leveling.c486 /* Write to control PUP to Control Deskew Regs */ in ddr3_write_leveling_hw_reg_dimm()
606 /* Write to control PUP to Control Deskew Regs */ in ddr3_write_leveling_hw_reg_dimm()
635 /* Write to control PUP to Control Deskew Regs */ in ddr3_write_leveling_hw_reg_dimm()
902 /* Write to control PUP to Control Deskew Regs */ in ddr3_write_leveling_sw_reg_dimm()
1101 /* Write to control PUP to Control Deskew Regs */ in ddr3_write_leveling_sw_reg_dimm()
H A Dddr3_init.c391 /* Power down deskew PLL */ in ddr3_init_main()
/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dti,tfp410.yaml24 ti,deskew:
81 ti,deskew: false
84 - ti,deskew
95 ti,deskew = <3>;
/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A Dddrphy-regs.h26 #define PHY_PIR_RDDSKW BIT(12) /* Read Data Bit Deskew */
27 #define PHY_PIR_WRDSKW BIT(13) /* Write Data Bit Deskew */
46 #define PHY_PGSR0_RDDONE BIT(8) /* Read Bit Deskew Done */
47 #define PHY_PGSR0_WDDONE BIT(9) /* Write Bit Deskew Done */
54 #define PHY_PGSR0_RDERR BIT(24) /* Read Bit Deskew Error */
55 #define PHY_PGSR0_WDERR BIT(25) /* Write Bit Deskew Error */
H A Dddrmphy-regs.h27 #define MPHY_PIR_RDDSKW BIT(12) /* Read Data Bit Deskew */
28 #define MPHY_PIR_WRDSKW BIT(13) /* Write Data Bit Deskew */
50 #define MPHY_PGSR0_RDDONE BIT(8) /* Read Bit Deskew Done */
51 #define MPHY_PGSR0_WDDONE BIT(9) /* Write Bit Deskew Done */
58 #define MPHY_PGSR0_RDERR BIT(24) /* Read Bit Deskew Error */
59 #define MPHY_PGSR0_WDERR BIT(25) /* Write Bit Deskew Error */
H A Dddrphy-training.c38 /* Specify the rank used during data bit deskew and eye centering */ in ddrphy_prepare_training()
82 "Read Bit Deskew",
88 "Write Bit Deskew",
H A Dumc-pxs2.c285 "Read Bit Deskew",
291 "Write Bit Deskew",
/openbmc/linux/drivers/gpu/drm/bridge/
H A Dti-tfp410.c273 u32 deskew = 0; in tfp410_parse_timings() local
327 of_property_read_u32(dvi->dev->of_node, "ti,deskew", &deskew); in tfp410_parse_timings()
328 if (deskew > 7) in tfp410_parse_timings()
331 timings->setup_time_ps = 1200 - 350 * ((s32)deskew - 4); in tfp410_parse_timings()
332 timings->hold_time_ps = max(0, 1300 + 350 * ((s32)deskew - 4)); in tfp410_parse_timings()
/openbmc/linux/drivers/net/ethernet/intel/ice/
H A Dice_ptp_consts.h285 156250000, /* 156.25 MHz deskew clock */
289 156250000, /* 156.25 MHz deskew clock */
310 195312500, /* 193.3125 MHz deskew clock */
314 195312500, /* 193.3125 MHz deskew clock */
H A Dice_ptp_hw.h79 * different link speeds, either the deskew marker for multi-lane link speeds
H A Dice_ptp_hw.c1596 * - Rx Deskew PAR/PCS markers
1600 * - Rx Deskew PAR/PCS markers
/openbmc/linux/drivers/comedi/drivers/
H A Dz8536.h137 #define Z8536_PAB_MODE_DTE BIT(0) /* Deskew Timer Enabled */
156 #define Z8536_PAB_HANDSHAKE_DESKEW(x) ((x) << 0)/* Deskew Time */
157 #define Z8536_PAB_HANDSHAKE_DESKEW_MASK (3 << 0)/* Deskew Time mask */
/openbmc/u-boot/drivers/ram/
H A Dk3-am654-ddrss.c378 debug("%s: Read Deskew adjustment\n", __func__); in rest_training()
383 printf("%s: ERROR: Read Deskew timedout\n", __func__); in rest_training()
385 printf("%s: ERROR: Read Deskew failed\n", __func__); in rest_training()
389 debug("%s: Write Deskew adjustment\n", __func__); in rest_training()
394 printf("%s: ERROR: Write Deskew timedout\n", __func__); in rest_training()
396 printf("%s: ERROR: Write Deskew failed\n", __func__); in rest_training()
/openbmc/u-boot/drivers/ddr/fsl/
H A Dfsl_ddr_gen4.c262 /* disable transmit bit deskew */ in fsl_ddr_set_memctl_regs()
396 temp32 &= ~DDR_TX_BD_DIS; /* Enable deskew */ in fsl_ddr_set_memctl_regs()
398 ddr_out32(&ddr->debug[1], 0x400); /* restart deskew */ in fsl_ddr_set_memctl_regs()
/openbmc/linux/kernel/gcov/
H A Dfs.c465 static const char *deskew(const char *basename) in deskew() function
497 node->links[i] = debugfs_create_symlink(deskew(basename), in add_links()
556 node->dentry = debugfs_create_file(deskew(node->name), 0600, in new_node()
/openbmc/linux/drivers/edac/
H A Dmce_amd.c493 "Deskew Error",
559 "Deskew Error",
568 "Deskew Abort Error",
/openbmc/u-boot/include/
H A Dfsl_ddr_sdram.h198 #define DDR_TX_BD_DIS (1 << 10) /* Transmit Bit Deskew Disable */
/openbmc/u-boot/drivers/ddr/altera/
H A Dsequencer.c2379 * rw_mgr_mem_calibrate_vfifo_center() - Per-bit deskew DQ and centering
2386 * Per-bit deskew DQ and centering.
2645 * Read per-bit deskew can be done on a per shadow register basis. in rw_mgr_mem_calibrate_dq_dqs_centering()
2680 * - we also do a per-bit deskew on the DQ lines.
2943 * Center all windows. Do per-bit-deskew to possibly increase size of
2975 /* Per-bit deskew. */ in rw_mgr_mem_calibrate_writes_center()
/openbmc/linux/drivers/scsi/
H A DNCR5380.c1101 * The initiator shall then wait at least two deskew delays and release in NCR5380_select()
1104 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ in NCR5380_select()
1124 * one deskew delay. in NCR5380_select()
1164 * No less than two deskew delays after the initiator detects the in NCR5380_select()
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am68-sk-base-board.dts147 ti,deskew = <0>;
H A Dk3-j721e-sk.dts264 ti,deskew = <0>;
/openbmc/linux/drivers/scsi/bfa/
H A Dbfi_ms.h292 __be32 deskew; member
H A Dbfa_svc.c3439 lattr->deskew = be32_to_cpu(tlink->deskew); in bfa_trunk_scn()
3451 bfa_trc(fcport->bfa, lattr->deskew); in bfa_trunk_scn()
3505 fcport->trunk.attr.link_attr[i].deskew = 0; in bfa_trunk_iocdisable()
/openbmc/linux/drivers/pci/controller/
H A Dpci-tegra.c625 * instability in deskew logic on lane-0. Increase the deskew in tegra_pcie_apply_sw_fixup()

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