| /openbmc/u-boot/drivers/i2c/ |
| H A D | i2c-gpio.c | 29 * udelay - delay [us] between GPIO toggle operations,
60 int delay, uchar bit) in i2c_gpio_write_bit() argument
63 udelay(delay); in i2c_gpio_write_bit()
65 udelay(delay); in i2c_gpio_write_bit()
67 udelay(2 * delay); in i2c_gpio_write_bit()
71 int delay) in i2c_gpio_read_bit() argument
76 udelay(delay); in i2c_gpio_read_bit()
78 udelay(delay); in i2c_gpio_read_bit()
80 udelay(2 * delay); in i2c_gpio_read_bit()
87 int delay) in i2c_gpio_send_start() argument
[all …]
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| /openbmc/u-boot/board/xes/xpedite537x/ |
| H A D | ddr.c | 22 * 1.) CPO (Read Capture Delay)
26 * 2.) WR_DATA_DELAY (Write Command to Data Strobe Delay)
31 * of 1/2 clock delay.
40 * ====== XPedite5370 DDR2-600 read delay calculations ======
46 * Minimum chip delay (Ch 0): 1.372ns
47 * Maximum chip delay (Ch 0): 2.914ns
48 * Minimum chip delay (Ch 1): 1.220ns
49 * Maximum chip delay (Ch 1): 2.595ns
53 * Minimum delay calc (Ch 0):
54 * clock prop - dram skew + min dqs prop delay + clk_adjust + min chip dly
[all …]
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| /openbmc/u-boot/drivers/net/phy/ |
| H A D | miiphybb.c | 100 .delay = bb_delay_wrap,
121 BB_MII_RELOCATE(bb_miiphy_buses[i].delay, gd->reloc_off); in bb_miiphy_init()
169 bus->delay(bus); in miiphy_pre()
171 bus->delay(bus); in miiphy_pre()
177 bus->delay(bus); in miiphy_pre()
179 bus->delay(bus); in miiphy_pre()
182 bus->delay(bus); in miiphy_pre()
184 bus->delay(bus); in miiphy_pre()
187 bus->delay(bus); in miiphy_pre()
189 bus->delay(bus); in miiphy_pre()
[all …]
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| /openbmc/u-boot/doc/device-tree-bindings/video/ |
| H A D | intel-gma.txt | 15 - intel,panel-power-cycle-delay : T4 time sequence (6 = 500ms)
18 - intel,panel-power-up-delay : T1+T2 time sequence
19 - intel,panel-power-down-delay : T3 time sequence
20 - intel,panel-power-backlight-on-delay : T5 time sequence
21 - intel,panel-power-backlight-off-delay : Tx time sequence
33 intel,panel-power-cycle-delay = <6>;
34 intel,panel-power-up-delay = <2000>;
35 intel,panel-power-down-delay = <500>;
36 intel,panel-power-backlight-on-delay = <2000>;
37 intel,panel-power-backlight-off-delay = <2000>;
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| /openbmc/u-boot/board/freescale/mpc8548cds/ |
| H A D | ddr.c | 36 * Factors to consider for write data delay: in fsl_ddr_board_options()
39 * 1 = 1/4 clock delay in fsl_ddr_board_options()
40 * 2 = 1/2 clock delay in fsl_ddr_board_options()
41 * 3 = 3/4 clock delay in fsl_ddr_board_options()
42 * 4 = 1 clock delay in fsl_ddr_board_options()
43 * 5 = 5/4 clock delay in fsl_ddr_board_options()
44 * 6 = 3/2 clock delay in fsl_ddr_board_options()
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| /openbmc/u-boot/board/socrates/ |
| H A D | ddr.c | 36 * Factors to consider for write data delay: in fsl_ddr_board_options()
39 * 1 = 1/4 clock delay in fsl_ddr_board_options()
40 * 2 = 1/2 clock delay in fsl_ddr_board_options()
41 * 3 = 3/4 clock delay in fsl_ddr_board_options()
42 * 4 = 1 clock delay in fsl_ddr_board_options()
43 * 5 = 5/4 clock delay in fsl_ddr_board_options()
44 * 6 = 3/2 clock delay in fsl_ddr_board_options()
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| /openbmc/u-boot/board/freescale/mpc8555cds/ |
| H A D | ddr.c | 36 * Factors to consider for write data delay: in fsl_ddr_board_options()
39 * 1 = 1/4 clock delay in fsl_ddr_board_options()
40 * 2 = 1/2 clock delay in fsl_ddr_board_options()
41 * 3 = 3/4 clock delay in fsl_ddr_board_options()
42 * 4 = 1 clock delay in fsl_ddr_board_options()
43 * 5 = 5/4 clock delay in fsl_ddr_board_options()
44 * 6 = 3/2 clock delay in fsl_ddr_board_options()
|
| /openbmc/u-boot/board/freescale/mpc8541cds/ |
| H A D | ddr.c | 36 * Factors to consider for write data delay: in fsl_ddr_board_options()
39 * 1 = 1/4 clock delay in fsl_ddr_board_options()
40 * 2 = 1/2 clock delay in fsl_ddr_board_options()
41 * 3 = 3/4 clock delay in fsl_ddr_board_options()
42 * 4 = 1 clock delay in fsl_ddr_board_options()
43 * 5 = 5/4 clock delay in fsl_ddr_board_options()
44 * 6 = 3/2 clock delay in fsl_ddr_board_options()
|
| /openbmc/u-boot/board/freescale/mpc8568mds/ |
| H A D | ddr.c | 36 * Factors to consider for write data delay: in fsl_ddr_board_options()
39 * 1 = 1/4 clock delay in fsl_ddr_board_options()
40 * 2 = 1/2 clock delay in fsl_ddr_board_options()
41 * 3 = 3/4 clock delay in fsl_ddr_board_options()
42 * 4 = 1 clock delay in fsl_ddr_board_options()
43 * 5 = 5/4 clock delay in fsl_ddr_board_options()
44 * 6 = 3/2 clock delay in fsl_ddr_board_options()
|
| /openbmc/u-boot/board/sbc8641d/ |
| H A D | ddr.c | 36 * Factors to consider for write data delay: in fsl_ddr_board_options()
39 * 1 = 1/4 clock delay in fsl_ddr_board_options()
40 * 2 = 1/2 clock delay in fsl_ddr_board_options()
41 * 3 = 3/4 clock delay in fsl_ddr_board_options()
42 * 4 = 1 clock delay in fsl_ddr_board_options()
43 * 5 = 5/4 clock delay in fsl_ddr_board_options()
44 * 6 = 3/2 clock delay in fsl_ddr_board_options()
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | exynos5422-odroidxu3.dts | 48 regulator-ramp-delay = <12000>;
56 regulator-ramp-delay = <12000>;
63 regulator-ramp-delay = <12000>;
70 regulator-ramp-delay = <12000>;
78 regulator-ramp-delay = <12000>;
86 regulator-ramp-delay = <12000>;
94 regulator-ramp-delay = <12000>;
102 regulator-ramp-delay = <12000>;
110 regulator-ramp-delay = <12000>;
118 regulator-ramp-delay = <12000>;
[all …]
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| H A D | rk3288-thermal.dtsi | 11 polling-delay-passive = <1000>; /* milliseconds */
12 polling-delay = <5000>; /* milliseconds */
20 polling-delay-passive = <100>; /* milliseconds */
21 polling-delay = <5000>; /* milliseconds */
60 polling-delay-passive = <100>; /* milliseconds */
61 polling-delay = <5000>; /* milliseconds */
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| /openbmc/u-boot/board/freescale/mpc8544ds/ |
| H A D | ddr.c | 36 * Factors to consider for write data delay: in fsl_ddr_board_options()
39 * 1 = 1/4 clock delay in fsl_ddr_board_options()
40 * 2 = 1/2 clock delay in fsl_ddr_board_options()
41 * 3 = 3/4 clock delay in fsl_ddr_board_options()
42 * 4 = 1 clock delay in fsl_ddr_board_options()
43 * 5 = 5/4 clock delay in fsl_ddr_board_options()
44 * 6 = 3/2 clock delay in fsl_ddr_board_options()
|
| /openbmc/u-boot/board/freescale/mpc8610hpcd/ |
| H A D | ddr.c | 36 * Factors to consider for write data delay: in fsl_ddr_board_options()
39 * 1 = 1/4 clock delay in fsl_ddr_board_options()
40 * 2 = 1/2 clock delay in fsl_ddr_board_options()
41 * 3 = 3/4 clock delay in fsl_ddr_board_options()
42 * 4 = 1 clock delay in fsl_ddr_board_options()
43 * 5 = 5/4 clock delay in fsl_ddr_board_options()
44 * 6 = 3/2 clock delay in fsl_ddr_board_options()
|
| /openbmc/u-boot/board/freescale/mpc8536ds/ |
| H A D | ddr.c | 36 * Factors to consider for write data delay: in fsl_ddr_board_options()
39 * 1 = 1/4 clock delay in fsl_ddr_board_options()
40 * 2 = 1/2 clock delay in fsl_ddr_board_options()
41 * 3 = 3/4 clock delay in fsl_ddr_board_options()
42 * 4 = 1 clock delay in fsl_ddr_board_options()
43 * 5 = 5/4 clock delay in fsl_ddr_board_options()
44 * 6 = 3/2 clock delay in fsl_ddr_board_options()
|
| /openbmc/u-boot/board/freescale/mpc8569mds/ |
| H A D | ddr.c | 36 * Factors to consider for write data delay: in fsl_ddr_board_options()
39 * 1 = 1/4 clock delay in fsl_ddr_board_options()
40 * 2 = 1/2 clock delay in fsl_ddr_board_options()
41 * 3 = 3/4 clock delay in fsl_ddr_board_options()
42 * 4 = 1 clock delay in fsl_ddr_board_options()
43 * 5 = 5/4 clock delay in fsl_ddr_board_options()
44 * 6 = 3/2 clock delay in fsl_ddr_board_options()
|
| /openbmc/u-boot/doc/ |
| H A D | README.bootmenu | 23 bootmenu_delay=<delay>
26 <delay> is the autoboot delay in seconds, after which the first
40 First (optional) argument of the "bootmenu" command is a delay specifier
41 and it overrides the delay value defined by "bootmenu_delay" environment
43 the argument of the "bootmenu" command is not specified, the default delay
44 will be CONFIG_BOOTDELAY. If delay is 0, no menu entries will be shown on
46 be called immediately. If delay is less then 0, bootmenu will be shown and
60 bootmenu 20 # Run bootmenu with autoboot delay 20s
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| /openbmc/u-boot/cmd/ |
| H A D | bootmenu.c | 34 int delay; /* delay for autoboot */ member
85 if (menu->delay > 0) { in bootmenu_autoboot_loop()
87 printf(" Hit any key to stop autoboot: %2d ", menu->delay); in bootmenu_autoboot_loop()
90 while (menu->delay > 0) { in bootmenu_autoboot_loop()
98 menu->delay = -1; in bootmenu_autoboot_loop()
117 if (menu->delay < 0) in bootmenu_autoboot_loop()
120 --menu->delay; in bootmenu_autoboot_loop()
121 printf("\b\b\b%2d ", menu->delay); in bootmenu_autoboot_loop()
127 if (menu->delay == 0) in bootmenu_autoboot_loop()
198 if (menu->delay >= 0) { in bootmenu_choice_entry()
[all …]
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| H A D | misc.c | 18 ulong delay; in do_sleep() local
24 delay = simple_strtoul(argv[1], NULL, 10) * CONFIG_SYS_HZ; in do_sleep()
40 delay += mdelay; in do_sleep()
42 while (get_timer(start) < delay) { in do_sleep()
54 "delay execution for some time",
56 " - delay execution for N seconds (N is _decimal_ and can be\n"
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| /openbmc/u-boot/board/xes/xpedite520x/ |
| H A D | ddr.c | 51 * Factors to consider for write data delay: in fsl_ddr_board_options()
54 * 1 = 1/4 clock delay in fsl_ddr_board_options()
55 * 2 = 1/2 clock delay in fsl_ddr_board_options()
56 * 3 = 3/4 clock delay in fsl_ddr_board_options()
57 * 4 = 1 clock delay in fsl_ddr_board_options()
58 * 5 = 5/4 clock delay in fsl_ddr_board_options()
59 * 6 = 3/2 clock delay in fsl_ddr_board_options()
|
| /openbmc/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.h | 176 unsigned char byte_25; /* min ras to cas delay time (t rcd min), mtb */
177 unsigned char byte_26; /* min row precharge delay time (t rp min), mtb */
185 unsigned char byte_28; /* min active to precharge delay time (t ras min), l-s-byte, mtb */
186 unsigned char byte_29; /* min active to active/refresh delay time (t rc min), l-s-byte, mtb */
187 unsigned char byte_30; /* min refresh recovery delay time (t rfc1 min), l-s-byte, mtb */
188 unsigned char byte_31; /* min refresh recovery delay time (t rfc1 min), m-s-byte, mtb */
189 unsigned char byte_32; /* min refresh recovery delay time (t rfc2 min), l-s-byte, mtb */
190 unsigned char byte_33; /* min refresh recovery delay time (t rfc2 min), m-s-byte, mtb */
191 unsigned char byte_34; /* min refresh recovery delay time (t rfc4 min), l-s-byte, mtb */
192 unsigned char byte_35; /* min refresh recovery delay time (t rfc4 min), m-s-byte, mtb */
[all …]
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| /openbmc/u-boot/doc/device-tree-bindings/net/ |
| H A D | ti,dp83867.txt | 5 - ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
7 - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
25 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
26 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>;
|
| /openbmc/phosphor-fan-presence/docs/control/ |
| H A D | zones.md | 39 This throttles fan increases to the specified delay.
41 The delay, in seconds, between fan target increases, when an action such as
44 current target, this new target is set when the delay expires.
53 This throttles fan decreases to the specified delay.
55 The delay, in seconds, between fan target decreases, when an action such as
58 lower than the current target, this new target is set when the delay expires.
|
| /openbmc/u-boot/drivers/fpga/ |
| H A D | lattice.c | 41 * Users must implement a delay to observe a_usTimeDelay, where
46 * a_usTimeDelay = 0x0001 = 1 microsecond delay.
47 * a_usTimeDelay = 0x8001 = 1 millisecond delay.
49 * This subroutine is called upon to provide a delay from 1 millisecond to a few
52 * bits integer, this function is restricted to produce a delay to 64000
54 * to this function a delay time > those maximum number. If it needs more than
55 * those maximum, the VME file will launch the delay function several times to
56 * realize a larger delay time cummulatively.
57 * It is perfectly alright to provide a longer delay than required. It is not
58 * acceptable if the delay is shorter.
[all …]
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| /openbmc/openbmc/meta-security/recipes-core/initrdscripts/initramfs-framework-dm/ |
| H A D | dmverity | 16 delay=${bootparam_rootdelay:-1}
22 if [ $(( $C * $delay )) -gt $timeout ]; then
26 debug "Sleeping for $delay second(s) to wait for root data to settle..."
27 sleep $delay
48 if [ $(( $C * $delay )) -gt $timeout ]; then
75 debug "Sleeping for $delay second(s) to wait root to settle..."
76 sleep $delay
|