decode (full) in projects: openbmc - OpenGrok search results

Searched full:decode (Results 1 – 25 of 1627) sorted by relevance

/openbmc/qemu/tests/decode/
H A D	meson.build	`2 'err_argset1.decode', 3 'err_argset2.decode', 4 'err_field1.decode', 5 'err_field2.decode', 6 'err_field3.decode', 7 'err_field4.decode', 8 'err_field5.decode', 9 'err_field6.decode', 10 'err_field7.decode', 11 'err_field8.decode', [all …]`
/openbmc/qemu/target/i386/hvf/
H A D	x86_emu.c	51 #define EXEC_2OP_FLAGS_CMD(env, decode, cmd, FLAGS_FUNC, save_res) \ argument 53 fetch_operands(env, decode, 2, true, true, false); \ 54 switch (decode->operand_size) { \ 57 uint8_t v1 = (uint8_t)decode->op[0].val; \ 58 uint8_t v2 = (uint8_t)decode->op[1].val; \ 61 write_val_ext(env, decode->op[0].ptr, diff, 1); \ 68 uint16_t v1 = (uint16_t)decode->op[0].val; \ 69 uint16_t v2 = (uint16_t)decode->op[1].val; \ 72 write_val_ext(env, decode->op[0].ptr, diff, 2); \ 79 uint32_t v1 = (uint32_t)decode->op[0].val; \ [all …]
H A D	x86_decode.c	29 static void decode_invalid(CPUX86State env, struct x86_decode decode) in decode_invalid() argument 31 printf("%llx: failed to decode instruction ", env->eip); in decode_invalid() 32 for (int i = 0; i < decode->opcode_len; i++) { in decode_invalid() 33 printf("%x ", decode->opcode[i]); in decode_invalid() 61 static inline uint64_t decode_bytes(CPUX86State env, struct x86_decode decode, in decode_bytes() argument 76 target_ulong va = linear_rip(env_cpu(env), env->eip) + decode->len; in decode_bytes() 78 decode->len += size; in decode_bytes() 83 static inline uint8_t decode_byte(CPUX86State env, struct x86_decode decode) in decode_byte() argument 85 return (uint8_t)decode_bytes(env, decode, 1); in decode_byte() 88 static inline uint16_t decode_word(CPUX86State env, struct x86_decode decode) in decode_word() argument [all …]
/openbmc/qemu/target/i386/tcg/
H A D	emit.c.inc	68 static void gen_JMP_m(DisasContext s, X86DecodedInsn decode); 69 static void gen_JMP(DisasContext s, X86DecodedInsn decode); 81 static void gen_lea_modrm(DisasContext s, X86DecodedInsn decode) 83 AddressParts mem = &decode->mem; 86 ea = gen_lea_modrm_1(s, mem, decode->e.vex_class == 12); 87 if (decode->e.special == X86_SPECIAL_BitTest) { 88 MemOp ot = decode->op[1].ot; 90 int opn = decode->op[2].n; 94 assert(decode->op[2].unit == X86_OP_INT && decode->op[2].ot != MO_8); 237 static bool sse_needs_alignment(DisasContext s, X86DecodedInsn decode, MemOp ot) [all …]
/openbmc/qemu/target/arm/tcg/
H A D	meson.build	2 decodetree.process('a64.decode', extra_args: ['--static-decode=disas_a64']), 3 decodetree.process('sve.decode', extra_args: '--decode=disas_sve'), 4 decodetree.process('sme.decode', extra_args: '--decode=disas_sme'), 5 decodetree.process('sme-fa64.decode', extra_args: '--static-decode=disas_sme_fa64'), 9 decodetree.process('neon-shared.decode', extra_args: '--decode=disas_neon_shared'), 10 decodetree.process('neon-dp.decode', extra_args: '--decode=disas_neon_dp'), 11 decodetree.process('neon-ls.decode', extra_args: '--decode=disas_neon_ls'), 12 decodetree.process('vfp.decode', extra_args: '--decode=disas_vfp'), 13 decodetree.process('vfp-uncond.decode', extra_args: '--decode=disas_vfp_uncond'), 14 decodetree.process('m-nocp.decode', extra_args: '--decode=disas_m_nocp'), [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A D	frontend.json	10 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 13 …Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. These cycles do not include uops ro… 42 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops", 46 …he number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… 51 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop", 55 … the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… 64 …Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also m… 73 …Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also m… 78 …ption": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream… 82 …ycles during which uops are being delivered to Instruction Decode Queue (IDQ) from the Decode Stre… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A D	frontend.json	10 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 13 …Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. These cycles do not include uops ro… 42 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops", 46 …he number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… 51 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop", 55 … the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… 64 …Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also m… 73 …Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also m… 78 …ption": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream… 82 …ycles during which uops are being delivered to Instruction Decode Queue (IDQ) from the Decode Stre… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwell/
H A D	frontend.json	10 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 13 …Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. These cycles do not include uops ro… 42 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops", 46 …he number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… 51 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop", 55 … the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… 64 …Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also m… 73 …Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also m… 78 …ption": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream… 82 …ycles during which uops are being delivered to Instruction Decode Queue (IDQ) from the Decode Stre… [all …]
/openbmc/qemu/target/mips/tcg/
H A D	meson.build	2 decodetree.process('rel6.decode', extra_args: ['--decode=decode_isa_rel6']), 3 decodetree.process('msa.decode', extra_args: '--decode=decode_ase_msa'), 4 decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'), 5 decodetree.process('vr54xx.decode', extra_args: '--decode=decode_ext_vr54xx'), 6 decodetree.process('octeon.decode', extra_args: '--decode=decode_ext_octeon'), 7 decodetree.process('lcsr.decode', extra_args: '--decode=decode_ase_lcsr'), 8 decodetree.process('godson2.decode', extra_args: ['--static-decode=decode_godson2']), 9 decodetree.process('loong-ext.decode', extra_args: ['--static-decode=decode_loong_ext']),
/openbmc/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A D	frontend.json	13 "EventName": "DECODE.LCP", 19 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches", 22 …event counts the number of the Decode Stream Buffer (DSB)-to-MITE switches including all misses be… 27 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 30 …Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. These cycles do not include uops ro… 41 …"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. … 52 …ption": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e.… 237 …de line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at … 270 …"BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops [This event is alias t… 274 … the number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/skylake/
H A D	frontend.json	13 "EventName": "DECODE.LCP", 19 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches", 22 …event counts the number of the Decode Stream Buffer (DSB)-to-MITE switches including all misses be… 27 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 30 …Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. These cycles do not include uops ro… 41 …"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. … 52 …ption": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e.… 237 …de line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at … 270 …"BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops [This event is alias t… 274 … the number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A D	frontend.json	13 "EventName": "DECODE.LCP", 19 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches", 22 …event counts the number of the Decode Stream Buffer (DSB)-to-MITE switches including all misses be… 27 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 30 …Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. These cycles do not include uops ro… 41 …"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. … 52 …ption": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e.… 237 …de line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at … 270 …"BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops [This event is alias t… 274 … the number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A D	frontend.json	11 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches", 19 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles", 27 …"BriefDescription": "Cycles when Decode Stream Buffer (DSB) fill encounter more than 3 Decode Stre… 59 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops", 68 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop", 95 …ption": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream… 99 …ption": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream… 104 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 112 "BriefDescription": "Instruction Decode Queue (IDQ) empty cycles", 120 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A D	frontend.json	11 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches", 19 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles", 27 …"BriefDescription": "Cycles when Decode Stream Buffer (DSB) fill encounter more than 3 Decode Stre… 59 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops", 68 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop", 95 …ption": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream… 99 …ption": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream… 104 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 112 "BriefDescription": "Instruction Decode Queue (IDQ) empty cycles", 120 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A D	frontend.json	10 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches.", 17 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 20 …ded Stream Buffer (DSB), which holds decoded instructions, to the legacy decode pipeline. It excl… 25 …"BriefDescription": "Cases of cancelling valid Decode Stream Buffer (DSB) fill not because of exce… 32 …"BriefDescription": "Cycles when Decode Stream Buffer (DSB) fill encounter more than 3 Decode Stre… 61 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops.", 69 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop.", 93 …ption": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream… 101 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 108 "BriefDescription": "Instruction Decode Queue (IDQ) empty cycles.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/sandybridge/
H A D	frontend.json	10 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches.", 17 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 20 …ded Stream Buffer (DSB), which holds decoded instructions, to the legacy decode pipeline. It excl… 25 …"BriefDescription": "Cases of cancelling valid Decode Stream Buffer (DSB) fill not because of exce… 32 …"BriefDescription": "Cycles when Decode Stream Buffer (DSB) fill encounter more than 3 Decode Stre… 61 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops.", 69 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop.", 93 …ption": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream… 101 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 108 "BriefDescription": "Instruction Decode Queue (IDQ) empty cycles.", [all …]
/openbmc/linux/tools/power/cpupower/debug/i386/
H A D	Makefile	`15 $(OUTPUT)centrino-decode: centrino-decode.c 16 $(CC) $(CFLAGS) -o $@ centrino-decode.c 24 $(OUTPUT)powernow-k8-decode: powernow-k8-decode.c 25 $(CC) $(CFLAGS) -o $@ powernow-k8-decode.c 27 all: $(OUTPUT)centrino-decode $(OUTPUT)dump_psb $(OUTPUT)intel_gsic $(OUTPUT)powernow-k8-decode 30 rm -rf $(OUTPUT)centrino-decode 33 rm -rf $(OUTPUT)powernow-k8-decode 37 $(INSTALL) $(OUTPUT)centrino-decode $(DESTDIR)${bindir} 38 $(INSTALL) $(OUTPUT)powernow-k8-decode $(DESTDIR)${bindir}`
/openbmc/linux/tools/power/cpupower/debug/x86_64/
H A D	Makefile	`15 $(OUTPUT)centrino-decode: ../i386/centrino-decode.c 18 $(OUTPUT)powernow-k8-decode: ../i386/powernow-k8-decode.c 21 all: $(OUTPUT)centrino-decode $(OUTPUT)powernow-k8-decode 24 rm -rf $(OUTPUT)centrino-decode $(OUTPUT)powernow-k8-decode 28 $(INSTALL) $(OUTPUT)centrino-decode $(DESTDIR)${bindir} 29 $(INSTALL) $(OUTPUT)powernow-k8-decode $(DESTDIR)${bindir}`
/openbmc/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A D	frontend.json	11 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 47 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops", 56 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop", 83 …ption": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream… 91 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 99 "BriefDescription": "Instruction Decode Queue (IDQ) empty cycles", 108 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path", 116 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from M… 124 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path", 132 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while … [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/haswell/
H A D	frontend.json	11 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 47 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops", 56 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop", 83 …ption": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream… 91 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 99 "BriefDescription": "Instruction Decode Queue (IDQ) empty cycles", 108 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path", 116 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from M… 124 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path", 132 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while … [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A D	frontend.json	13 "EventName": "DECODE.LCP", 21 "EventName": "DECODE.MS_BUSY", 29 …n": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instr… 40 …"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. … 51 …ption": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e.… 244 …re a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at … 257 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop", 261 …ts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… 270 …Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uo… 275 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	frontend.json	13 "EventName": "DECODE.LCP", 19 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.", 24 …"PublicDescription": "Counts the number of Decode Stream Buffer (DSB a.k.a. Uop Cache)-to-MITE spe… 32 …n": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instr… 43 …"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. … 54 …ption": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e.… 227 …de line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at … 259 …de line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at … 272 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop", 276 …ts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	frontend.json	13 "EventName": "DECODE.LCP", 19 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.", 24 …"PublicDescription": "Counts the number of Decode Stream Buffer (DSB a.k.a. Uop Cache)-to-MITE spe… 32 …n": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instr… 43 …"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. … 54 …ption": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e.… 227 …de line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at … 259 …de line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at … 272 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop", 276 …ts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/icelake/
H A D	frontend.json	13 "EventName": "DECODE.LCP", 19 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.", 24 …"PublicDescription": "Counts the number of Decode Stream Buffer (DSB a.k.a. Uop Cache)-to-MITE spe… 32 …n": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instr… 43 …"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. … 54 …ption": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e.… 227 …de line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at … 259 …de line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at … 272 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop", 276 …ts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stre… [all …]
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A D	tzpc.h	12 u32 decport0_status; /* 0x04 Status of decode protection port 0 / 13 u32 decport0_set; / 0x08 Set decode protection port 0 / 14 u32 decport0_clear; / 0x0c Clear decode protection port 0 / 16 u32 decport1_status; / 0x10 Status of decode protection port 1 / 17 u32 decport1_set; / 0x14 Set decode protection port 1 / 18 u32 decport1_clear; / 0x18 Clear decode protection port 1 / 19 u32 decport2_status; / 0x1c Status of decode protection port 2 / 20 u32 decport2_set; / 0x20 Set decode protection port 2 / 21 u32 decport2_clear; / 0x24 Clear decode protection port 2 */

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