Lines Matching full:decode

68 static void gen_JMP_m(DisasContext *s, X86DecodedInsn *decode);
69 static void gen_JMP(DisasContext *s, X86DecodedInsn *decode);
81 static void gen_lea_modrm(DisasContext *s, X86DecodedInsn *decode)
83 AddressParts *mem = &decode->mem;
86 ea = gen_lea_modrm_1(s, *mem, decode->e.vex_class == 12);
87 if (decode->e.special == X86_SPECIAL_BitTest) {
88 MemOp ot = decode->op[1].ot;
90 int opn = decode->op[2].n;
94 assert(decode->op[2].unit == X86_OP_INT && decode->op[2].ot != MO_8);
237 static bool sse_needs_alignment(DisasContext *s, X86DecodedInsn *decode, MemOp ot)
239 switch (decode->e.vex_class) {
243 decode->e.vex_special == X86_VEX_SSEUnaligned) {
256 static void gen_load(DisasContext *s, X86DecodedInsn *decode, int opn, TCGv v)
258 X86DecodedOp *op = &decode->op[opn];
283 if (v == s->T0 && decode->e.special == X86_SPECIAL_SExtT0) {
290 if (v == s->T0 && decode->e.special == X86_SPECIAL_SExtT0) {
297 (decode->e.special == X86_SPECIAL_SExtT0 ||
298 decode->e.special == X86_SPECIAL_ZExtT0)) {
299 if (decode->e.special == X86_SPECIAL_SExtT0) {
321 bool aligned = sse_needs_alignment(s, decode, op->ot);
331 static TCGv_ptr op_ptr(X86DecodedInsn *decode, int opn)
333 X86DecodedOp *op = &decode->op[opn];
346 #define OP_PTR0 op_ptr(decode, 0)
347 #define OP_PTR1 op_ptr(decode, 1)
348 #define OP_PTR2 op_ptr(decode, 2)
350 static void gen_writeback(DisasContext *s, X86DecodedInsn *decode, int opn, TCGv v)
352 X86DecodedOp *op = &decode->op[opn];
396 static inline int vector_len(DisasContext *s, X86DecodedInsn *decode)
398 if (decode->e.special == X86_SPECIAL_MMX &&
405 static void prepare_update1_cc(X86DecodedInsn *decode, DisasContext *s, CCOp op)
407 decode->cc_dst = s->T0;
408 decode->cc_op = op;
411 static void prepare_update2_cc(X86DecodedInsn *decode, DisasContext *s, CCOp op)
413 decode->cc_src = s->T1;
414 decode->cc_dst = s->T0;
415 decode->cc_op = op;
418 static void prepare_update_cc_incdec(X86DecodedInsn *decode, DisasContext *s, CCOp op)
421 prepare_update2_cc(decode, s, op);
424 static void prepare_update3_cc(X86DecodedInsn *decode, DisasContext *s, CCOp op, TCGv reg)
426 decode->cc_src2 = reg;
427 decode->cc_src = s->T1;
428 decode->cc_dst = s->T0;
429 decode->cc_op = op;
432 /* Set up decode->cc_* to modify CF while keeping other flags unchanged. */
433 static void prepare_update_cf(X86DecodedInsn *decode, DisasContext *s, TCGv cf)
438 decode->cc_src2 = cpu_cc_src2;
439 decode->cc_src = cpu_cc_src;
440 decode->cc_op = CC_OP_ADCOX;
445 decode->cc_src = cpu_cc_src;
446 decode->cc_op = CC_OP_ADCX;
450 decode->cc_src = tcg_temp_new();
451 gen_mov_eflags(s, decode->cc_src);
452 decode->cc_op = CC_OP_ADCX;
455 decode->cc_dst = cf;
458 static void gen_store_sse(DisasContext *s, X86DecodedInsn *decode, int src_ofs)
460 MemOp ot = decode->op[0].ot;
461 int vec_len = vector_len(s, decode);
462 bool aligned = sse_needs_alignment(s, decode, ot);
464 if (!decode->op[0].has_ea) {
465 tcg_gen_gvec_mov(MO_64, decode->op[0].offset, src_ofs, vec_len, vec_len);
517 static void gen_3dnow(DisasContext *s, X86DecodedInsn *decode)
519 uint8_t b = decode->immediate;
537 tcg_gen_ld_i64(s->tmp1_i64, tcg_env, decode->op[1].offset);
538 tcg_gen_st_i64(s->tmp1_i64, tcg_env, decode->op[0].offset);
550 static inline void gen_unary_fp_sse(DisasContext *s, X86DecodedInsn *decode,
575 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
577 gen_unary_fp_sse(s, decode, \
593 static inline void gen_fp_sse(DisasContext *s, X86DecodedInsn *decode,
614 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
616 gen_fp_sse(s, decode, \
632 static void gen_##uname##Px(DisasContext *s, X86DecodedInsn *decode) \
645 static void gen_##uname##Sx(DisasContext *s, X86DecodedInsn *decode) \
678 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
681 gen_fp_sse(s, decode, \
695 static inline void gen_unary_fp32_sse(DisasContext *s, X86DecodedInsn *decode,
720 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
722 gen_unary_fp32_sse(s, decode, \
734 static inline void gen_horizontal_fp_sse(DisasContext *s, X86DecodedInsn *decode,
745 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
747 gen_horizontal_fp_sse(s, decode, \
755 static inline void gen_ternary_sse(DisasContext *s, X86DecodedInsn *decode,
766 static void gen_##uvname(DisasContext *s, X86DecodedInsn *decode) \
768 gen_ternary_sse(s, decode, (uint8_t)decode->immediate >> 4, \
771 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
773 gen_ternary_sse(s, decode, 0, \
780 static inline void gen_binary_imm_sse(DisasContext *s, X86DecodedInsn *decode,
783 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
792 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
794 gen_binary_imm_sse(s, decode, \
810 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
812 int vec_len = vector_len(s, decode); \
814 func(__VA_ARGS__, decode->op[0].offset, \
815 decode->op[2].offset, vec_len, vec_len); \
828 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
830 int vec_len = vector_len(s, decode); \
833 decode->op[0].offset, decode->op[1].offset, \
834 decode->op[2].offset, vec_len, vec_len); \
887 static inline void gen_binary_int_sse(DisasContext *s, X86DecodedInsn *decode,
890 assert(!!mmx == !!(decode->e.special == X86_SPECIAL_MMX));
908 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
910 gen_binary_int_sse(s, decode, \
957 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
959 gen_binary_int_sse(s, decode, \
982 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
995 static inline void gen_unary_int_sse(DisasContext *s, X86DecodedInsn *decode,
1006 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
1008 gen_unary_int_sse(s, decode, \
1040 static inline void gen_unary_imm_sse(DisasContext *s, X86DecodedInsn *decode,
1043 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
1052 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
1054 gen_unary_imm_sse(s, decode, \
1067 static inline void gen_unary_imm_fp_sse(DisasContext *s, X86DecodedInsn *decode,
1070 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
1079 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
1081 gen_unary_imm_fp_sse(s, decode, \
1089 static inline void gen_vexw_avx(DisasContext *s, X86DecodedInsn *decode,
1101 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
1103 gen_vexw_avx(s, decode, \
1113 static inline void gen_vsib_avx(DisasContext *s, X86DecodedInsn *decode,
1120 TCGv_i32 scale = tcg_constant_i32(decode->mem.scale);
1124 tcg_gen_addi_ptr(index, tcg_env, ZMM_OFFSET(decode->mem.index));
1132 int ymmh_ofs = vector_elem_offset(&decode->op[1], MO_128, 1);
1137 static void gen_##uname(DisasContext *s, X86DecodedInsn *decode) \
1139 gen_vsib_avx(s, decode, \
1146 static void gen_AAA(DisasContext *s, X86DecodedInsn *decode)
1153 static void gen_AAD(DisasContext *s, X86DecodedInsn *decode)
1156 prepare_update1_cc(decode, s, CC_OP_LOGICB);
1159 static void gen_AAM(DisasContext *s, X86DecodedInsn *decode)
1161 if (decode->immediate == 0) {
1165 prepare_update1_cc(decode, s, CC_OP_LOGICB);
1169 static void gen_AAS(DisasContext *s, X86DecodedInsn *decode)
1176 static void gen_ADC(DisasContext *s, X86DecodedInsn *decode)
1178 MemOp ot = decode->op[1].ot;
1190 prepare_update3_cc(decode, s, CC_OP_ADCB + ot, c_in);
1193 static void gen_ADCOX(DisasContext *s, X86DecodedInsn *decode, int cc_op)
1195 MemOp ot = decode->op[0].ot;
1197 TCGv *carry_out = (cc_op == CC_OP_ADCX ? &decode->cc_dst : &decode->cc_src2);
1200 decode->cc_op = cc_op;
1203 decode->cc_src = cpu_cc_src;
1212 decode->cc_op = CC_OP_ADCOX;
1213 if (carry_out == &decode->cc_dst) {
1214 decode->cc_src2 = cpu_cc_src2;
1216 decode->cc_dst = cpu_cc_dst;
1220 decode->cc_src = tcg_temp_new();
1221 gen_mov_eflags(s, decode->cc_src);
1227 tcg_gen_extract_tl(carry_in, decode->cc_src,
1250 static void gen_ADCX(DisasContext *s, X86DecodedInsn *decode)
1252 gen_ADCOX(s, decode, CC_OP_ADCX);
1255 static void gen_ADD(DisasContext *s, X86DecodedInsn *decode)
1257 MemOp ot = decode->op[1].ot;
1265 prepare_update2_cc(decode, s, CC_OP_ADDB + ot);
1268 static void gen_ADOX(DisasContext *s, X86DecodedInsn *decode)
1270 gen_ADCOX(s, decode, CC_OP_ADOX);
1273 static void gen_AND(DisasContext *s, X86DecodedInsn *decode)
1275 MemOp ot = decode->op[1].ot;
1283 prepare_update1_cc(decode, s, CC_OP_LOGICB + ot);
1286 static void gen_ANDN(DisasContext *s, X86DecodedInsn *decode)
1288 MemOp ot = decode->op[0].ot;
1291 prepare_update1_cc(decode, s, CC_OP_LOGICB + ot);
1294 static void gen_ARPL(DisasContext *s, X86DecodedInsn *decode)
1311 decode->cc_src = flags;
1312 decode->cc_op = CC_OP_EFLAGS;
1315 static void gen_BEXTR(DisasContext *s, X86DecodedInsn *decode)
1317 MemOp ot = decode->op[0].ot;
1340 prepare_update1_cc(decode, s, CC_OP_LOGICB + ot);
1343 static void gen_BLSI(DisasContext *s, X86DecodedInsn *decode)
1345 MemOp ot = decode->op[0].ot;
1350 prepare_update2_cc(decode, s, CC_OP_BLSIB + ot);
1353 static void gen_BLSMSK(DisasContext *s, X86DecodedInsn *decode)
1355 MemOp ot = decode->op[0].ot;
1360 prepare_update2_cc(decode, s, CC_OP_BMILGB + ot);
1363 static void gen_BLSR(DisasContext *s, X86DecodedInsn *decode)
1365 MemOp ot = decode->op[0].ot;
1370 prepare_update2_cc(decode, s, CC_OP_BMILGB + ot);
1373 static void gen_BOUND(DisasContext *s, X86DecodedInsn *decode)
1377 if (decode->op[1].ot == MO_16) {
1385 static void gen_BSF(DisasContext *s, X86DecodedInsn *decode)
1387 MemOp ot = decode->op[0].ot;
1390 decode->cc_dst = tcg_temp_new();
1391 decode->cc_op = CC_OP_LOGICB + ot;
1392 tcg_gen_mov_tl(decode->cc_dst, s->T0);
1404 static void gen_BSR(DisasContext *s, X86DecodedInsn *decode)
1406 MemOp ot = decode->op[0].ot;
1409 decode->cc_dst = tcg_temp_new();
1410 decode->cc_op = CC_OP_LOGICB + ot;
1411 tcg_gen_mov_tl(decode->cc_dst, s->T0);
1425 static void gen_BSWAP(DisasContext *s, X86DecodedInsn *decode)
1436 static TCGv gen_bt_mask(DisasContext *s, X86DecodedInsn *decode)
1438 MemOp ot = decode->op[1].ot;
1447 static void gen_bt_flags(DisasContext *s, X86DecodedInsn *decode, TCGv src, TCGv mask)
1459 prepare_update_cf(decode, s, cf);
1467 decode->cc_src = tcg_temp_new();
1468 decode->cc_dst = cpu_cc_dst;
1469 decode->cc_op = CC_OP_SARB + cc_op_size(s->cc_op);
1470 tcg_gen_shr_tl(decode->cc_src, src, s->T1);
1474 static void gen_BT(DisasContext *s, X86DecodedInsn *decode)
1476 TCGv mask = gen_bt_mask(s, decode);
1478 gen_bt_flags(s, decode, s->T0, mask);
1481 static void gen_BTC(DisasContext *s, X86DecodedInsn *decode)
1483 MemOp ot = decode->op[0].ot;
1485 TCGv mask = gen_bt_mask(s, decode);
1494 gen_bt_flags(s, decode, old, mask);
1497 static void gen_BTR(DisasContext *s, X86DecodedInsn *decode)
1499 MemOp ot = decode->op[0].ot;
1501 TCGv mask = gen_bt_mask(s, decode);
1512 gen_bt_flags(s, decode, old, mask);
1515 static void gen_BTS(DisasContext *s, X86DecodedInsn *decode)
1517 MemOp ot = decode->op[0].ot;
1519 TCGv mask = gen_bt_mask(s, decode);
1528 gen_bt_flags(s, decode, old, mask);
1531 static void gen_BZHI(DisasContext *s, X86DecodedInsn *decode)
1533 MemOp ot = decode->op[0].ot;
1548 prepare_update2_cc(decode, s, CC_OP_BMILGB + ot);
1551 static void gen_CALL(DisasContext *s, X86DecodedInsn *decode)
1554 gen_JMP(s, decode);
1557 static void gen_CALL_m(DisasContext *s, X86DecodedInsn *decode)
1560 gen_JMP_m(s, decode);
1563 static void gen_CALLF(DisasContext *s, X86DecodedInsn *decode)
1568 static void gen_CALLF_m(DisasContext *s, X86DecodedInsn *decode)
1570 MemOp ot = decode->op[1].ot;
1578 static void gen_CBW(DisasContext *s, X86DecodedInsn *decode)
1580 MemOp src_ot = decode->op[0].ot - 1;
1585 static void gen_CLC(DisasContext *s, X86DecodedInsn *decode)
1591 static void gen_CLD(DisasContext *s, X86DecodedInsn *decode)
1596 static void gen_CLI(DisasContext *s, X86DecodedInsn *decode)
1601 static void gen_CLTS(DisasContext *s, X86DecodedInsn *decode)
1608 static void gen_CMC(DisasContext *s, X86DecodedInsn *decode)
1614 static void gen_CMOVcc(DisasContext *s, X86DecodedInsn *decode)
1616 gen_cmovcc1(s, decode->b & 0xf, s->T0, s->T1);
1619 static void gen_CMPccXADD(DisasContext *s, X86DecodedInsn *decode)
1631 int jcc_op = (decode->b >> 1) & 7;
1644 if (decode->b & 1) {
1648 ot = decode->op[0].ot;
1662 tcg_gen_ext_tl(cmpv, cpu_regs[decode->op[1].n], ot_full);
1715 gen_writeback(s, decode, 1, s->cc_srcT);
1717 decode->cc_dst = s->T0;
1718 decode->cc_src = cmpv;
1719 decode->cc_op = CC_OP_SUBB + ot;
1722 static void gen_CMPS(DisasContext *s, X86DecodedInsn *decode)
1724 MemOp ot = decode->op[2].ot;
1732 static void gen_CMPXCHG(DisasContext *s, X86DecodedInsn *decode)
1734 MemOp ot = decode->op[2].ot;
1747 if (decode->op[0].has_ea) {
1766 dest = gen_op_deposit_reg_v(s, ot, decode->op[0].n, newv, newv);
1769 decode->op[0].unit = X86_OP_SKIP;
1778 decode->cc_dst = cmpv;
1779 decode->cc_src = oldv;
1780 decode->cc_op = CC_OP_SUBB + ot;
1783 static void gen_CMPXCHG16B(DisasContext *s, X86DecodedInsn *decode)
1828 static void gen_CMPXCHG8B(DisasContext *s, X86DecodedInsn *decode)
1879 static void gen_CPUID(DisasContext *s, X86DecodedInsn *decode)
1886 static void gen_CRC32(DisasContext *s, X86DecodedInsn *decode)
1888 MemOp ot = decode->op[2].ot;
1894 static void gen_CVTPI2Px(DisasContext *s, X86DecodedInsn *decode)
1904 static void gen_CVTPx2PI(DisasContext *s, X86DecodedInsn *decode)
1914 static void gen_CVTTPx2PI(DisasContext *s, X86DecodedInsn *decode)
1924 static void gen_CWD(DisasContext *s, X86DecodedInsn *decode)
1926 int shift = 8 << decode->op[0].ot;
1931 static void gen_DAA(DisasContext *s, X86DecodedInsn *decode)
1938 static void gen_DAS(DisasContext *s, X86DecodedInsn *decode)
1945 static void gen_DEC(DisasContext *s, X86DecodedInsn *decode)
1947 MemOp ot = decode->op[1].ot;
1956 prepare_update_cc_incdec(decode, s, CC_OP_DECB + ot);
1959 static void gen_DIV(DisasContext *s, X86DecodedInsn *decode)
1961 MemOp ot = decode->op[1].ot;
1982 static void gen_EMMS(DisasContext *s, X86DecodedInsn *decode)
1987 static void gen_ENTER(DisasContext *s, X86DecodedInsn *decode)
1989 gen_enter(s, decode->op[1].imm, decode->op[2].imm);
1992 static void gen_EXTRQ_i(DisasContext *s, X86DecodedInsn *decode)
1994 TCGv_i32 length = tcg_constant_i32(decode->immediate & 63);
1995 TCGv_i32 index = tcg_constant_i32((decode->immediate >> 8) & 63);
2000 static void gen_EXTRQ_r(DisasContext *s, X86DecodedInsn *decode)
2005 static void gen_FXRSTOR(DisasContext *s, X86DecodedInsn *decode)
2014 static void gen_FXSAVE(DisasContext *s, X86DecodedInsn *decode)
2023 static void gen_HLT(DisasContext *s, X86DecodedInsn *decode)
2033 static void gen_IDIV(DisasContext *s, X86DecodedInsn *decode)
2035 MemOp ot = decode->op[1].ot;
2056 static void gen_IMUL3(DisasContext *s, X86DecodedInsn *decode)
2058 MemOp ot = decode->op[0].ot;
2116 prepare_update2_cc(decode, s, CC_OP_MULB + ot);
2119 static void gen_IMUL(DisasContext *s, X86DecodedInsn *decode)
2121 MemOp ot = decode->op[1].ot;
2174 prepare_update2_cc(decode, s, CC_OP_MULB + ot);
2177 static void gen_IN(DisasContext *s, X86DecodedInsn *decode)
2179 MemOp ot = decode->op[0].ot;
2189 gen_writeback(s, decode, 0, s->T0);
2193 static void gen_INC(DisasContext *s, X86DecodedInsn *decode)
2195 MemOp ot = decode->op[1].ot;
2204 prepare_update_cc_incdec(decode, s, CC_OP_INCB + ot);
2207 static void gen_INS(DisasContext *s, X86DecodedInsn *decode)
2209 MemOp ot = decode->op[1].ot;
2227 static void gen_INSERTQ_i(DisasContext *s, X86DecodedInsn *decode)
2229 TCGv_i32 length = tcg_constant_i32(decode->immediate & 63);
2230 TCGv_i32 index = tcg_constant_i32((decode->immediate >> 8) & 63);
2235 static void gen_INSERTQ_r(DisasContext *s, X86DecodedInsn *decode)
2240 static void gen_INT(DisasContext *s, X86DecodedInsn *decode)
2242 gen_interrupt(s, decode->immediate);
2245 static void gen_INT1(DisasContext *s, X86DecodedInsn *decode)
2253 static void gen_INT3(DisasContext *s, X86DecodedInsn *decode)
2258 static void gen_INTO(DisasContext *s, X86DecodedInsn *decode)
2265 static void gen_IRET(DisasContext *s, X86DecodedInsn *decode)
2277 static void gen_Jcc(DisasContext *s, X86DecodedInsn *decode)
2280 gen_jcc(s, decode->b & 0xf, decode->immediate);
2283 static void gen_JCXZ(DisasContext *s, X86DecodedInsn *decode)
2289 gen_conditional_jump_labels(s, decode->immediate, NULL, taken);
2292 static void gen_JMP(DisasContext *s, X86DecodedInsn *decode)
2295 gen_jmp_rel(s, s->dflag, decode->immediate, 0);
2298 static void gen_JMP_m(DisasContext *s, X86DecodedInsn *decode)
2305 static void gen_JMPF(DisasContext *s, X86DecodedInsn *decode)
2310 static void gen_JMPF_m(DisasContext *s, X86DecodedInsn *decode)
2312 MemOp ot = decode->op[1].ot;
2320 static void gen_LAHF(DisasContext *s, X86DecodedInsn *decode)
2331 static void gen_LAR(DisasContext *s, X86DecodedInsn *decode)
2333 MemOp ot = decode->op[0].ot;
2342 decode->op[0].unit = X86_OP_SKIP;
2343 dest = gen_op_deposit_reg_v(s, ot, decode->op[0].n, result, result);
2348 static void gen_LDMXCSR(DisasContext *s, X86DecodedInsn *decode)
2354 static void gen_lxx_seg(DisasContext *s, X86DecodedInsn *decode, int seg)
2356 MemOp ot = decode->op[0].ot;
2366 static void gen_LDS(DisasContext *s, X86DecodedInsn *decode)
2368 gen_lxx_seg(s, decode, R_DS);
2371 static void gen_LEA(DisasContext *s, X86DecodedInsn *decode)
2373 TCGv ea = gen_lea_modrm_1(s, decode->mem, false);
2377 static void gen_LEAVE(DisasContext *s, X86DecodedInsn *decode)
2382 static void gen_LES(DisasContext *s, X86DecodedInsn *decode)
2384 gen_lxx_seg(s, decode, R_ES);
2387 static void gen_LFENCE(DisasContext *s, X86DecodedInsn *decode)
2392 static void gen_LFS(DisasContext *s, X86DecodedInsn *decode)
2394 gen_lxx_seg(s, decode, R_FS);
2397 static void gen_LGS(DisasContext *s, X86DecodedInsn *decode)
2399 gen_lxx_seg(s, decode, R_GS);
2402 static void gen_LODS(DisasContext *s, X86DecodedInsn *decode)
2404 MemOp ot = decode->op[1].ot;
2412 static void gen_LOOP(DisasContext *s, X86DecodedInsn *decode)
2419 gen_conditional_jump_labels(s, decode->immediate, NULL, taken);
2422 static void gen_LOOPE(DisasContext *s, X86DecodedInsn *decode)
2431 gen_conditional_jump_labels(s, decode->immediate, not_taken, taken);
2434 static void gen_LOOPNE(DisasContext *s, X86DecodedInsn *decode)
2443 gen_conditional_jump_labels(s, decode->immediate, not_taken, taken);
2446 static void gen_LSL(DisasContext *s, X86DecodedInsn *decode)
2448 MemOp ot = decode->op[0].ot;
2457 decode->op[0].unit = X86_OP_SKIP;
2458 dest = gen_op_deposit_reg_v(s, ot, decode->op[0].n, result, result);
2463 static void gen_LSS(DisasContext *s, X86DecodedInsn *decode)
2465 gen_lxx_seg(s, decode, R_SS);
2468 static void gen_LZCNT(DisasContext *s, X86DecodedInsn *decode)
2470 MemOp ot = decode->op[0].ot;
2473 decode->cc_src = tcg_temp_new();
2474 decode->cc_dst = s->T0;
2475 decode->cc_op = CC_OP_BMILGB + ot;
2476 tcg_gen_mov_tl(decode->cc_src, s->T0);
2486 static void gen_MFENCE(DisasContext *s, X86DecodedInsn *decode)
2491 static void gen_MOV(DisasContext *s, X86DecodedInsn *decode)
2497 static void gen_MASKMOV(DisasContext *s, X86DecodedInsn *decode)
2508 static void gen_MOVBE(DisasContext *s, X86DecodedInsn *decode)
2510 MemOp ot = decode->op[0].ot;
2513 if (decode->e.op0 == X86_TYPE_M) {
2520 static void gen_MOVD_from(DisasContext *s, X86DecodedInsn *decode)
2522 MemOp ot = decode->op[2].ot;
2527 tcg_gen_ld32u_tl(s->T0, tcg_env, decode->op[2].offset);
2531 tcg_gen_ld_tl(s->T0, tcg_env, decode->op[2].offset);
2538 static void gen_MOVD_to(DisasContext *s, X86DecodedInsn *decode)
2540 MemOp ot = decode->op[2].ot;
2541 int vec_len = vector_len(s, decode);
2542 int lo_ofs = vector_elem_offset(&decode->op[0], ot, 0);
2544 tcg_gen_gvec_dup_imm(MO_64, decode->op[0].offset, vec_len, vec_len, 0);
2560 static void gen_MOVDQ(DisasContext *s, X86DecodedInsn *decode)
2562 gen_store_sse(s, decode, decode->op[2].offset);
2565 static void gen_MOVMSK(DisasContext *s, X86DecodedInsn *decode)
2575 static void gen_MOVQ(DisasContext *s, X86DecodedInsn *decode)
2577 int vec_len = vector_len(s, decode);
2578 int lo_ofs = vector_elem_offset(&decode->op[0], MO_64, 0);
2580 tcg_gen_ld_i64(s->tmp1_i64, tcg_env, decode->op[2].offset);
2581 if (decode->op[0].has_ea) {
2592 tcg_gen_gvec_dup_imm(MO_64, decode->op[0].offset, vec_len, vec_len, 0);
2597 static void gen_MOVq_dq(DisasContext *s, X86DecodedInsn *decode)
2601 return gen_MOVQ(s, decode);
2604 static void gen_MOVS(DisasContext *s, X86DecodedInsn *decode)
2606 MemOp ot = decode->op[2].ot;
2614 static void gen_MUL(DisasContext *s, X86DecodedInsn *decode)
2616 MemOp ot = decode->op[1].ot;
2625 decode->cc_dst = s->T0;
2626 decode->cc_src = s->T1;
2636 decode->cc_dst = s->T0;
2637 decode->cc_src = s->T1;
2647 decode->cc_dst = cpu_regs[R_EAX];
2648 decode->cc_src = cpu_regs[R_EDX];
2654 decode->cc_dst = cpu_regs[R_EAX];
2655 decode->cc_src = cpu_regs[R_EDX];
2662 decode->cc_op = CC_OP_MULB + ot;
2665 static void gen_MULX(DisasContext *s, X86DecodedInsn *decode)
2667 MemOp ot = decode->op[0].ot;
2691 static void gen_NEG(DisasContext *s, X86DecodedInsn *decode)
2693 MemOp ot = decode->op[0].ot;
2712 decode->cc_dst = s->T0;
2713 decode->cc_src = oldv;
2715 decode->cc_op = CC_OP_SUBB + ot;
2718 static void gen_NOT(DisasContext *s, X86DecodedInsn *decode)
2720 MemOp ot = decode->op[0].ot;
2731 static void gen_OR(DisasContext *s, X86DecodedInsn *decode)
2733 MemOp ot = decode->op[1].ot;
2741 prepare_update1_cc(decode, s, CC_OP_LOGICB + ot);
2744 static void gen_OUT(DisasContext *s, X86DecodedInsn *decode)
2746 MemOp ot = decode->op[1].ot;
2761 static void gen_OUTS(DisasContext *s, X86DecodedInsn *decode)
2763 MemOp ot = decode->op[1].ot;
2780 static void gen_PALIGNR(DisasContext *s, X86DecodedInsn *decode)
2782 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
2792 static void gen_PANDN(DisasContext *s, X86DecodedInsn *decode)
2794 int vec_len = vector_len(s, decode);
2798 decode->op[0].offset, decode->op[2].offset,
2799 decode->op[1].offset, vec_len, vec_len);
2802 static void gen_PAUSE(DisasContext *s, X86DecodedInsn *decode)
2810 static void gen_PCMPESTRI(DisasContext *s, X86DecodedInsn *decode)
2812 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
2817 static void gen_PCMPESTRM(DisasContext *s, X86DecodedInsn *decode)
2819 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
2828 static void gen_PCMPISTRI(DisasContext *s, X86DecodedInsn *decode)
2830 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
2835 static void gen_PCMPISTRM(DisasContext *s, X86DecodedInsn *decode)
2837 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
2846 static void gen_PDEP(DisasContext *s, X86DecodedInsn *decode)
2851 static void gen_PEXT(DisasContext *s, X86DecodedInsn *decode)
2856 static inline void gen_pextr(DisasContext *s, X86DecodedInsn *decode, MemOp ot)
2858 int vec_len = vector_len(s, decode);
2860 int val = decode->immediate & mask;
2864 tcg_gen_ld8u_tl(s->T0, tcg_env, vector_elem_offset(&decode->op[1], ot, val));
2867 tcg_gen_ld16u_tl(s->T0, tcg_env, vector_elem_offset(&decode->op[1], ot, val));
2871 tcg_gen_ld32u_tl(s->T0, tcg_env, vector_elem_offset(&decode->op[1], ot, val));
2875 tcg_gen_ld_tl(s->T0, tcg_env, vector_elem_offset(&decode->op[1], ot, val));
2882 static void gen_PEXTRB(DisasContext *s, X86DecodedInsn *decode)
2884 gen_pextr(s, decode, MO_8);
2887 static void gen_PEXTRW(DisasContext *s, X86DecodedInsn *decode)
2889 gen_pextr(s, decode, MO_16);
2892 static void gen_PEXTR(DisasContext *s, X86DecodedInsn *decode)
2894 MemOp ot = decode->op[0].ot;
2895 gen_pextr(s, decode, ot);
2898 static inline void gen_pinsr(DisasContext *s, X86DecodedInsn *decode, MemOp ot)
2900 int vec_len = vector_len(s, decode);
2902 int val = decode->immediate & mask;
2904 if (decode->op[1].offset != decode->op[0].offset) {
2906 gen_store_sse(s, decode, decode->op[1].offset);
2911 tcg_gen_st8_tl(s->T1, tcg_env, vector_elem_offset(&decode->op[0], ot, val));
2914 tcg_gen_st16_tl(s->T1, tcg_env, vector_elem_offset(&decode->op[0], ot, val));
2918 tcg_gen_st32_tl(s->T1, tcg_env, vector_elem_offset(&decode->op[0], ot, val));
2922 tcg_gen_st_tl(s->T1, tcg_env, vector_elem_offset(&decode->op[0], ot, val));
2929 static void gen_PINSRB(DisasContext *s, X86DecodedInsn *decode)
2931 gen_pinsr(s, decode, MO_8);
2934 static void gen_PINSRW(DisasContext *s, X86DecodedInsn *decode)
2936 gen_pinsr(s, decode, MO_16);
2939 static void gen_PINSR(DisasContext *s, X86DecodedInsn *decode)
2941 gen_pinsr(s, decode, decode->op[2].ot);
2981 static void gen_PMOVMSKB(DisasContext *s, X86DecodedInsn *decode)
2991 MemOp ot = decode->op[2].ot;
2992 int vec_len = vector_len(s, decode);
2995 tcg_gen_gvec_2(offsetof(CPUX86State, xmm_t0) + xmm_offset(ot), decode->op[2].offset,
3025 static void gen_POP(DisasContext *s, X86DecodedInsn *decode)
3027 X86DecodedOp *op = &decode->op[0];
3033 gen_writeback(s, decode, 0, s->T0);
3040 static void gen_POPA(DisasContext *s, X86DecodedInsn *decode)
3045 static void gen_POPCNT(DisasContext *s, X86DecodedInsn *decode)
3047 decode->cc_dst = tcg_temp_new();
3048 decode->cc_op = CC_OP_POPCNT;
3050 tcg_gen_mov_tl(decode->cc_dst, s->T0);
3054 static void gen_POPF(DisasContext *s, X86DecodedInsn *decode)
3076 static void gen_PSHUFW(DisasContext *s, X86DecodedInsn *decode)
3078 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
3082 static void gen_PSRLW_i(DisasContext *s, X86DecodedInsn *decode)
3084 int vec_len = vector_len(s, decode);
3086 if (decode->immediate >= 16) {
3087 tcg_gen_gvec_dup_imm(MO_64, decode->op[0].offset, vec_len, vec_len, 0);
3090 decode->op[0].offset, decode->op[1].offset,
3091 decode->immediate, vec_len, vec_len);
3095 static void gen_PSLLW_i(DisasContext *s, X86DecodedInsn *decode)
3097 int vec_len = vector_len(s, decode);
3099 if (decode->immediate >= 16) {
3100 tcg_gen_gvec_dup_imm(MO_64, decode->op[0].offset, vec_len, vec_len, 0);
3103 decode->op[0].offset, decode->op[1].offset,
3104 decode->immediate, vec_len, vec_len);
3108 static void gen_PSRAW_i(DisasContext *s, X86DecodedInsn *decode)
3110 int vec_len = vector_len(s, decode);
3112 if (decode->immediate >= 16) {
3113 decode->immediate = 15;
3116 decode->op[0].offset, decode->op[1].offset,
3117 decode->immediate, vec_len, vec_len);
3120 static void gen_PSRLD_i(DisasContext *s, X86DecodedInsn *decode)
3122 int vec_len = vector_len(s, decode);
3124 if (decode->immediate >= 32) {
3125 tcg_gen_gvec_dup_imm(MO_64, decode->op[0].offset, vec_len, vec_len, 0);
3128 decode->op[0].offset, decode->op[1].offset,
3129 decode->immediate, vec_len, vec_len);
3133 static void gen_PSLLD_i(DisasContext *s, X86DecodedInsn *decode)
3135 int vec_len = vector_len(s, decode);
3137 if (decode->immediate >= 32) {
3138 tcg_gen_gvec_dup_imm(MO_64, decode->op[0].offset, vec_len, vec_len, 0);
3141 decode->op[0].offset, decode->op[1].offset,
3142 decode->immediate, vec_len, vec_len);
3146 static void gen_PSRAD_i(DisasContext *s, X86DecodedInsn *decode)
3148 int vec_len = vector_len(s, decode);
3150 if (decode->immediate >= 32) {
3151 decode->immediate = 31;
3154 decode->op[0].offset, decode->op[1].offset,
3155 decode->immediate, vec_len, vec_len);
3158 static void gen_PSRLQ_i(DisasContext *s, X86DecodedInsn *decode)
3160 int vec_len = vector_len(s, decode);
3162 if (decode->immediate >= 64) {
3163 tcg_gen_gvec_dup_imm(MO_64, decode->op[0].offset, vec_len, vec_len, 0);
3166 decode->op[0].offset, decode->op[1].offset,
3167 decode->immediate, vec_len, vec_len);
3171 static void gen_PSLLQ_i(DisasContext *s, X86DecodedInsn *decode)
3173 int vec_len = vector_len(s, decode);
3175 if (decode->immediate >= 64) {
3176 tcg_gen_gvec_dup_imm(MO_64, decode->op[0].offset, vec_len, vec_len, 0);
3179 decode->op[0].offset, decode->op[1].offset,
3180 decode->immediate, vec_len, vec_len);
3198 static void gen_PSRLDQ_i(DisasContext *s, X86DecodedInsn *decode)
3200 int vec_len = vector_len(s, decode);
3201 TCGv_ptr imm_vec = make_imm8u_xmm_vec(decode->immediate, vec_len);
3210 static void gen_PSLLDQ_i(DisasContext *s, X86DecodedInsn *decode)
3212 int vec_len = vector_len(s, decode);
3213 TCGv_ptr imm_vec = make_imm8u_xmm_vec(decode->immediate, vec_len);
3222 static void gen_PUSH(DisasContext *s, X86DecodedInsn *decode)
3227 static void gen_PUSHA(DisasContext *s, X86DecodedInsn *decode)
3232 static void gen_PUSHF(DisasContext *s, X86DecodedInsn *decode)
3239 static MemOp gen_shift_count(DisasContext *s, X86DecodedInsn *decode,
3242 MemOp ot = decode->op[0].ot;
3254 if ((decode->immediate & mask) == 0) {
3259 tcg_gen_movi_tl(*count, decode->immediate & mask);
3275 * Compute existing flags in decode->cc_src, for gen_* functions that wants
3277 * operations to compute the carry in decode->cc_dst and the overflow in
3278 * decode->cc_src2.
3280 * If need_flags is true, decode->cc_dst and decode->cc_src2 are preloaded
3285 * decode->cc_dst (trying a bit harder if want_carry is true). If false is
3286 * returned, decode->cc_dst is uninitialized and the carry is only available
3287 * as bit 0 of decode->cc_src.
3289 static bool gen_eflags_adcox(DisasContext *s, X86DecodedInsn *decode, bool want_carry, bool need_fl…
3294 decode->cc_dst = tcg_temp_new();
3295 decode->cc_src = tcg_temp_new();
3296 decode->cc_src2 = tcg_temp_new();
3297 decode->cc_op = CC_OP_ADCOX;
3306 tcg_gen_mov_tl(decode->cc_src, cpu_cc_src);
3308 tcg_gen_mov_tl(decode->cc_src2, cpu_cc_src2);
3312 tcg_gen_mov_tl(decode->cc_dst, cpu_cc_dst);
3319 gen_mov_eflags(s, decode->cc_src);
3321 tcg_gen_movi_tl(decode->cc_src2, 0);
3325 tcg_gen_movi_tl(decode->cc_dst, 0);
3337 tcg_gen_andi_tl(decode->cc_dst, cpu_cc_src, 1);
3340 gen_mov_eflags(s, decode->cc_src);
3350 tcg_gen_shri_tl(decode->cc_dst, cpu_cc_src, (8 << size) - 1);
3353 gen_mov_eflags(s, decode->cc_src);
3357 gen_mov_eflags(s, decode->cc_src);
3364 tcg_gen_extract_tl(decode->cc_src2, decode->cc_src, ctz32(CC_O), 1);
3368 tcg_gen_extract_tl(decode->cc_dst, decode->cc_src, ctz32(CC_C), 1);
3375 static void gen_rot_overflow(X86DecodedInsn *decode, TCGv result, TCGv old,
3378 MemOp ot = decode->op[0].ot;
3379 TCGv temp = can_be_zero ? tcg_temp_new() : decode->cc_src2;
3384 tcg_gen_movcond_tl(TCG_COND_EQ, decode->cc_src2, count, tcg_constant_tl(0),
3385 decode->cc_src2, temp);
3430 static void gen_RCL(DisasContext *s, X86DecodedInsn *decode)
3435 MemOp ot = gen_shift_count(s, decode, &can_be_zero, &count, decode->op[2].unit);
3447 have_1bit_cin = gen_eflags_adcox(s, decode, true, can_be_zero);
3456 TCGv cin = have_1bit_cin ? decode->cc_dst : decode->cc_src;
3460 tcg_gen_add_tl(high, s->T0, decode->cc_dst);
3469 tcg_gen_andi_tl(decode->cc_dst, low, 1);
3473 tcg_gen_mov_tl(decode->cc_src2, s->T0);
3475 gen_rot_overflow(decode, s->T0, decode->cc_src2, false, NULL);
3482 static void gen_RCR(DisasContext *s, X86DecodedInsn *decode)
3487 MemOp ot = gen_shift_count(s, decode, &can_be_zero, &count, decode->op[2].unit);
3499 have_1bit_cin = gen_eflags_adcox(s, decode, true, can_be_zero);
3507 TCGv cin = have_1bit_cin ? decode->cc_dst : decode->cc_src;
3511 tcg_gen_add_tl(high, s->T0, decode->cc_dst);
3518 tcg_gen_andi_tl(decode->cc_dst, low, 1);
3526 tcg_gen_mov_tl(decode->cc_src2, s->T0);
3528 gen_rot_overflow(decode, s->T0, decode->cc_src2, false, NULL);
3536 static void gen_unreachable(DisasContext *s, X86DecodedInsn *decode)
3543 static void gen_RDMSR(DisasContext *s, X86DecodedInsn *decode)
3553 static void gen_RDPMC(DisasContext *s, X86DecodedInsn *decode)
3562 static void gen_RDTSC(DisasContext *s, X86DecodedInsn *decode)
3570 static void gen_RDxxBASE(DisasContext *s, X86DecodedInsn *decode)
3579 static void gen_RET(DisasContext *s, X86DecodedInsn *decode)
3581 int16_t adjust = decode->e.op1 == X86_TYPE_I ? decode->immediate : 0;
3590 static void gen_RETF(DisasContext *s, X86DecodedInsn *decode)
3592 int16_t adjust = decode->e.op1 == X86_TYPE_I ? decode->immediate : 0;
3618 * The input has already been zero-extended upon operand decode.
3648 static void gen_rot_carry(X86DecodedInsn *decode, TCGv result,
3652 tcg_gen_extract_tl(decode->cc_dst, result, bit, 1);
3656 tcg_gen_movcond_tl(TCG_COND_EQ, decode->cc_dst, count, tcg_constant_tl(0),
3657 decode->cc_dst, temp);
3661 static void gen_ROL(DisasContext *s, X86DecodedInsn *decode)
3665 MemOp ot = gen_shift_count(s, decode, &can_be_zero, &count, decode->op[2].unit);
3673 gen_eflags_adcox(s, decode, false, can_be_zero);
3685 gen_rot_carry(decode, s->T0, can_be_zero, count, 0);
3686 gen_rot_overflow(decode, s->T0, old, can_be_zero, count);
3689 static void gen_ROR(DisasContext *s, X86DecodedInsn *decode)
3693 MemOp ot = gen_shift_count(s, decode, &can_be_zero, &count, decode->op[2].unit);
3701 gen_eflags_adcox(s, decode, false, can_be_zero);
3710 gen_rot_carry(decode, s->T0, can_be_zero, count, 31);
3713 gen_rot_carry(decode, s->T0, can_be_zero, count, TARGET_LONG_BITS - 1);
3715 gen_rot_overflow(decode, s->T0, old, can_be_zero, count);
3718 static void gen_RORX(DisasContext *s, X86DecodedInsn *decode)
3720 MemOp ot = decode->op[0].ot;
3722 int b = decode->immediate & mask;
3743 static void gen_RSM(DisasContext *s, X86DecodedInsn *decode)
3753 static void gen_SAHF(DisasContext *s, X86DecodedInsn *decode)
3765 static void gen_SALC(DisasContext *s, X86DecodedInsn *decode)
3771 static void gen_shift_dynamic_flags(DisasContext *s, X86DecodedInsn *decode, TCGv count, CCOp cc_op)
3776 decode->cc_op = CC_OP_DYNAMIC;
3777 decode->cc_op_dynamic = tcg_temp_new_i32();
3779 assert(decode->cc_dst == s->T0);
3781 decode->cc_dst = tcg_temp_new();
3782 tcg_gen_movcond_tl(TCG_COND_EQ, decode->cc_dst, count, tcg_constant_tl(0),
3787 tcg_gen_movcond_tl(TCG_COND_EQ, decode->cc_src, count, tcg_constant_tl(0),
3788 cpu_cc_src, decode->cc_src);
3797 tcg_gen_movcond_i32(TCG_COND_EQ, decode->cc_op_dynamic, count32, tcg_constant_i32(0),
3801 static void gen_SAR(DisasContext *s, X86DecodedInsn *decode)
3805 MemOp ot = gen_shift_count(s, decode, &can_be_zero, &count, decode->op[2].unit);
3811 decode->cc_dst = s->T0;
3812 decode->cc_src = tcg_temp_new();
3813 tcg_gen_subi_tl(decode->cc_src, count, 1);
3814 tcg_gen_sar_tl(decode->cc_src, s->T0, decode->cc_src);
3817 gen_shift_dynamic_flags(s, decode, count, CC_OP_SARB + ot);
3819 decode->cc_op = CC_OP_SARB + ot;
3823 static void gen_SARX(DisasContext *s, X86DecodedInsn *decode)
3825 MemOp ot = decode->op[0].ot;
3833 static void gen_SBB(DisasContext *s, X86DecodedInsn *decode)
3835 MemOp ot = decode->op[0].ot;
3852 prepare_update3_cc(decode, s, CC_OP_SBBB + ot, c_in);
3855 static void gen_SCAS(DisasContext *s, X86DecodedInsn *decode)
3857 MemOp ot = decode->op[2].ot;
3865 static void gen_SETcc(DisasContext *s, X86DecodedInsn *decode)
3867 gen_setcc1(s, decode->b & 0xf, s->T0);
3870 static void gen_SFENCE(DisasContext *s, X86DecodedInsn *decode)
3875 static void gen_SHA1NEXTE(DisasContext *s, X86DecodedInsn *decode)
3880 static void gen_SHA1MSG1(DisasContext *s, X86DecodedInsn *decode)
3885 static void gen_SHA1MSG2(DisasContext *s, X86DecodedInsn *decode)
3890 static void gen_SHA1RNDS4(DisasContext *s, X86DecodedInsn *decode)
3892 switch(decode->immediate & 3) {
3908 static void gen_SHA256MSG1(DisasContext *s, X86DecodedInsn *decode)
3913 static void gen_SHA256MSG2(DisasContext *s, X86DecodedInsn *decode)
3918 static void gen_SHA256RNDS2(DisasContext *s, X86DecodedInsn *decode)
3929 static void gen_SHL(DisasContext *s, X86DecodedInsn *decode)
3933 MemOp ot = gen_shift_count(s, decode, &can_be_zero, &count, decode->op[2].unit);
3939 decode->cc_dst = s->T0;
3940 decode->cc_src = tcg_temp_new();
3941 tcg_gen_subi_tl(decode->cc_src, count, 1);
3942 tcg_gen_shl_tl(decode->cc_src, s->T0, decode->cc_src);
3945 gen_shift_dynamic_flags(s, decode, count, CC_OP_SHLB + ot);
3947 decode->cc_op = CC_OP_SHLB + ot;
3951 static void gen_SHLD(DisasContext *s, X86DecodedInsn *decode)
3955 int unit = decode->e.op3 == X86_TYPE_I ? X86_OP_IMM : X86_OP_INT;
3956 MemOp ot = gen_shift_count(s, decode, &can_be_zero, &count, unit);
3962 decode->cc_dst = s->T0;
3963 decode->cc_src = s->tmp0;
3966 gen_shift_dynamic_flags(s, decode, count, CC_OP_SHLB + ot);
3968 decode->cc_op = CC_OP_SHLB + ot;
3972 static void gen_SHLX(DisasContext *s, X86DecodedInsn *decode)
3974 MemOp ot = decode->op[0].ot;
3982 static void gen_SHR(DisasContext *s, X86DecodedInsn *decode)
3986 MemOp ot = gen_shift_count(s, decode, &can_be_zero, &count, decode->op[2].unit);
3992 decode->cc_dst = s->T0;
3993 decode->cc_src = tcg_temp_new();
3994 tcg_gen_subi_tl(decode->cc_src, count, 1);
3995 tcg_gen_shr_tl(decode->cc_src, s->T0, decode->cc_src);
3998 gen_shift_dynamic_flags(s, decode, count, CC_OP_SARB + ot);
4000 decode->cc_op = CC_OP_SARB + ot;
4004 static void gen_SHRD(DisasContext *s, X86DecodedInsn *decode)
4008 int unit = decode->e.op3 == X86_TYPE_I ? X86_OP_IMM : X86_OP_INT;
4009 MemOp ot = gen_shift_count(s, decode, &can_be_zero, &count, unit);
4015 decode->cc_dst = s->T0;
4016 decode->cc_src = s->tmp0;
4019 gen_shift_dynamic_flags(s, decode, count, CC_OP_SARB + ot);
4021 decode->cc_op = CC_OP_SARB + ot;
4025 static void gen_SHRX(DisasContext *s, X86DecodedInsn *decode)
4027 MemOp ot = decode->op[0].ot;
4035 static void gen_STC(DisasContext *s, X86DecodedInsn *decode)
4041 static void gen_STD(DisasContext *s, X86DecodedInsn *decode)
4046 static void gen_STI(DisasContext *s, X86DecodedInsn *decode)
4052 static void gen_VAESKEYGEN(DisasContext *s, X86DecodedInsn *decode)
4054 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
4059 static void gen_STMXCSR(DisasContext *s, X86DecodedInsn *decode)
4065 static void gen_STOS(DisasContext *s, X86DecodedInsn *decode)
4067 MemOp ot = decode->op[1].ot;
4075 static void gen_SUB(DisasContext *s, X86DecodedInsn *decode)
4077 MemOp ot = decode->op[1].ot;
4088 prepare_update2_cc(decode, s, CC_OP_SUBB + ot);
4091 static void gen_SYSCALL(DisasContext *s, X86DecodedInsn *decode)
4108 static void gen_SYSENTER(DisasContext *s, X86DecodedInsn *decode)
4114 static void gen_SYSEXIT(DisasContext *s, X86DecodedInsn *decode)
4120 static void gen_SYSRET(DisasContext *s, X86DecodedInsn *decode)
4136 static void gen_TZCNT(DisasContext *s, X86DecodedInsn *decode)
4138 MemOp ot = decode->op[0].ot;
4141 decode->cc_src = tcg_temp_new();
4142 decode->cc_dst = s->T0;
4143 decode->cc_op = CC_OP_BMILGB + ot;
4144 tcg_gen_mov_tl(decode->cc_src, s->T0);
4150 static void gen_UD(DisasContext *s, X86DecodedInsn *decode)
4155 static void gen_VAESIMC(DisasContext *s, X86DecodedInsn *decode)
4210 static void gen_VCMP(DisasContext *s, X86DecodedInsn *decode)
4212 int index = decode->immediate & (s->prefix & PREFIX_VEX ? 31 : 7);
4221 static void gen_VCOMI(DisasContext *s, X86DecodedInsn *decode)
4229 static void gen_VCVTPD2PS(DisasContext *s, X86DecodedInsn *decode)
4238 static void gen_VCVTPS2PD(DisasContext *s, X86DecodedInsn *decode)
4247 static void gen_VCVTPS2PH(DisasContext *s, X86DecodedInsn *decode)
4249 gen_unary_imm_fp_sse(s, decode,
4256 if (decode->op[0].has_ea) {
4257 gen_store_sse(s, decode, decode->op[0].offset);
4261 static void gen_VCVTSD2SS(DisasContext *s, X86DecodedInsn *decode)
4266 static void gen_VCVTSS2SD(DisasContext *s, X86DecodedInsn *decode)
4271 static void gen_VCVTSI2Sx(DisasContext *s, X86DecodedInsn *decode)
4273 int vec_len = vector_len(s, decode);
4276 tcg_gen_gvec_mov(MO_64, decode->op[0].offset, decode->op[1].offset, vec_len, vec_len);
4279 MemOp ot = decode->op[2].ot;
4301 static inline void gen_VCVTtSx2SI(DisasContext *s, X86DecodedInsn *decode,
4308 MemOp ot = decode->op[0].ot;
4339 static void gen_VCVTSx2SI(DisasContext *s, X86DecodedInsn *decode)
4341 gen_VCVTtSx2SI(s, decode,
4346 static void gen_VCVTTSx2SI(DisasContext *s, X86DecodedInsn *decode)
4348 gen_VCVTtSx2SI(s, decode,
4353 static void gen_VEXTRACTx128(DisasContext *s, X86DecodedInsn *decode)
4355 int mask = decode->immediate & 1;
4356 int src_ofs = vector_elem_offset(&decode->op[1], MO_128, mask);
4357 if (decode->op[0].has_ea) {
4361 tcg_gen_gvec_mov(MO_64, decode->op[0].offset, src_ofs, 16, 16);
4365 static void gen_VEXTRACTPS(DisasContext *s, X86DecodedInsn *decode)
4367 gen_pextr(s, decode, MO_32);
4370 static void gen_vinsertps(DisasContext *s, X86DecodedInsn *decode)
4372 int val = decode->immediate;
4381 tcg_gen_gvec_dup_imm(MO_64, decode->op[0].offset, vec_len, vec_len, 0);
4382 } else if (decode->op[1].offset != decode->op[0].offset) {
4383 gen_store_sse(s, decode, decode->op[1].offset);
4388 vector_elem_offset(&decode->op[0], MO_32, dest_word));
4397 vector_elem_offset(&decode->op[0], MO_32, i));
4403 static void gen_VINSERTPS_r(DisasContext *s, X86DecodedInsn *decode)
4405 int val = decode->immediate;
4407 vector_elem_offset(&decode->op[2], MO_32, (val >> 6) & 3));
4408 gen_vinsertps(s, decode);
4411 static void gen_VINSERTPS_m(DisasContext *s, X86DecodedInsn *decode)
4414 gen_vinsertps(s, decode);
4417 static void gen_VINSERTx128(DisasContext *s, X86DecodedInsn *decode)
4419 int mask = decode->immediate & 1;
4421 decode->op[0].offset + offsetof(YMMReg, YMM_X(mask)),
4422 decode->op[2].offset + offsetof(YMMReg, YMM_X(0)), 16, 16);
4424 decode->op[0].offset + offsetof(YMMReg, YMM_X(!mask)),
4425 decode->op[1].offset + offsetof(YMMReg, YMM_X(!mask)), 16, 16);
4428 static inline void gen_maskmov(DisasContext *s, X86DecodedInsn *decode,
4438 static void gen_VMASKMOVPD_st(DisasContext *s, X86DecodedInsn *decode)
4440 gen_maskmov(s, decode, gen_helper_vpmaskmovq_st_xmm, gen_helper_vpmaskmovq_st_ymm);
4443 static void gen_VMASKMOVPS_st(DisasContext *s, X86DecodedInsn *decode)
4445 gen_maskmov(s, decode, gen_helper_vpmaskmovd_st_xmm, gen_helper_vpmaskmovd_st_ymm);
4448 static void gen_VMOVHPx_ld(DisasContext *s, X86DecodedInsn *decode)
4450 gen_ldq_env_A0(s, decode->op[0].offset + offsetof(XMMReg, XMM_Q(1)));
4451 if (decode->op[0].offset != decode->op[1].offset) {
4452 tcg_gen_ld_i64(s->tmp1_i64, tcg_env, decode->op[1].offset + offsetof(XMMReg, XMM_Q(0)));
4453 tcg_gen_st_i64(s->tmp1_i64, tcg_env, decode->op[0].offset + offsetof(XMMReg, XMM_Q(0)));
4457 static void gen_VMOVHPx_st(DisasContext *s, X86DecodedInsn *decode)
4459 gen_stq_env_A0(s, decode->op[2].offset + offsetof(XMMReg, XMM_Q(1)));
4462 static void gen_VMOVHPx(DisasContext *s, X86DecodedInsn *decode)
4464 if (decode->op[0].offset != decode->op[2].offset) {
4465 tcg_gen_ld_i64(s->tmp1_i64, tcg_env, decode->op[2].offset + offsetof(XMMReg, XMM_Q(1)));
4466 tcg_gen_st_i64(s->tmp1_i64, tcg_env, decode->op[0].offset + offsetof(XMMReg, XMM_Q(1)));
4468 if (decode->op[0].offset != decode->op[1].offset) {
4469 tcg_gen_ld_i64(s->tmp1_i64, tcg_env, decode->op[1].offset + offsetof(XMMReg, XMM_Q(0)));
4470 tcg_gen_st_i64(s->tmp1_i64, tcg_env, decode->op[0].offset + offsetof(XMMReg, XMM_Q(0)));
4474 static void gen_VMOVHLPS(DisasContext *s, X86DecodedInsn *decode)
4476 tcg_gen_ld_i64(s->tmp1_i64, tcg_env, decode->op[2].offset + offsetof(XMMReg, XMM_Q(1)));
4477 tcg_gen_st_i64(s->tmp1_i64, tcg_env, decode->op[0].offset + offsetof(XMMReg, XMM_Q(0)));
4478 if (decode->op[0].offset != decode->op[1].offset) {
4479 tcg_gen_ld_i64(s->tmp1_i64, tcg_env, decode->op[1].offset + offsetof(XMMReg, XMM_Q(1)));
4480 tcg_gen_st_i64(s->tmp1_i64, tcg_env, decode->op[0].offset + offsetof(XMMReg, XMM_Q(1)));
4484 static void gen_VMOVLHPS(DisasContext *s, X86DecodedInsn *decode)
4486 tcg_gen_ld_i64(s->tmp1_i64, tcg_env, decode->op[2].offset);
4487 tcg_gen_st_i64(s->tmp1_i64, tcg_env, decode->op[0].offset + offsetof(XMMReg, XMM_Q(1)));
4488 if (decode->op[0].offset != decode->op[1].offset) {
4489 tcg_gen_ld_i64(s->tmp1_i64, tcg_env, decode->op[1].offset + offsetof(XMMReg, XMM_Q(0)));
4490 tcg_gen_st_i64(s->tmp1_i64, tcg_env, decode->op[0].offset + offsetof(XMMReg, XMM_Q(0)));
4499 static void gen_VMOVLPx(DisasContext *s, X86DecodedInsn *decode)
4501 int vec_len = vector_len(s, decode);
4503 tcg_gen_ld_i64(s->tmp1_i64, tcg_env, decode->op[2].offset + offsetof(XMMReg, XMM_Q(0)));
4504 tcg_gen_gvec_mov(MO_64, decode->op[0].offset, decode->op[1].offset, vec_len, vec_len);
4505 tcg_gen_st_i64(s->tmp1_i64, tcg_env, decode->op[0].offset + offsetof(XMMReg, XMM_Q(0)));
4508 static void gen_VMOVLPx_ld(DisasContext *s, X86DecodedInsn *decode)
4510 int vec_len = vector_len(s, decode);
4513 tcg_gen_gvec_mov(MO_64, decode->op[0].offset, decode->op[1].offset, vec_len, vec_len);
4517 static void gen_VMOVLPx_st(DisasContext *s, X86DecodedInsn *decode)
4523 static void gen_VMOVSD_ld(DisasContext *s, X86DecodedInsn *decode)
4532 static void gen_VMOVSS(DisasContext *s, X86DecodedInsn *decode)
4534 int vec_len = vector_len(s, decode);
4537 tcg_gen_gvec_mov(MO_64, decode->op[0].offset, decode->op[1].offset, vec_len, vec_len);
4541 static void gen_VMOVSS_ld(DisasContext *s, X86DecodedInsn *decode)
4543 int vec_len = vector_len(s, decode);
4546 tcg_gen_gvec_dup_imm(MO_64, decode->op[0].offset, vec_len, vec_len, 0);
4550 static void gen_VMOVSS_st(DisasContext *s, X86DecodedInsn *decode)
4556 static void gen_VPMASKMOV_st(DisasContext *s, X86DecodedInsn *decode)
4559 gen_VMASKMOVPD_st(s, decode);
4561 gen_VMASKMOVPS_st(s, decode);
4565 static void gen_VPERMD(DisasContext *s, X86DecodedInsn *decode)
4571 static void gen_VPERM2x128(DisasContext *s, X86DecodedInsn *decode)
4573 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
4578 static void gen_VPHMINPOSUW(DisasContext *s, X86DecodedInsn *decode)
4584 static void gen_VROUNDSD(DisasContext *s, X86DecodedInsn *decode)
4586 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
4591 static void gen_VROUNDSS(DisasContext *s, X86DecodedInsn *decode)
4593 TCGv_i32 imm = tcg_constant8u_i32(decode->immediate);
4598 static void gen_VSHUF(DisasContext *s, X86DecodedInsn *decode)
4600 TCGv_i32 imm = tcg_constant_i32(decode->immediate);
4608 static void gen_VUCOMI(DisasContext *s, X86DecodedInsn *decode)
4616 static void gen_VZEROALL(DisasContext *s, X86DecodedInsn *decode)
4625 static void gen_VZEROUPPER(DisasContext *s, X86DecodedInsn *decode)
4635 static void gen_WAIT(DisasContext *s, X86DecodedInsn *decode)
4647 static void gen_WRMSR(DisasContext *s, X86DecodedInsn *decode)
4658 static void gen_WRxxBASE(DisasContext *s, X86DecodedInsn *decode)
4667 static void gen_XADD(DisasContext *s, X86DecodedInsn *decode)
4669 MemOp ot = decode->op[1].ot;
4671 decode->cc_dst = tcg_temp_new();
4672 decode->cc_src = s->T1;
4673 decode->cc_op = CC_OP_ADDB + ot;
4677 tcg_gen_add_tl(decode->cc_dst, s->T0, s->T1);
4679 tcg_gen_add_tl(decode->cc_dst, s->T0, s->T1);
4684 gen_writeback(s, decode, 0, decode->cc_dst);
4686 if (decode->op[0].has_ea || decode->op[2].n != decode->op[0].n) {
4687 gen_writeback(s, decode, 2, s->T0);
4691 static void gen_XCHG(DisasContext *s, X86DecodedInsn *decode)
4695 s->mem_index, decode->op[0].ot | MO_LE);
4697 gen_op_mov_reg_v(s, decode->op[2].ot, decode->op[2].n, s->T0);
4700 gen_op_mov_reg_v(s, decode->op[2].ot, decode->op[2].n, s->T0);
4705 static void gen_XLAT(DisasContext *s, X86DecodedInsn *decode)
4713 static void gen_XOR(DisasContext *s, X86DecodedInsn *decode)
4716 if (decode->op[1].unit == X86_OP_INT &&
4717 decode->op[2].unit == X86_OP_INT &&
4718 decode->op[1].n == decode->op[2].n) {
4720 decode->cc_op = CC_OP_EFLAGS;
4721 decode->cc_src = tcg_constant_tl(CC_Z | CC_P);
4723 MemOp ot = decode->op[1].ot;
4731 prepare_update1_cc(decode, s, CC_OP_LOGICB + ot);
4735 static void gen_XRSTOR(DisasContext *s, X86DecodedInsn *decode)
4750 static void gen_XSAVE(DisasContext *s, X86DecodedInsn *decode)
4758 static void gen_XSAVEOPT(DisasContext *s, X86DecodedInsn *decode)