| /openbmc/u-boot/drivers/mtd/nand/raw/ |
| H A D | zynq_nand.c | 426 int data_width = 4; in zynq_nand_read_oob() local
432 chip->read_buf(mtd, p, (mtd->oobsize - data_width)); in zynq_nand_read_oob()
433 p += mtd->oobsize - data_width; in zynq_nand_read_oob()
438 chip->read_buf(mtd, p, data_width); in zynq_nand_read_oob()
452 int status = 0, data_width = 4; in zynq_nand_write_oob() local
458 chip->write_buf(mtd, buf, (mtd->oobsize - data_width)); in zynq_nand_write_oob()
459 buf += mtd->oobsize - data_width; in zynq_nand_write_oob()
465 chip->write_buf(mtd, buf, data_width); in zynq_nand_write_oob()
485 unsigned long data_width = 4; in zynq_nand_read_page_raw() local
492 chip->read_buf(mtd, p, (mtd->oobsize - data_width)); in zynq_nand_read_page_raw()
[all …]
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| /openbmc/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_spd.c | 146 u32 data_width; member
308 info->data_width = in ddr3_spd_init()
310 DEBUG_INIT_FULL_C("DRAM data_width ", info->data_width, 1); in ddr3_spd_init()
336 (info->data_width / info->sdram_width)) << 16; in ddr3_spd_init()
341 (info->data_width / info->sdram_width) * 0x2) << 16; in ddr3_spd_init()
348 ((info->data_width / info->sdram_width) * in ddr3_spd_init()
520 if (sum_info->data_width != info->data_width) { in ddr3_spd_sum_init()
737 if (ddr3_get_min_val(sum_info.data_width, dimm_num, BUS_WIDTH) == 64) {
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| /openbmc/qemu/hw/nvram/ |
| H A D | fw_cfg.c | 1058 hwaddr data_addr, uint32_t data_width, in fw_cfg_init_mem_wide() argument
1067 qdev_prop_set_uint32(dev, "data_width", data_width); in fw_cfg_init_mem_wide()
1229 DEFINE_PROP_UINT32("data_width", FWCfgMemState, data_width, -1),
1252 if (s->data_width > data_ops->valid.max_access_size) { in fw_cfg_mem_realize()
1255 s->wide_data_ops.valid.max_access_size = s->data_width; in fw_cfg_mem_realize()
1256 s->wide_data_ops.impl.max_access_size = s->data_width; in fw_cfg_mem_realize()
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| /openbmc/u-boot/include/ |
| H A D | fsl_ddr_dimm_params.h | 24 unsigned int data_width; member
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| /openbmc/qemu/include/hw/nvram/ |
| H A D | fw_cfg.h | 96 uint32_t data_width; member
312 hwaddr data_addr, uint32_t data_width,
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| /openbmc/u-boot/drivers/ddr/fsl/ |
| H A D | options.c | 924 if ((pdimm[0].data_width >= 64) && \ in populate_memctl_options()
925 (pdimm[0].data_width <= 72)) in populate_memctl_options()
927 else if ((pdimm[0].data_width >= 32) && \ in populate_memctl_options()
928 (pdimm[0].data_width <= 40)) in populate_memctl_options()
932 pdimm[0].data_width); in populate_memctl_options()
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| H A D | ddr2_dimm_params.c | 238 pdimm->data_width = spd->dataw; in ddr_compute_dimm_parameters()
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| H A D | ddr1_dimm_params.c | 255 pdimm->data_width = spd->dataw_lsb; in ddr_compute_dimm_parameters()
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| H A D | ddr3_dimm_params.c | 127 pdimm->data_width = pdimm->primary_sdram_width in ddr_compute_dimm_parameters()
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| H A D | ddr4_dimm_params.c | 179 pdimm->data_width = pdimm->primary_sdram_width in ddr_compute_dimm_parameters()
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| H A D | main.c | 277 dw = pinfo->dimm_params[i][j].data_width; in __step_assign_addresses()
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| H A D | interactive.c | 224 DIMM_PARM(data_width), in fsl_ddr_dimm_parameters_edit()
323 DIMM_PARM(data_width), in print_dimm_parameters()
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| /openbmc/qemu/hw/dma/ |
| H A D | pl330.c | 248 uint8_t data_width; member
1622 switch (s->data_width) { in pl330_realize()
1633 error_setg(errp, "Bad value for data_width property: %" PRIx8, in pl330_realize()
1634 s->data_width); in pl330_realize()
1646 pl330_fifo_init(&s->fifo, s->data_width / 4 * s->data_buffer_dep); in pl330_realize()
1663 DEFINE_PROP_UINT8("data_width", PL330State, data_width, 64),
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| /openbmc/qemu/include/hw/firmware/ |
| H A D | smbios.h | 274 uint16_t data_width; member
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| /openbmc/qemu/hw/ppc/ |
| H A D | mac_oldworld.c | 306 qdev_prop_set_uint32(dev, "data_width", 1); in ppc_heathrow_init()
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| H A D | prep.c | 369 qdev_prop_set_uint32(dev, "data_width", 1); in ibm_40p_init()
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| H A D | mac_newworld.c | 465 qdev_prop_set_uint32(dev, "data_width", 1); in ppc_core99_init()
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| /openbmc/qemu/hw/arm/ |
| H A D | xilinx_zynq.c | 357 qdev_prop_set_uint8(dev, "data_width", 64); in zynq_init()
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| H A D | exynos4210.c | 534 qdev_prop_set_uint8(dev, "data_width", width); in pl330_create()
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| /openbmc/qemu/hw/sparc/ |
| H A D | sun4m.c | 1054 qdev_prop_set_uint32(dev, "data_width", 1); in sun4m_hw_init()
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| /openbmc/u-boot/doc/ |
| H A D | README.fsl-ddr | 370 data_width = 64
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| /openbmc/qemu/hw/smbios/ |
| H A D | smbios.c | 877 t->data_width = cpu_to_le16(0xFFFF); /* Unknown */ in smbios_build_type_17_table()
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| /openbmc/qemu/tests/functional/acpi-bits/bits-tests/ |
| H A D | smbios.py2 | 1155 self.add_field('data_width', u.unpack_one("<H"))
|