| /openbmc/linux/drivers/clk/mstar/ |
| H A D | clk-msc313-cpupll.c | 71 static u32 msc313_cpupll_reg_read32(struct msc313_cpupll *cpupll, unsigned int reg) in msc313_cpupll_reg_read32() argument
75 value = ioread16(cpupll->base + reg + 4) << 16; in msc313_cpupll_reg_read32()
76 value |= ioread16(cpupll->base + reg); in msc313_cpupll_reg_read32()
81 static void msc313_cpupll_reg_write32(struct msc313_cpupll *cpupll, unsigned int reg, u32 value) in msc313_cpupll_reg_write32() argument
85 iowrite16(l, cpupll->base + reg); in msc313_cpupll_reg_write32()
86 iowrite16(h, cpupll->base + reg + 4); in msc313_cpupll_reg_write32()
89 static void msc313_cpupll_setfreq(struct msc313_cpupll *cpupll, u32 regvalue) in msc313_cpupll_setfreq() argument
93 msc313_cpupll_reg_write32(cpupll, REG_LPF_HIGH_BOTTOM, regvalue); in msc313_cpupll_setfreq()
95 iowrite16(0x1, cpupll->base + REG_LPF_MYSTERYONE); in msc313_cpupll_setfreq()
96 iowrite16(0x6, cpupll->base + REG_LPF_MYSTERYTWO); in msc313_cpupll_setfreq()
[all …]
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| H A D | Makefile | 6 obj-$(CONFIG_MSTAR_MSC313_CPUPLL) += clk-msc313-cpupll.o
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| H A D | Kconfig | 3 bool "MStar CPUPLL driver"
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | mstar,msc313-cpupll.yaml | 4 $id: http://devicetree.org/schemas/clock/mstar,msc313-cpupll.yaml#
18 const: mstar,msc313-cpupll
40 cpupll: cpupll@206400 {
41 compatible = "mstar,msc313-cpupll";
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| /openbmc/linux/arch/arm/boot/dts/sigmastar/ |
| H A D | mstar-v7.dtsi | 24 clocks = <&cpupll>;
160 cpupll: cpupll@206400 { label
161 compatible = "mstar,msc313-cpupll";
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| H A D | mstar-infinity2m.dtsi | 29 clocks = <&cpupll>;
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| /openbmc/linux/drivers/clk/berlin/ |
| H A D | bg2q.c | 46 SYSPLL, CPUPLL, enumerator
54 [CPUPLL] = "cpupll",
307 pr_err("%pOF: Unable to map cpupll base\n", np); in berlin2q_clock_setup()
326 clk_names[CPUPLL], clk_names[REFCLK], 0); in berlin2q_clock_setup()
361 clk_hw_register_fixed_factor(NULL, "cpu", clk_names[CPUPLL], in berlin2q_clock_setup()
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| H A D | bg2.c | 91 SYSPLL, MEMPLL, CPUPLL, enumerator
107 [CPUPLL] = "cpupll",
167 CPUPLL, MEMPLL, MEMPLL, MEMPLL, MEMPLL
540 clk_names[CPUPLL], clk_names[REFCLK], 0); in berlin2_clock_setup()
592 parent_names[0] = clk_names[CPUPLL]; in berlin2_clock_setup()
598 clk_names[CPUPLL] = clk_hw_get_name(hw); in berlin2_clock_setup()
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| /openbmc/u-boot/arch/mips/mach-ath79/ar934x/ |
| H A D | clk.c | 261 u32 ctrl, cpu, cpupll, ddr, ddrpll; in ar934x_update_clock() local
272 cpupll = ar934x_cpupll_to_hz(cpu); in ar934x_update_clock()
278 cpuclk = cpupll; in ar934x_update_clock()
287 ddrclk = cpupll; in ar934x_update_clock()
294 busclk = cpupll; in ar934x_update_clock()
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| /openbmc/linux/arch/mips/alchemy/common/ |
| H A D | power.c | 83 /* restore clock configuration. Writing CPUPLL last will in restore_core_regs()
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| H A D | clock.c | 24 * - sysbus clock: CPU core clock (CPUPLL) divided by 2, 3 or 4.
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| /openbmc/linux/drivers/pinctrl/berlin/ |
| H A D | pinctrl-as370.c | 287 BERLIN_PINCTRL_FUNCTION(0x0, "cpupll"), /* OUT */
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| H A D | berlin-bg4ct.c | 140 BERLIN_PINCTRL_FUNCTION(0x2, "cpupll"), /* CLKO */
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| /openbmc/linux/ |
| H A D | opengrok2.0.log | [all...] |