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/openbmc/linux/drivers/hwtracing/coresight/
H A Dcoresight-etm3x-core.c65 /* Ensure pending cp14 accesses complete before setting pwrdwn */ in etm_set_pwrdwn()
80 /* Ensure pwrup completes before subsequent cp14 accesses */ in etm_clr_pwrdwn()
92 /* Ensure pwrup completes before subsequent cp14 accesses */ in etm_set_pwrup()
101 /* Ensure pending cp14 accesses complete before clearing pwrup */ in etm_clr_pwrup()
117 * method where we have to account for CP14 configurations.
162 * Recommended by spec for cp14 accesses to ensure etmcr write is in etm_set_prog()
181 * Recommended by spec for cp14 accesses to ensure etmcr write is in etm_clr_prog()
863 drvdata->use_cp14 = fwnode_property_read_bool(dev->fwnode, "arm,cp14"); in etm_probe()
H A Dcoresight-etm.h217 * @use_cpu14: true if management registers need to be accessed via CP14.
262 "invalid CP14 access to ETM reg: %#x", off); in etm_writel()
276 "invalid CP14 access to ETM reg: %#x", off); in etm_readl()
H A DMakefile18 coresight-etm3x-y := coresight-etm3x-core.o coresight-etm-cp14.o \
H A Dcoresight-etm-cp14.c11 #include <asm/hardware/cp14.h>
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-etm.yaml88 arm,cp14:
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-da850-pupd.c30 "cp8", "cp9", "cp10", "cp11", "cp12", "cp13", "cp14", "cp15",
/openbmc/linux/arch/arm64/kernel/
H A Dtraps.c858 [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
859 [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
863 [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
/openbmc/linux/arch/arm/include/asm/hardware/
H A Dcp14.h10 /* Accessors for CP14 registers */
531 /* Writes to this from CP14 interface are ignored */
/openbmc/linux/arch/arm/mach-exynos/
H A Dsuspend.c468 * block and avoid undefined instruction issue on CP14 reset. in exynos5420_prepare_pm_resume()
/openbmc/linux/arch/arm/
H A DKconfig822 CP14 read accesses to the DBGPRSR and DBGOSLSR registers generate an
824 external pin is set to 0, even when the CP14 accesses are performed
/openbmc/linux/arch/arm64/kvm/
H A Dsys_regs.c2530 * Trapped cp14 registers. We generally ignore most of the external
2618 /* Trapped cp14 64bit registers */
2915 * kvm_handle_cp_64 -- handles a mrrc/mcrr trap on a guest CP14/CP15 access
3082 * kvm_handle_cp_32 -- handles a mrc/mcr trap on a guest CP14/CP15 access
/openbmc/qemu/target/arm/tcg/
H A Dtranslate.c3574 * and of those only cp14 and cp15 were used for registers. in valid_cp()
3579 * only cp14 and cp15 are valid, and other values aren't considered in valid_cp()
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/
H A Dpxaregs.c296 // TODO: CP14-Registers (3-37)
/openbmc/
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