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Searched +full:coresight +full:- +full:static +full:- +full:funnel (Results 1 – 22 of 22) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-static-funnel.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-static-funnel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm CoreSight Static Trace Bus Funnel
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
16 CoreSight components are compliant with the ARM CoreSight architecture
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/openbmc/linux/drivers/hwtracing/coresight/
H A Dcoresight-funnel.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
5 * Description: CoreSight Funnel driver
19 #include <linux/coresight.h>
23 #include "coresight-priv.h"
33 DEFINE_CORESIGHT_DEVLIST(funnel_devs, "funnel");
36 * struct funnel_drvdata - specifics associated to a funnel component
38 * @atclk: optional clock for the core parts of the funnel.
51 static int dynamic_funnel_enable_hw(struct funnel_drvdata *drvdata, int port) in dynamic_funnel_enable_hw()
55 struct coresight_device *csdev = drvdata->csdev; in dynamic_funnel_enable_hw()
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H A Dcoresight-platform.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/coresight.h>
19 #include "coresight-priv.h"
24 * If the output port is already assigned on this device, return -EINVAL
37 for (i = 0; i < pdata->nr_outconns; ++i) { in coresight_add_out_conn()
38 conn = pdata->out_conns[i]; in coresight_add_out_conn()
39 /* Output == -1 means ignore the port for example for helpers */ in coresight_add_out_conn()
40 if (conn->src_port != -1 && in coresight_add_out_conn()
41 conn->src_port == new_conn->src_port) { in coresight_add_out_conn()
43 conn->src_port); in coresight_add_out_conn()
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/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3660-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * dtsi for Hisilicon Hi3660 Coresight
6 * Copyright (C) 2016-2018 HiSilicon Ltd.
15 compatible = "arm,coresight-etm4x", "arm,primecell";
18 clock-names = "apb_pclk";
21 out-ports {
24 remote-endpoint =
32 compatible = "arm,coresight-etm4x", "arm,primecell";
35 clock-names = "apb_pclk";
38 out-ports {
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H A Dhi6220-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * dtsi file for Hisilicon Hi6220 coresight
13 funnel@f6401000 {
14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
17 clock-names = "apb_pclk";
19 out-ports {
22 remote-endpoint =
28 in-ports {
31 remote-endpoint =
39 compatible = "arm,coresight-tmc", "arm,primecell";
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/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dhip04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2014 HiSilicon Ltd.
6 * Copyright (C) 2013-2014 Linaro Ltd.
12 /* memory bus is 64-bit */
13 #address-cells = <2>;
14 #size-cells = <2>;
21 compatible = "hisilicon,hip04-bootwrapper";
22 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>;
26 #address-cells = <1>;
27 #size-cells = <0>;
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/openbmc/linux/Documentation/trace/coresight/
H A Dcoresight.rst2 Coresight - HW Assisted Tracing on ARM
9 ------------
11 Coresight is an umbrella of technologies allowing for the debugging of ARM
24 flows through the coresight system (via ATB bus) using links that are connecting
25 the emanating source to a sink(s). Sinks serve as endpoints to the coresight
28 host without fear of filling up the onboard coresight memory buffer.
30 At typical coresight system would look like this::
38 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System ||
39 |->0000000 : T : |->0000000 : T : : T :<--->@@@@@ || Memory ||
40 | #######<-->: I : | #######<-->: I : : I : @@@<-| ||||||||||||
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/openbmc/linux/drivers/acpi/arm64/
H A Damba.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
22 static const struct acpi_device_id amba_id_list[] = {
24 {"ARMH0330", 0}, /* ARM DMA Controller DMA-330 */
25 {"ARMHC501", 0}, /* ARM CoreSight ETR */
26 {"ARMHC502", 0}, /* ARM CoreSight STM */
27 {"ARMHC503", 0}, /* ARM CoreSight Debug */
28 {"ARMHC979", 0}, /* ARM CoreSight TPIU */
29 {"ARMHC97C", 0}, /* ARM CoreSight SoC-400 TMC, SoC-600 ETF/ETB */
30 {"ARMHC98D", 0}, /* ARM CoreSight Dynamic Replicator */
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/openbmc/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-7000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "xlnx,zynq-7000";
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,cortex-a9";
20 clock-latency = <1000>;
21 cpu0-supply = <&regulator_vccpint>;
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/openbmc/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca15_a7.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15_A7 MPCore (V2P-CA15_A7)
8 * HBI-0249A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15_CA7";
18 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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/openbmc/qemu/hw/arm/
H A Dxilinx_zynq.c28 #include "hw/adc/zynq-xadc.h"
31 #include "qemu/error-report.h"
36 #include "hw/qdev-clock.h"
41 #include "target/arm/cpu-qom.h"
44 #define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
62 static const int dma_irqs[8] = {
98 static void zynq_write_board_setup(ARMCPU *cpu, in zynq_write_board_setup()
112 rom_add_blob_fixed("board-setup", board_setup_blob, in zynq_write_board_setup()
116 static struct arm_boot_info zynq_binfo = {};
118 static void gem_init(uint32_t base, qemu_irq irq) in gem_init()
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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-reset.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "dt-bindings/input/input.h"
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interconnect/imx8mq.h>
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H A Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
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/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-dbx5x0.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/ste-db8500-clkout.h>
9 #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h>
10 #include <dt-bindings/mfd/dbx500-prcmu.h>
11 #include <dt-bindings/arm/ux500_pm_domains.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/thermal/thermal.h>
16 #address-cells = <1>;
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/openbmc/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2_coresight.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2019-2022 HabanaLabs, Ltd.
13 #define COMPONENT_ID_INVALID ((u32)(-1))
45 * struct component_config_offsets - per cs_dbg unit - view off all related components indices
46 * @funnel_id: funnel id - index in debug_funnel_regs
47 * @etf_id: etf id - index in debug_etf_regs
48 * @stm_id: stm id - index in debug_stm_regs
49 * @spmu_id: spmu_id - index in debug_spmu_regs
51 * @bmon_ids: array of bmon id (max size - MAX_BMONS_PER_UNIT) index in debug_bmon_regs
62 static u64 debug_stm_regs[GAUDI2_STM_LAST + 1] = {
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/openbmc/linux/drivers/accel/habanalabs/goya/
H A Dgoya_coresight.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2016-2019 HabanaLabs, Ltd.
21 static u64 debug_stm_regs[GOYA_STM_LAST + 1] = {
46 static u64 debug_etf_regs[GOYA_ETF_LAST + 1] = {
73 static u64 debug_funnel_regs[GOYA_FUNNEL_LAST + 1] = {
101 static u64 debug_bmon_regs[GOYA_BMON_LAST + 1] = {
176 static u64 debug_spmu_regs[GOYA_SPMU_LAST + 1] = {
199 static int goya_coresight_timeout(struct hl_device *hdev, u64 addr, in goya_coresight_timeout()
205 if (hdev->pldm) in goya_coresight_timeout()
219 dev_err(hdev->dev, in goya_coresight_timeout()
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/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
/openbmc/linux/drivers/accel/habanalabs/gaudi/
H A Dgaudi_coresight.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2016-2018 HabanaLabs, Ltd.
20 static u64 debug_stm_regs[GAUDI_STM_LAST + 1] = {
69 static u64 debug_etf_regs[GAUDI_ETF_LAST + 1] = {
120 static u64 debug_funnel_regs[GAUDI_FUNNEL_LAST + 1] = {
199 static u64 debug_bmon_regs[GAUDI_BMON_LAST + 1] = {
323 static u64 debug_spmu_regs[GAUDI_SPMU_LAST + 1] = {
366 static int gaudi_coresight_timeout(struct hl_device *hdev, u64 addr, in gaudi_coresight_timeout()
381 dev_err(hdev->dev, in gaudi_coresight_timeout()
382 "Timeout while waiting for coresight, addr: 0x%llx, position: %d, up: %d\n", in gaudi_coresight_timeout()
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/openbmc/linux/
H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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