| /openbmc/linux/Documentation/devicetree/bindings/pci/ |
| H A D | pci-msi.txt | 16 MSIs may be distinguished in part through the use of sideband data accompanying
17 writes. In the case of PCI devices, this sideband data may be derived from the
19 controllers it can address, and the sideband data that will be associated with
23 Documentation/devicetree/bindings/interrupt-controller/msi.txt.
30 -------------------
32 - msi-map: Maps a Requester ID to an MSI controller and associated
33 msi-specifier data. The property is an arbitrary number of tuples of
34 (rid-base,msi-controller,msi-base,length), where:
36 * rid-base is a single cell describing the first RID matched by the entry.
38 * msi-controller is a single phandle to an MSI controller
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| /openbmc/linux/drivers/pinctrl/samsung/ |
| H A D | pinctrl-exynos-arm64.c | 1 // SPDX-License-Identifier: GPL-2.0+
17 #include <linux/soc/samsung/exynos-regs-pmu.h>
19 #include "pinctrl-samsung.h"
20 #include "pinctrl-exynos.h"
44 * Bank type for non-alive type. Bit fields:
64 /* pin banks of exynos5433 pin-controller - ALIVE */
78 /* pin banks of exynos5433 pin-controller - AUD */
85 /* pin banks of exynos5433 pin-controller - CPIF */
91 /* pin banks of exynos5433 pin-controller - eSE */
97 /* pin banks of exynos5433 pin-controller - FINGER */
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| H A D | pinctrl-exynos-arm.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
35 /* Retention control for S5PV210 are located at the end of clock controller */
45 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()
56 const struct samsung_retention_data *data) in s5pv210_retention_init() argument
62 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()
64 return ERR_PTR(-ENOMEM); in s5pv210_retention_init()
66 np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); in s5pv210_retention_init()
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| /openbmc/linux/include/linux/ |
| H A D | mailbox_controller.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 * struct mbox_chan_ops - methods to control mailbox channels
16 * @send_data: The API asks the MBOX controller driver, in atomic
18 * data is accepted for transmission, -EBUSY while rejecting
19 * if the remote hasn't yet read the last data sent. Actual
20 * transmission of data is reported by the controller via
24 * the context doesn't allow sleeping. Typically the controller
25 * will implement a busy loop waiting for the data to flush out.
26 * @startup: Called when a client requests the chan. The controller
29 * block. After this call the Controller must forward any
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| H A D | mhi.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
10 #include <linux/dma-direction.h>
27 * enum mhi_callback - MHI callback
29 * @MHI_CB_PENDING_DATA: New data available for client to process
51 * enum mhi_flags - Transfer flags
63 * enum mhi_device_type - Device types
64 * @MHI_DEVICE_XFER: Handles data transfer
73 * enum mhi_ch_type - Channel types
89 * struct image_info - Firmware and RDDM table
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| H A D | mhi_ep.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <linux/dma-direction.h>
15 * struct mhi_ep_channel_config - Channel configuration structure for controller
19 * @dir: Direction that data may flow on this channel
29 * struct mhi_ep_cntrl_config - MHI Endpoint controller configuration
30 * @mhi_version: MHI spec version supported by the controller
43 * struct mhi_ep_db_info - MHI Endpoint doorbell info
53 * struct mhi_ep_buf_info - MHI Endpoint transfer buffer info
59 * @cb: Callback to be executed by controller drivers after transfer completion (async)
74 * struct mhi_ep_cntrl - MHI Endpoint controller structure
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| /openbmc/linux/Documentation/devicetree/bindings/gpio/ |
| H A D | gpio-ep9301.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-ep9301.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: EP93xx GPIO controller
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Bartosz Golaszewski <brgl@bgdev.pl>
12 - Nikita Shubin <nikita.shubin@maquefel.me>
17 - const: cirrus,ep9301-gpio
18 - items:
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| /openbmc/linux/drivers/input/joystick/ |
| H A D | xpad.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2002 Marko Friedemann <mfr@bmx-chemnitz.de>
16 * - information from http://euc.jp/periphs/xbox-controller.ja.html
17 * - the iForce driver drivers/char/joystick/iforce.c
18 * - the skeleton-driver drivers/usb/usb-skeleton.c
19 * - Xbox 360 information http://www.free60.org/wiki/Gamepad
20 * - Xbox One information https://github.com/quantus/xbox-one-controller-protocol
23 * - ITO Takayuki for providing essential xpad information on his website
24 * - Vojtech Pavlik - iforce driver / input subsystem
25 * - Greg Kroah-Hartman - usb-skeleton driver
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| /openbmc/linux/drivers/usb/musb/ |
| H A D | ux500_dma.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 * Copyright (C) 2011 ST-Ericsson SA
18 #include <linux/dma-mapping.h>
22 #include <linux/platform_data/usb-musb-ux500.h>
32 struct ux500_dma_controller *controller; member
43 struct dma_controller controller; member
54 struct ux500_dma_channel *ux500_channel = channel->private_data; in ux500_dma_callback()
55 struct musb_hw_ep *hw_ep = ux500_channel->hw_ep; in ux500_dma_callback()
56 struct musb *musb = hw_ep->musb; in ux500_dma_callback()
59 dev_dbg(musb->controller, "DMA rx transfer done on hw_ep=%d\n", in ux500_dma_callback()
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| /openbmc/linux/Documentation/driver-api/usb/ |
| H A D | writing_musb_glue_layer.rst | 12 use Universal Host Controller Interface (UHCI) or Open Host Controller
15 Instead, these embedded UDC rely on the USB On-the-Go (OTG)
18 Dual-Role Controller (MUSB HDRC) found in the Mentor Graphics Inventra™
21 As a self-taught exercise I have written an MUSB glue layer for the
28 .. _musb-basics:
33 To get started on the topic, please read USB On-the-Go Basics (see
42 Linux USB stack is a layered architecture in which the MUSB controller
43 hardware sits at the lowest. The MUSB controller driver abstract the
44 MUSB controller hardware to the Linux USB stack::
46 ------------------------
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| /openbmc/bmcweb/redfish-core/schema/dmtf/json-schema-installed/ |
| H A D | StorageController.v1_8_0.json | 4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
5 …"copyright": "Copyright 2014-2024 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
15 …ces in this group are inaccessible. Commands are not able to access user data of namespaces in th…
16 …essed by a controller that reports this state for an ANA group provide non-optimized access charac…
17 …"Optimized": "Commands processed by a controller provide optimized access to any namespace in the …
18 …istently inaccessible. Commands are persistently not able to access user data of namespaces in th…
24 … "description": "The ANA characteristics and volume information for a storage controller.",
25 …"This type shall contain the ANA characteristics and volume information for a storage controller.",
27 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
68 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
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| /openbmc/bmcweb/redfish-core/schema/dmtf/json-schema/ |
| H A D | StorageController.v1_8_0.json | 4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
5 …"copyright": "Copyright 2014-2024 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
15 …ces in this group are inaccessible. Commands are not able to access user data of namespaces in th…
16 …essed by a controller that reports this state for an ANA group provide non-optimized access charac…
17 …"Optimized": "Commands processed by a controller provide optimized access to any namespace in the …
18 …istently inaccessible. Commands are persistently not able to access user data of namespaces in th…
24 … "description": "The ANA characteristics and volume information for a storage controller.",
25 …"This type shall contain the ANA characteristics and volume information for a storage controller.",
27 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
68 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
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| H A D | StorageControllerMetrics.v1_0_3.json | 4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
5 …"copyright": "Copyright 2014-2024 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
12 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
28 "description": "The available OEM-specific actions for this resource.",
29 …"longDescription": "This property shall contain the available OEM-specific actions for this resour…
37 …"longDescription": "The object shall contain the NVMe-defined 'Endurance Group Critical Warning Su…
39 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
54 …indication of whether namespaces in one or more Endurance Groups are in read-only mode not as a re…
55 …hall indicate whether namespaces in one or more Endurance Groups are in read-only mode not as a re…
63 …ability of one or more Endurance Groups is degraded due to significant media-related errors or any…
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| /openbmc/qemu/hw/display/ |
| H A D | vga_regs.h | 2 * linux/include/video/vga.h -- standard VGA chipset interaction
22 /* VGAlib version 1.2 - (c) 1993 Tommy Frandsen */
28 /* Multi-chipset support Copyright 1993 Harm Hanemaayer */
31 /* VGA data register ports */
32 #define VGA_CRT_DC 0x3D5 /* CRT Controller Data Register - color emulation */
33 #define VGA_CRT_DM 0x3B5 /* CRT Controller Data Register - mono emulation */
34 #define VGA_ATT_R 0x3C1 /* Attribute Controller Data Read Register */
35 #define VGA_ATT_W 0x3C0 /* Attribute Controller Data Write Register */
36 #define VGA_GFX_D 0x3CF /* Graphics Controller Data Register */
37 #define VGA_SEQ_D 0x3C5 /* Sequencer Data Register */
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| /openbmc/linux/drivers/usb/gadget/udc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
4 # (a) a peripheral controller, and
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
18 # USB Peripheral Controller Support
22 # - integrated/SOC controllers first
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| /openbmc/u-boot/include/ |
| H A D | syscon.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
14 * struct syscon_uc_info - Information stored by the syscon UCLASS_UCLASS
16 * @regmap: Register map for this controller
26 #define syscon_get_ops(dev) ((struct syscon_ops *)(dev)->driver->ops)
30 * We don't support 64-bit machines. If they are so resource-contrained that
34 * Update: 64-bit is now supported and we have an education crisis.
42 * syscon_get_regmap() - Get access to a register map
46 * @return 0 if OK, -ve on error
51 * syscon_get_regmap_by_driver_data() - Look up a controller by its ID
53 * Each system controller can be accessed by its driver data, which is
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| H A D | nvme.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
13 * nvme_identify - identify controller or namespace capabilities and status
15 * This issues an identify command to the NVMe controller to return a data
16 * buffer that describes the controller or namespace capabilities and status.
18 * @dev: NVMe controller device
19 * @nsid: 0 for controller, namespace id for namespace to identify
20 * @cns: 1 for controller, 0 for namespace
22 * @return: 0 on success, -ETIMEDOUT on command execution timeout,
23 * -EIO on command execution fails
29 * nvme_get_features - retrieve the attributes of the feature specified
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| /openbmc/linux/Documentation/devicetree/bindings/media/ |
| H A D | microchip,csi2dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip CSI2 Demux Controller (CSI2DC)
10 - Eugen Hristev <eugen.hristev@microchip.com>
13 CSI2DC - Camera Serial Interface 2 Demux Controller
15 CSI2DC is a hardware block that receives incoming data from either from an
17 It filters IDI packets based on their data type and virtual channel
20 controller.
22 CSI2DC can act a simple bypass bridge if the incoming data is coming from
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| /openbmc/linux/drivers/dma/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
10 DMA engines can do asynchronous data transfers without
65 Enable support for Altera / Intel mSGDMA controller.
94 Enable support for Audio DMA Controller found on Apple Silicon SoCs.
102 Support the Atmel AHB DMA controller.
109 Support the Atmel XDMA controller.
112 tristate "Analog Devices AXI-DMAC DMA support"
118 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
119 controller is often used in Analog Devices' reference designs for FPGA
149 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
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| H A D | acpi-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * ACPI helpers for DMA request / controller
5 * Based on of-dma.c
13 #include <linux/dma-mapping.h>
29 * acpi_dma_parse_resource_group - match device and parse resource group
32 * @adma: struct acpi_dma of the given DMA controller
50 if (grp->shared_info_length != sizeof(struct acpi_csrt_shared_info)) in acpi_dma_parse_resource_group()
51 return -ENODEV; in acpi_dma_parse_resource_group()
59 if (resource_type(rentry->res) == IORESOURCE_MEM) in acpi_dma_parse_resource_group()
60 mem = rentry->res->start; in acpi_dma_parse_resource_group()
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| /openbmc/bmcweb/redfish-core/include/registries/ |
| H A D | storage_device_message_registry.hpp | 4 * This is an auto-generated header which contains definitions
16 // clang-format off
21 "Copyright 2020-2023 DMTF. All rights reserved.",
88 "A storage controller degraded condition was detected.",
89 …"A degraded condition for the storage controller located in '%1' was detected due to reason '%2'.",
96 …the storage controller in the PCI slot. Update the controller to the latest firmware version. If…
101 "A storage controller failure was detected.",
102 "A failure condition for the storage controller located in '%1' was detected.",
108 …the storage controller in the PCI slot. Update the controller to the latest firmware version. If…
113 "The storage controller health has changed to OK.",
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| /openbmc/linux/drivers/reset/ |
| H A D | reset-scmi.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019-2021 ARM Ltd.
11 #include <linux/reset-controller.h>
17 * struct scmi_reset_data - reset controller information structure
18 * @rcdev: reset controller entity
19 * @ph: ARM SCMI protocol handle used for communication with system controller
27 #define to_scmi_handle(p) (to_scmi_reset_data(p)->ph)
30 * scmi_reset_assert() - assert device reset
31 * @rcdev: reset controller entity
44 return reset_ops->assert(ph, id); in scmi_reset_assert()
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| /openbmc/linux/drivers/spi/ |
| H A D | spi-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // STMicroelectronics STM32 SPI Controller driver
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
175 #define STM32_SPI_MASTER_MODE(stm32_spi) (!(stm32_spi)->device_mode)
176 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode)
179 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
191 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
200 * @rx: SPI RX data register
201 * @tx: SPI TX data register
219 * struct stm32_spi_cfg - stm32 compatible configuration data
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| /openbmc/linux/drivers/isdn/capi/ |
| H A D | kcapi.c | 40 /* ------------------------------------------------------------- */
45 u32 controller; member
48 /* ------------------------------------------------------------- */
63 /* -------- controller ref counting -------------------------------------- */
68 if (!try_module_get(ctr->owner)) in capi_ctr_get()
76 module_put(ctr->owner); in capi_ctr_put()
79 /* ------------------------------------------------------------- */
83 if (contr < 1 || contr - 1 >= CAPI_MAXCONTR) in get_capi_ctr_by_nr()
86 return capi_controller[contr - 1]; in get_capi_ctr_by_nr()
93 if (applid < 1 || applid - 1 >= CAPI_MAXAPPL) in __get_capi_appl_by_nr()
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| /openbmc/linux/Documentation/gpu/amdgpu/display/ |
| H A D | dc-glossary.rst | 7 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere,
19 Application-Specific Integrated Circuit
39 * DCFCLK: Display Controller Fabric Clock
49 Cathode Ray Tube Controller - commonly called "Controller" - Generates
62 Display Controller
68 Display Controller Engine
71 Display Controller HUB
86 Display Data Channel
108 Display Micro-Controller Unit
111 Display Micro-Controller Unit, version B
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