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/openbmc/u-boot/include/dt-bindings/clock/
H A Dtegra186-clock.h375 /** @brief output branch of PLL_C for ISP, controlled by gate CLK_ENB_PLLC_OUT_ISP */
377 /** @brief output branch of PLL_C for VI, controlled by gate CLK_ENB_PLLC_OUT_VE */
379 /** @brief output branch of PLL_C for AON domain, controlled by gate CLK_ENB_PLLC_OUT_AON */
383 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S2 */
385 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S3 */
387 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPDF_IN */
397 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPI1 */
399 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_ISP */
401 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_VI */
403 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC1 */
[all …]
/openbmc/u-boot/drivers/pinctrl/renesas/
H A DKconfig15 The driver is controlled by a device tree node which contains both
25 The driver is controlled by a device tree node which contains both
35 The driver is controlled by a device tree node which contains both
45 The driver is controlled by a device tree node which contains both
55 The driver is controlled by a device tree node which contains both
65 The driver is controlled by a device tree node which contains both
75 The driver is controlled by a device tree node which contains both
85 The driver is controlled by a device tree node which contains both
95 The driver is controlled by a device tree node which contains both
105 The driver is controlled by a device tree node which contains both
/openbmc/u-boot/drivers/pinctrl/
H A DKconfig53 The driver is typically controlled by the device tree.
114 The driver is controlled by a device tree node which contains
148 SoCs. This driver is controlled by a device tree node which
157 The driver is controlled by a device tree node which contains both
167 The driver is controlled by a device tree node which contains
198 The driver is controlled by a device tree node which contains both
208 The driver is controlled by a device tree node which contains both
/openbmc/qemu/linux-headers/linux/
H A Dvfio_ccw.h28 * Note: this is controlled by a capability
40 * Note: this is controlled by a capability
49 * Note: this is controlled by a capability
/openbmc/u-boot/doc/device-tree-bindings/thermal/
H A Drockchip-thermal.txt16 - rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
17 - rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
18 - rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
/openbmc/phosphor-fan-presence/docs/control/
H A Dfans.md35 `xyz.openbmc_project.Control.FanSpeed` for RPM controlled fans or
36 `xyz.openbmc_project.Control.FanPWM` for PWM controlled fans. Required.
/openbmc/u-boot/doc/device-tree-bindings/leds/
H A Dleds-bcm6328.txt6 controller), which can either be controlled by software (exporting the 74x164
9 Some of these Serial LEDs are hardware controlled (e.g. ethernet LEDs) and
11 controlled, so the only chance to keep them working is by using this driver.
H A Dcommon.txt9 "backlight" - LED will act as a back-light, controlled by the framebuffer
/openbmc/u-boot/doc/device-tree-bindings/regulator/
H A Dtps65090.txt18 If DCDCs are externally controlled then this property should be there.
20 If DCDCs are externally controlled and if it is from GPIO then GPIO
21 number should be provided. If it is externally controlled and no GPIO
/openbmc/openbmc/poky/meta/files/common-licenses/
H A DMulanPSL-1.076 …controlled by, or are under common control with a party to this License, ‘control’ means direct or…
86 …here such patent license is only limited to the patent claims owned or controlled by such Contribu…
H A DMulanPSL-2.086 …controlled by, or are under common control with the acting entity under this License, ‘control’ me…
94 …here such patent license is only limited to the patent claims owned or controlled by such Contribu…
/openbmc/qemu/hw/sensor/
H A Dmax34451.c70 | 0 | Power supply monitored by RS0, controlled by PSEN0, and |
73 | 1 | Power supply monitored by RS1, controlled by PSEN1, and |
76 | 2 | Power supply monitored by RS2, controlled by PSEN2, and |
79 | 3 | Power supply monitored by RS3, controlled by PSEN3, and |
82 | 4 | Power supply monitored by RS4, controlled by PSEN4, and |
85 | 5 | Power supply monitored by RS5, controlled by PSEN5, and |
88 | 6 | Power supply monitored by RS6, controlled by PSEN6, and |
91 | 7 | Power supply monitored by RS7, controlled by PSEN7, and |
94 | 8 | Power supply monitored by RS8, controlled by PSEN8, and |
97 | 9 | Power supply monitored by RS9, controlled by PSEN9, and |
[all …]
/openbmc/u-boot/drivers/power/regulator/
H A DKconfig34 by the PMIC device. This driver is controlled by a device tree node
59 controlled by PWM duty ratio. Some of Rockchip board using this kind
61 This driver is controlled by a device tree node
131 by the PMIC device. This driver is controlled by a device tree node
253 by the PMIC device. This driver is controlled by a device tree node
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Control/Power/
H A DCap.interface.yaml51 controlled within the Correction time limit.
75 controlled within the Correction Time Limit.
/openbmc/phosphor-fan-presence/docs/monitor/
H A Dsensors.md28 `xyz.openbmc_project.Control.FanSpeed` for RPM controlled fans or can be set
29 to `xyz.openbmc_project.Control.FanPwm` for PWM controlled fans.
/openbmc/openbmc/meta-ingrasys/meta-zaius/recipes-phosphor/sensors/phosphor-hwmon/obmc/hwmon/
H A Diio-hwmon-battery.conf3 # The battery read is controlled by P2
/openbmc/openbmc/meta-quanta/meta-q71l/recipes-phosphor/sensors/phosphor-hwmon/obmc/hwmon/
H A Diio-hwmon-battery.conf3 # The battery read is controlled by G5
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-kernel/oprofile/oprofile/
H A D0010-oprofile-Determine-the-root-home-directory-dynamical.patch24 <emphasis>must</emphasis> stop it in a controlled manner in order to process
37 <span class="emphasis"><em>must</em></span> stop it in a controlled manner in order to process
/openbmc/openbmc/meta-quanta/meta-gbs/recipes-phosphor/sensors/phosphor-hwmon/obmc/hwmon/
H A Diio-hwmon-battery.conf9 # The battery read is controlled by GPIO18
/openbmc/openbmc/meta-facebook/meta-yosemite5/recipes-phosphor/leds/
H A Dphosphor-led-manager_%.bbappend6 # On Yv5, the power LED is controlled by the CPLD.
/openbmc/u-boot/board/work-microwave/work_92105/
H A Dwork_92105_display.h9 * controlled through a MAX6957AAX SPI port expander, two
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Demif4.c82 /* Set CKE to be controlled by EMIF/DDR PHY */ in config_ddr()
93 /* Set CKE to be controlled by EMIF/DDR PHY */ in config_ddr()
/openbmc/u-boot/Documentation/devicetree/bindings/axi/
H A Dgdsys,ihs_axi.txt4 the connected devices (usually IP cores) can be controlled via software.
/openbmc/phosphor-power/phosphor-regulators/
H A DREADME.md6 regulators. The application is controlled by a JSON configuration file.
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage-memphis.cfg162 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
163 # bit3-2: 00, ODT1 controlled by register
169 # bit9-8: 0, ODTEn, controlled by ODT0Rd and ODT0Wr

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