Searched +full:codec +full:- +full:gpio8 (Results 1 – 5 of 5) sorted by relevance
2 * This file is dual-licensed: you can use it either under the terms41 /dts-v1/;42 #include "rk3288-rock2-som.dtsi"46 compatible = "radxa,rock2-square", "rockchip,rk3288";49 stdout-path = "serial2:115200n8";52 ir: ir-receiver {53 compatible = "gpio-ir-receiver";54 gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;55 pinctrl-names = "default";56 pinctrl-0 = <&ir_int>;[all …]
1 // SPDX-License-Identifier: GPL-2.08 #include <dt-bindings/clock/rockchip,rk808.h>9 #include <dt-bindings/input/input.h>18 stdout-path = &uart2;22 u-boot,dm-pre-reloc;23 u-boot,boot0 = &spi_flash;28 pinctrl-names = "default";29 pinctrl-0 = <&fw_wp_ap>;30 write-protect-gpio = <&gpio7 6 GPIO_ACTIVE_LOW>;35 compatible = "pwm-backlight";[all …]
1 // SPDX-License-Identifier: GPL-2.0+3 #include <dt-bindings/gpio/gpio.h>4 #include <dt-bindings/interrupt-controller/irq.h>5 #include <dt-bindings/interrupt-controller/arm-gic.h>6 #include <dt-bindings/pinctrl/rockchip.h>7 #include <dt-bindings/clock/rk3288-cru.h>8 #include <dt-bindings/power-domain/rk3288.h>9 #include <dt-bindings/thermal/thermal.h>10 #include <dt-bindings/video/rk3288.h>16 interrupt-parent = <&gic>;[all …]
1 // SPDX-License-Identifier: GPL-2.08 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/power/r8a7792-sysc.h>15 #address-cells = <2>;16 #size-cells = <2>;38 compatible = "fixed-clock";39 #clock-cells = <0>;41 clock-frequency = <0>;[all …]
2 * linux/include/asm-arm/arch-pxa/pxa-regs.h12 * - 2003/01/20: Robert Schwebel <r.schwebel@pengutronix.de13 * Original file taken from linux-2.4.19-rmk4-pxa1. Added some definitions.22 /* FIXME hack so that SA-1111.h will work [cb] */134 #define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */147 #define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */302 #define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */309 #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */354 #define SACR1 0x40400004 /* Serial Audio I 2 S/MSB-Justified Control Register */[all …]