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Searched full:cmu_fsys (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433.dtsi415 cmu_fsys: clock-controller@156e0000 { label
1746 clocks = <&cmu_fsys CLK_ACLK_USBDRD30>,
1747 <&cmu_fsys CLK_SCLK_USBDRD30>,
1748 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>,
1749 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK>;
1758 clocks = <&cmu_fsys CLK_SCLK_USBDRD30>,
1759 <&cmu_fsys CLK_ACLK_USBDRD30>,
1760 <&cmu_fsys CLK_SCLK_USBDRD30>;
1772 clocks = <&cmu_fsys CLK_ACLK_USBDRD30>, <&xxti>,
1773 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>,
[all …]
H A Dexynos5433-tm2-common.dtsi262 &cmu_fsys {
265 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
266 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
267 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
268 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
269 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
270 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
277 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
278 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
279 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
[all …]
H A Dexynos7885.dtsi243 cmu_fsys: clock-controller@13400000 { label
302 clocks = <&cmu_fsys CLK_GOUT_MMC_EMBD_ACLK>,
303 <&cmu_fsys CLK_GOUT_MMC_EMBD_SDCLKIN>;
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dsamsung,exynos-pcie.yaml104 clocks = <&cmu_fsys CLK_PCIE>, <&cmu_fsys CLK_PCLK_PCIE_PHY>;
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos7885.c184 /* List of parent clocks for Muxes in CMU_TOP: for CMU_FSYS */
676 /* ---- CMU_FSYS ------------------------------------------------------------ */
678 /* Register Offset definitions for CMU_FSYS (0x13400000) */
705 /* List of parent clocks for Muxes in CMU_FSYS */
H A Dclk-exynos5260.h101 *Registers for CMU_FSYS
H A Dclk-exynos5260.c421 /* CMU_FSYS */
H A Dclk-exynos5433.c1964 * Register offset definitions for CMU_FSYS
/openbmc/linux/include/dt-bindings/clock/
H A Dexynos7885.h134 /* CMU_FSYS */
H A Dexynos5260-clk.h262 /* List Of Clocks For CMU_FSYS */
H A Dexynos5433.h508 /* CMU_FSYS */
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos7885-clock.yaml103 - description: CMU_FSYS bus clock (from CMU_TOP)
H A Dsamsung,exynos5433-clock.yaml39 # CMU_FSYS which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs