/openbmc/u-boot/board/freescale/lx2160a/ |
H A D | lx2160a.c | 258 printf("Clock1 = %sMHz ", freq[clock]); in checkboard() 265 printf("Clock1 = %sMHz ", freq[clock]); in checkboard() 272 printf("Clock1 = %sMHz Clock2 = %sMHz\n", freq[clock], freq[clock]); in checkboard() 276 puts("SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 161.13MHz\n"); in checkboard() 277 puts("SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz\n"); in checkboard() 278 puts("SERDES3 Reference: Clock1 = 100MHz Clock2 = 100Hz\n"); in checkboard()
|
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/ |
H A D | clock_ti816x.c | 200 /* Power up clock1-7 */ in main_pll_init_ti816x() 203 /* Program the freq and divider values for clock1-7 */ in main_pll_init_ti816x() 266 /* Power up clock1-5 */ in ddr_pll_init_ti816x() 269 /* Program the freq and divider values for clock1-3 */ in ddr_pll_init_ti816x()
|
/openbmc/u-boot/board/freescale/ls2080ardb/ |
H A D | ls2080ardb.c | 105 printf("Clock1 = 100MHz "); in checkboard() 126 printf("Clock1 = 156.25MHz "); in checkboard() 131 printf("Clock1 = 100MHz "); in checkboard()
|
/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | renesas,sdhi.yaml | 130 - description: IMCLK, SDHI channel main clock1. 132 4 times that of SDHI channel main clock1.
|
/openbmc/linux/Documentation/devicetree/bindings/ata/ |
H A D | snps,dwc-ahci.yaml | 62 clocks = <&clock1>, <&clock2>;
|
/openbmc/u-boot/board/freescale/ls2080aqds/ |
H A D | ls2080aqds.c | 109 printf("Clock1 = %sMHz ", freq[clock]); in checkboard() 115 printf("Clock1 = %sMHz ", freq[clock]); in checkboard()
|
/openbmc/linux/drivers/clk/x86/ |
H A D | clk-fch.c | 19 /* Auxiliary clock1 enable bit */
|
/openbmc/linux/Documentation/devicetree/bindings/regulator/ |
H A D | fixed-regulator.yaml | 128 clocks = <&clock1>;
|
/openbmc/u-boot/arch/arm/dts/ |
H A D | zynqmp-clk.dtsi | 56 dp_aud_clk: clock1 {
|
/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | idt,versaclock5.yaml | 107 Description of one of the outputs (OUT1..OUT4). See "Clock1 Output
|
/openbmc/linux/sound/soc/codecs/ |
H A D | wm8903.c | 1457 u16 clock1 = snd_soc_component_read(component, WM8903_CLOCK_RATES_1); in wm8903_hw_params() local 1478 clock1 &= ~WM8903_SAMPLE_RATE_MASK; in wm8903_hw_params() 1479 clock1 |= sample_rates[dsp_config].value; in wm8903_hw_params() 1533 clock1 &= ~(WM8903_CLK_SYS_RATE_MASK | in wm8903_hw_params() 1535 clock1 |= clk_sys_ratios[clk_config].rate << WM8903_CLK_SYS_RATE_SHIFT; in wm8903_hw_params() 1536 clock1 |= clk_sys_ratios[clk_config].mode << WM8903_CLK_SYS_MODE_SHIFT; in wm8903_hw_params() 1574 snd_soc_component_write(component, WM8903_CLOCK_RATES_1, clock1); in wm8903_hw_params()
|
H A D | wm8904.c | 1303 unsigned int clock1 = 0; in wm8904_hw_params() local 1355 clock1 |= (clk_sys_rates[best].clk_sys_rate in wm8904_hw_params() 1371 clock1 |= (sample_rates[best].sample_rate in wm8904_hw_params() 1411 WM8904_CLK_SYS_RATE_MASK, clock1); in wm8904_hw_params()
|
/openbmc/linux/drivers/gpu/drm/ |
H A D | drm_edid.c | 4267 unsigned int clock1, clock2; in drm_match_cea_mode_clock_tolerance() local 4272 clock1 = cea_mode.clock; in drm_match_cea_mode_clock_tolerance() 4275 if (abs(to_match->clock - clock1) > clock_tolerance && in drm_match_cea_mode_clock_tolerance() 4308 unsigned int clock1, clock2; in drm_match_cea_mode() local 4313 clock1 = cea_mode.clock; in drm_match_cea_mode() 4316 if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) && in drm_match_cea_mode() 4374 unsigned int clock1, clock2; in drm_match_hdmi_mode_clock_tolerance() local 4377 clock1 = hdmi_mode->clock; in drm_match_hdmi_mode_clock_tolerance() 4380 if (abs(to_match->clock - clock1) > clock_tolerance && in drm_match_hdmi_mode_clock_tolerance() 4412 unsigned int clock1, clock2; in drm_match_hdmi_mode() local [all …]
|
/openbmc/u-boot/board/freescale/t1040qds/ |
H A D | t1040qds.c | 72 printf("Clock1=%sMHz ", freq[clock]); in checkboard()
|
/openbmc/u-boot/board/freescale/ls1088a/ |
H A D | ls1088a.c | 305 printf("Clock1 = %sMHz ", freq[clock]); in checkboard() 311 printf("Clock1 = %sMHz ", freq[clock]); in checkboard()
|
/openbmc/u-boot/board/freescale/t102xqds/ |
H A D | t102xqds.c | 68 printf("Clock1=%sMHz ", freq[clock]); in checkboard()
|
/openbmc/intel-ipmi-oem/include/ |
H A D | oemcommands.hpp | 283 uint8_t clock1; member
|
/openbmc/qemu/hw/misc/ |
H A D | npcm7xx_mft.c | 489 s->clock_1 = qdev_init_clock_out(dev, "clock1"); in npcm7xx_mft_init()
|
/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_display.h | 465 bool intel_fuzzy_clock_check(int clock1, int clock2);
|
H A D | intel_display.c | 4819 bool intel_fuzzy_clock_check(int clock1, int clock2) in intel_fuzzy_clock_check() argument 4823 if (clock1 == clock2) in intel_fuzzy_clock_check() 4826 if (!clock1 || !clock2) in intel_fuzzy_clock_check() 4829 diff = abs(clock1 - clock2); in intel_fuzzy_clock_check() 4831 if (((((diff + clock1 + clock2) * 100)) / (clock1 + clock2)) < 105) in intel_fuzzy_clock_check()
|
/openbmc/linux/sound/ppc/ |
H A D | snd_ps3_reg.h | 367 Sets the divide ration of Master Clock1 (clock output from
|
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192de/ |
H A D | phy.c | 3464 /* enable ad/da clock1 for dual-phy reg0x888 */ in rtl92d_update_bbrf_configuration() 3485 /* disable ad/da clock1,0x888 */ in rtl92d_update_bbrf_configuration()
|
/openbmc/intel-ipmi-oem/src/ |
H A D | oemcommands.cpp | 364 Data->clock2, Data->clock1, Data->node6, Data->node5, Data->node4, in ipmiOEMSetSystemGUID()
|