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/openbmc/linux/Documentation/devicetree/bindings/power/supply/
H A Dgpio-charger.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/gpio-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
19 const: gpio-charger
21 charger-type:
23 - unknown
24 - battery
25 - ups
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/openbmc/linux/drivers/power/supply/
H A Dgpio-charger.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
18 #include <linux/power/gpio-charger.h>
58 struct gpio_mapping mapping; in set_charge_current_limit() local
59 int ndescs = gpio_charger->current_limit_gpios->ndescs; in set_charge_current_limit()
60 struct gpio_desc **gpios = gpio_charger->current_limit_gpios->desc; in set_charge_current_limit()
63 if (!gpio_charger->current_limit_map_size) in set_charge_current_limit()
64 return -EINVAL; in set_charge_current_limit()
66 for (i = 0; i < gpio_charger->current_limit_map_size; i++) { in set_charge_current_limit()
67 if (gpio_charger->current_limit_map[i].limit_ua <= val) in set_charge_current_limit()
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H A Dbq24190_charger.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <linux/extcon-provider.h>
32 #define BQ24190_REG_POC 0x01 /* Power-On Configuration */
50 #define BQ24190_REG_CCC 0x02 /* Charge Current Control */
57 #define BQ24190_REG_PCTCC 0x03 /* Pre-charge/Termination Current Cntl */
69 #define BQ24190_REG_CVC 0x04 /* Charge Voltage Control */
78 #define BQ24190_REG_CTTC 0x05 /* Charge Term/Timer Control */
152 * reads return the current value. In order to return the fault status
190 * The tables below provide a 2-way mapping for the value that goes in
191 * the register field and the real-world value that it represents.
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H A Dbq27xxx_battery.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de>
19 * https://www.ti.com/product/bq27510-g1
20 * https://www.ti.com/product/bq27510-g2
21 * https://www.ti.com/product/bq27510-g3
22 * https://www.ti.com/product/bq27520-g1
23 * https://www.ti.com/product/bq27520-g2
24 * https://www.ti.com/product/bq27520-g3
25 * https://www.ti.com/product/bq27520-g4
26 * https://www.ti.com/product/bq27530-g1
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl-b1x5pv2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 // Copyright 2018-2021 General Electric Company
7 // Copyright 2018-2021 Collabora
9 #include <dt-bindings/input/input.h>
10 #include "imx6dl-qmx6.dtsi"
14 stdout-path = &uart3;
20 operating-points = <
25 fsl,soc-operating-points = <
26 /* ARM kHz SOC-PU uV */
33 operating-points = <
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/openbmc/linux/mm/
H A Dpage-writeback.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * mm/page-writeback.c
26 #include <linux/backing-dev.h>
54 #define DIRTY_POLL_THRESH (128 >> (PAGE_SHIFT - 10))
100 * The interval between `kupdate'-style writebacks
119 /* End of sysctl-exported parameters */
137 unsigned long wb_dirty; /* per-wb counterparts */
147 * reflect changes in current writeout rate.
155 .wb_completions = &(__wb)->completions
161 .wb_completions = &(__wb)->memcg_completions, \
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H A Dmemcontrol.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* memcontrol.c - Memory Controller
19 * Charge lifetime sanitation
38 #include <linux/page-flags.h>
39 #include <linux/backing-dev.h>
109 * Cgroups above their limits are maintained in a RB-Tree, independent of
201 * limit reclaim to prevent infinite loops, if they ever occur.
206 /* for encoding cft->private value on file */
235 return tsk_is_oom_victim(current) || fatal_signal_pending(current) || in task_is_dying()
236 (current->flags & PF_EXITING); in task_is_dying()
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H A Drmap.c2 * mm/rmap.c - physical to virtual reverse mappings
7 * Simple, low overhead reverse mapping scheme.
23 * inode->i_rwsem (while writing or truncating, not reading or faulting)
24 * mm->mmap_lock
25 * mapping->invalidate_lock (in filemap_fault)
26 * page->flags PG_locked (lock_page)
29 * mapping->i_mmap_rwsem
30 * anon_vma->rwsem
31 * mm->page_table_lock or pte_lock
34 * mapping->private_lock (in block_dirty_folio)
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/openbmc/linux/Documentation/admin-guide/cgroup-v1/
H A Dmemory.rst8 here but make sure to check the current code if you need a deeper
18 we call it "memory cgroup". When you see git-log and source code, you'll
30 Memory-hungry applications can be isolated and limited to a smaller
42 Current Status: linux-2.6.34-mmotm(development version of 2010/April)
46 - accounting anonymous pages, file caches, swap caches usage and limiting them.
47 - pages are linked to per-memcg LRU exclusively, and there is no global LRU.
48 - optionally, memory+swap usage can be accounted and limited.
49 - hierarchical accounting
50 - soft limit
51 - moving (recharging) account at moving a task is selectable.
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/openbmc/linux/include/drm/
H A Ddrm_gpuva_mgr.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * Permission is hereby granted, free of charge, to any person obtaining a
38 * enum drm_gpuva_flags - flags for struct drm_gpuva
51 * Flag indicating that the &drm_gpuva is a sparse mapping.
62 * struct drm_gpuva - structure to track a GPU VA mapping
64 * This structure represents a GPU VA mapping and is associated with a
76 * @flags: the &drm_gpuva_flags for this mapping
116 * @rb: structure containing data to store &drm_gpuvas in a rb-tree
120 * @rb: the rb-tree node
128 * through the rb-tree while doing modifications on the rb-tree
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/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_v13_0_0.h4 * Permission is hereby granted, free of charge, to any person obtaining a
157 // VR Mapping Bit Defines
403 //This is aligned with RSMU PGFSM Register Mapping
409 //This is aligned with RSMU PGFSM Register Mapping
503 uint8_t SnapToDiscrete; // 0 - Fine grained DPM, 1 - Discrete DPM
506 LinearInt_t ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz->GHz)
944 …oRun[NUM_FEATURES / 32]; // Features that PMFW will attempt to enable. Use FEATURE_*_BIT as mapping
949 …uint8_t MemoryTemperatureTypeMask; // Bit mapping indicating which methods of memory temperat…
953 …uint16_t SocketPowerLimitAc[PPT_THROTTLER_COUNT]; // In Watts. Power limit that PMFW attempts to c…
954 …uint16_t SocketPowerLimitDc[PPT_THROTTLER_COUNT]; // In Watts. Power limit that PMFW attempts to …
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H A Dsmu13_driver_if_v13_0_7.h4 * Permission is hereby granted, free of charge, to any person obtaining a
158 // VR Mapping Bit Defines
404 //This is aligned with RSMU PGFSM Register Mapping
410 //This is aligned with RSMU PGFSM Register Mapping
504 uint8_t SnapToDiscrete; // 0 - Fine grained DPM, 1 - Discrete DPM
507 LinearInt_t ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz->GHz)
953 …oRun[NUM_FEATURES / 32]; // Features that PMFW will attempt to enable. Use FEATURE_*_BIT as mapping
958 …uint8_t MemoryTemperatureTypeMask; // Bit mapping indicating which methods of memory temperat…
962 …uint16_t SocketPowerLimitAc[PPT_THROTTLER_COUNT]; // In Watts. Power limit that PMFW attempts to c…
963 …uint16_t SocketPowerLimitDc[PPT_THROTTLER_COUNT]; // In Watts. Power limit that PMFW attempts to …
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H A Dsmu11_driver_if_arcturus.h4 * Permission is hereby granted, free of charge, to any person obtaining a
44 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
45 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
46 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)
47 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)
48 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)
49 #define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)
50 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1)
51 #define MAX_XGMI_LEVEL (NUM_XGMI_LEVELS - 1)
52 #define MAX_XGMI_PSTATE_LEVEL (NUM_XGMI_PSTATE_LEVELS - 1)
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H A Dsmu11_driver_if_navi10.h4 * Permission is hereby granted, free of charge, to any person obtaining a
50 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
51 #define MAX_SMNCLK_DPM_LEVEL (NUM_SMNCLK_DPM_LEVELS - 1)
52 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)
53 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)
54 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)
55 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
56 #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)
57 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)
58 #define MAX_PIXCLK_DPM_LEVEL (NUM_PIXCLK_DPM_LEVELS - 1)
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/openbmc/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_svm.c4 * Permission is hereby granted, free of charge, to any person obtaining a
78 #define SVM_DBG(s,f,a...) NV_DEBUG((s)->drm, "svm: "f"\n", ##a)
79 #define SVM_ERR(s,f,a...) NV_WARN((s)->drm, "svm: "f"\n", ##a)
97 list_for_each_entry(ivmm, &svm->inst, head) { in nouveau_ivmm_find()
98 if (ivmm->inst == inst) in nouveau_ivmm_find()
105 NV_DEBUG((s)->vmm->cli->drm, "svm-%p: "f"\n", (s), ##a)
107 NV_WARN((s)->vmm->cli->drm, "svm-%p: "f"\n", (s), ##a)
119 args->va_start &= PAGE_MASK; in nouveau_svmm_bind()
120 args->va_end = ALIGN(args->va_end, PAGE_SIZE); in nouveau_svmm_bind()
123 if (args->reserved0 || args->reserved1) in nouveau_svmm_bind()
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/openbmc/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_flat_memory.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
57 * System Unified Address - SUA
61 * a combination of vidMM/driver software components. The current virtual
81 * HSA64 - ATC/IOMMU 64b
91 * unified address” feature (SUA) is the mapping of GPUVM and ATC address
113 * A 64b pointer is compared to the apertures that are defined (Base/Limit), in
138 * In all cases (no matter where the 64b -> 49b conversion is done), the gfxip
155 * The default aperture isn’t an actual base/limit aperture; it is just the
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H A Dkfd_events.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
43 bool event_age_enabled; /* set to true when last_event_age is non-zero */
47 * Each signal event needs a 64-bit signal slot where the signaler will write
61 return page->kernel_address; in page_slots()
82 page->kernel_address = backing_store; in allocate_signal_page()
83 page->need_to_free_pages = true; in allocate_signal_page()
100 if (!p->signal_page) { in allocate_event_notification_slot()
101 p->signal_page = allocate_signal_page(p); in allocate_event_notification_slot()
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/openbmc/linux/Documentation/admin-guide/
H A Dcgroup-v2.rst1 .. _cgroup-v2:
11 conventions of cgroup v2. It describes all userland-visible aspects
14 v1 is available under :ref:`Documentation/admin-guide/cgroup-v1/index.rst <cgroup-v1>`.
19 1-1. Terminology
20 1-2. What is cgroup?
22 2-1. Mounting
23 2-2. Organizing Processes and Threads
24 2-2-1. Processes
25 2-2-2. Threads
26 2-3. [Un]populated Notification
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/openbmc/linux/drivers/gpu/drm/i915/gem/
H A Di915_gem_userptr.c2 * SPDX-License-Identifier: MIT
4 * Copyright © 2012-2014 Intel Corporation
11 * Permission is hereby granted, free of charge, to any person obtaining a
21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
51 * i915_gem_userptr_invalidate - callback to notify about mm change
65 struct drm_i915_private *i915 = to_i915(obj->base.dev); in i915_gem_userptr_invalidate()
71 write_lock(&i915->mm.notifier_lock); in i915_gem_userptr_invalidate()
75 write_unlock(&i915->mm.notifier_lock); in i915_gem_userptr_invalidate()
82 * cannot currently force non-consistent batch buffers to preempt in i915_gem_userptr_invalidate()
85 if (current->flags & PF_EXITING) in i915_gem_userptr_invalidate()
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/openbmc/linux/kernel/
H A Dfork.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * 'fork.c' contains the help-routines for the 'fork' system call
82 #include <linux/posix-timers.h>
83 #include <linux/user-return-notifier.h>
131 static int max_threads; /* tunable limit on nr_threads */
220 if (try_release_thread_stack_to_cache(vm_stack->stack_vm_area)) in thread_stack_free_rcu()
228 struct vm_stack *vm_stack = tsk->stack; in thread_stack_delayed_free()
230 vm_stack->stack_vm_area = tsk->stack_vm_area; in thread_stack_delayed_free()
231 call_rcu(&vm_stack->rcu, thread_stack_free_rcu); in thread_stack_delayed_free()
245 vfree(vm_stack->addr); in free_vm_stack_cache()
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/openbmc/linux/sound/soc/codecs/
H A Dtas5086.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * - implement DAPM and input muxing
9 * - implement modulation limit
10 * - implement non-default PWM start
13 * because the registers are of unequal size, and multi-byte registers
18 * it doesn't matter because the entire map can be accessed as 8-bit
21 * routines have to be open-coded.
71 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
73 #define TAS5086_MOD_LIMIT 0x10 /* Modulation limit register */
76 #define TAS5086_SPLIT_CAP_CHARGE 0x1a /* Split cap charge period register */
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/openbmc/u-boot/include/
H A Dec_commands.h2 * Use of this source code is governed by a BSD-style license that can be
18 * - CMD is the command code. (defined by EC_CMD_ constants)
19 * - ERR is the error code. (defined by EC_RES_ constants)
20 * - Px is the optional payload.
23 * - S is the checksum which is the sum of all payload bytes.
31 * Current version of this protocol
59 /* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
79 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
80 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
81 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
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/openbmc/qemu/include/block/
H A Dblock_int-common.h6 * Permission is hereby granted, free of charge, to any person obtaining a copy
28 #include "block/block-common.h"
29 #include "block/block-global-state.h"
105 * certain callbacks that refer to data (see block.c) to their bs->file
106 * or bs->backing (whichever one exists) if the driver doesn't implement
108 * -ENOTSUP.
115 * (And this filtered child must then be bs->file or bs->backing.)
120 * If true, filtered child is bs->backing. Otherwise it's bs->file.
121 * Two internal filters use bs->backing as filtered child and has this
123 * filters in tests/unit/test-bdrv-graph-mod.c.
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/openbmc/linux/include/linux/platform_data/
H A Dcros_ec_commands.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from
22 * Current version of this protocol
52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
77 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
78 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
79 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
81 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
82 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
83 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
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/openbmc/linux/drivers/gpu/drm/radeon/
H A Dradeon_uvd.c5 * Permission is hereby granted, free of charge, to any person obtaining a
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
72 INIT_DELAYED_WORK(&rdev->uvd.idle_work, radeon_uvd_idle_work_handler); in radeon_uvd_init()
74 switch (rdev->family) { in radeon_uvd_init()
134 return -EINVAL; in radeon_uvd_init()
137 rdev->uvd.fw_header_present = false; in radeon_uvd_init()
138 rdev->uvd.max_handles = RADEON_DEFAULT_UVD_HANDLES; in radeon_uvd_init()
141 r = request_firmware(&rdev->uvd_fw, fw_name, rdev->dev); in radeon_uvd_init()
143 dev_err(rdev->dev, "radeon_uvd: Can't load firmware \"%s\"\n", in radeon_uvd_init()
146 struct common_firmware_header *hdr = (void *)rdev->uvd_fw->data; in radeon_uvd_init()
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