Searched full:cdce925 (Results 1 – 5 of 5) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | ti,cdce925.yaml | 4 $id: http://devicetree.org/schemas/clock/ti,cdce925.yaml# 16 - CDCE(L)925: 2-PLL, 5 Outputs https://www.ti.com/product/cdce925 24 - ti,cdce925 89 cdce925: clock-controller@64 { 90 compatible = "ti,cdce925";
|
/openbmc/linux/drivers/clk/ |
H A D | clk-cdce925.c | 30 CDCE925, enumerator 42 [CDCE925] = { .num_plls = 2, .num_outputs = 5 }, 617 /* The CDCE925 uses a funky way to read/write registers. Bulk mode is 626 { "cdce925", CDCE925 }, 827 { .compatible = "ti,cdce925" }, 836 .name = "cdce925",
|
H A D | Makefile | 29 obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o
|
H A D | Kconfig | 196 For example, the CDCE925 contains two PLLs with spread-spectrum
|
/openbmc/linux/ |
H A D | opengrok0.0.log | [all...] |