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/openbmc/bmcweb/redfish-core/schema/dmtf/json-schema/
H A DCollectionCapabilities.v1_4_1.json6 "Capability": { object
8 … "description": "This type describes a capability of a collection for a specific use case.",
9 …"longDescription": "This type shall describe a capability of a resource collection in terms of how…
39 …perty shall contain an enumerated value that describes the use case for this capability instance.",
72 "$ref": "#/definitions/Capability"
113 … "description": "An array of links to resources associated with this capability.",
117 … "This property shall contain an array of links to resources that are related to this capability.",
146 …"ComputerSystemComposition": "This capability describes a client creating a new computer system re…
147 …"ComputerSystemConstrainedComposition": "This capability describes a client creating a new compute…
148 …"RegisterResourceBlock": "This capability describes a client creating a new resource block from an…
[all …]
/openbmc/qemu/docs/
H A Dpcie_pci_bridge.txt35 Red Hat vendor-specific PCI capability, added to the root port
38 Capability layout (defined in include/hw/pci/pci_bridge.h):
40 uint8_t id; Standard PCI capability header field
41 uint8_t next; Standard PCI capability header field
42 uint8_t len; Standard PCI vendor-specific capability header field
44 uint8_t type; Red Hat vendor-specific capability type
62 At the moment this capability is used only in QEMU generic PCIe root port
63 (-device pcie-root-port). Capability construction function takes all reservation
87 - Root ports: 1 QEMU generic root port with the capability mentioned above,
88 2 QEMU generic root ports without this capability;
H A Dpcie_sriov.txt6 SR/IOV (Single Root I/O Virtualization) is an optional extended capability
24 capability. All VFs have the same BARs and BAR sizes.
34 you would need to add a PCI Express capability in the normal PCI
35 capability list. You might also want to add an ARI (Alternative
36 Routing-ID Interpretation) capability to indicate that your device
54 /* Add and initialize the SR/IOV capability */
74 except for the SR/IOV capability. Then you need to set up the VF BARs as
/openbmc/qemu/include/hw/cxl/
H A Dcxl_component.h35 * Capability registers are defined at the top of the CXL.cache/mem region and
41 /* CXL r3.1 Section 8.2.4.1: CXL Capability Header Register */
61 * Capability structures contain the actual registers that the CXL component
66 /* CXL r3.1 Section 8.2.4.17: CXL RAS Capability Structure */
107 /* CXL r3.1 Section 8.2.4.18: CXL Security Capability Structure */
112 /* CXL r3.1 Section 8.2.4.19: CXL Link Capability Structure */
118 /* CXL r3.1 Section 8.2.4.20: CXL HDM Decoder Capability Structure */
182 * CXL r3.1 Section 8.2.4.21: CXL Extended Security Capability Structure
191 /* CXL r3.1 Section 8.2.4.22: CXL IDE Capability Structure */
197 /* CXL r3.1 Section 8.2.4.23 - CXL Snoop Filter Capability Structure */
/openbmc/qemu/linux-headers/linux/
H A Dvfio_zdev.h20 * This capability provides a set of descriptive information about the
40 * This capability provides a set of descriptive information about the group of
62 * This capability provides the utility string for the associated device, which
75 * This capability provides the PCI function path string, which is an identifier
H A Dvfio_ccw.h28 * Note: this is controlled by a capability
40 * Note: this is controlled by a capability
49 * Note: this is controlled by a capability
/openbmc/qemu/include/system/
H A Dhost_iommu_device.h85 * @get_cap: check if a host IOMMU device capability is supported.
92 * @cap: capability to check.
94 * @errp: pass an Error out when fails to query capability.
119 * Host IOMMU device capability list.
/openbmc/bmcweb/redfish-core/schema/dmtf/csdl/
H A DCollectionCapabilities_v1.xml43 …<Property Name="Capabilities" Type="Collection(CollectionCapabilities.v1_0_0.Capability)" Nullable…
49 <ComplexType Name="Capability">
51 …<Annotation Term="OData.Description" String="This type describes a capability of a collection for …
52 …<Annotation Term="OData.LongDescription" String="This type shall describe a capability of a resour…
63 …erty shall contain an enumerated value that describes the use case for this capability instance."/>
75 …<Annotation Term="OData.Description" String="This capability describes a client creating a new com…
78 …<Annotation Term="OData.Description" String="This capability describes a client creating a new com…
89 …<Annotation Term="OData.Description" String="This capability describes a client creating a new vol…
92 …<Annotation Term="OData.Description" String="This capability describes a client creating a new res…
103 …<Annotation Term="OData.Description" String="This capability describes a client creating a new res…
[all …]
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/PersistentMemory/
H A DSecurityCapabilities.interface.yaml2 Implement to provide security capability attributes.
11 Memory passphrase set capability.
/openbmc/openbmc/poky/meta/recipes-graphics/x11-common/
H A Dxserver-nodm-init_3.0.bb12 file://capability.conf \
44 install -D capability.conf ${D}${sysconfdir}/security/capability.conf
45 sed -i "s:@USER@:${XUSER}:" ${D}${sysconfdir}/security/capability.conf
/openbmc/qemu/tests/qemu-iotests/tests/
H A Dqsd-migrate.out14 …et-capabilities", "arguments": {"capabilities": [{"capability": "events", "state": true}, {"capabi…
16 …et-capabilities", "arguments": {"capabilities": [{"capability": "events", "state": true}, {"capabi…
/openbmc/qemu/include/hw/pci/
H A Dpcie_regs.h12 /* express capability */
14 #define PCI_EXP_VER1_SIZEOF 0x14 /* express capability of ver. 1 */
15 #define PCI_EXP_VER2_SIZEOF 0x3c /* express capability of ver. 2 */
181 /* DOE Capability Register Fields */
H A Dpci_bridge.h165 uint8_t id; /* Standard PCI capability header field */
166 uint8_t next; /* Standard PCI capability header field */
167 uint8_t len; /* Standard PCI vendor-specific capability header field */
168 uint8_t type; /* Red Hat vendor-specific capability type.
185 * capability in PCI configuration space to reserve on firmware init.
H A Dpcie.h59 /* Offset of express capability in config space */
89 /* PCI express capability helper functions */
126 /* ARI forwarding capability and control */
131 /* PCI express extended capability helper functions */
H A Dpcie_sriov.h48 * @offset: The offset of the SR-IOV capability.
51 * Initializes a PF with user-created VFs, adding the ARI extended capability to
77 /* SR/IOV capability config write handler */
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/
H A DCpu.interface.yaml41 type: array[enum[self.Capability]]
43 The set of boolean flags for processor's capability, such as 64-bit
66 - name: Capability
/openbmc/qemu/hw/xen/
H A Dxen_pt_config_init.c35 /* A return value of 1 means the capability should NOT be exposed to guest. */
40 /* The PCI Express Capability Structure of the VF of Intel 82599 10GbE in xen_pt_hide_dev_cap()
48 * PCI Express Capability Structure of the VF of Intel 82599 10GbE in xen_pt_hide_dev_cap()
50 * Register is 0, so the Capability Version is 0 and in xen_pt_hide_dev_cap()
783 * Vital Product Data Capability
786 /* Vital Product Data Capability Structure reg static information table */
814 * Vendor Specific Capability
817 /* Vendor Specific Capability Structure reg static information table */
836 * PCI Express Capability
920 /* PCI Express Capability Structure reg static information table */
[all …]
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-support/libexosip2/
H A Dlibexosip2_5.3.0.bb1 SUMMARY = "Extend the capability of the oSIP library"
2 DESCRIPTION = "eXosip is a GPL library that extend the capability of \
/openbmc/qemu/include/standard-headers/linux/
H A Dpci_regs.h56 #define PCI_STATUS_CAP_LIST 0x10 /* Support Capability List */
122 #define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */
208 /* Capability lists */
210 #define PCI_CAP_LIST_ID 0 /* Capability ID */
232 #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
233 #define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
270 #define PCI_AGP_RFU 3 /* Rest of capability flags */
313 #define PCI_MSI_RFU 3 /* Rest of capability flags */
323 /* MSI-X registers (in MSI-X capability) */
371 #define PCI_EA_NUM_ENT 2 /* Number of Capability Entries */
[all …]
/openbmc/qemu/hw/s390x/
H A Ds390-pci-vfio.c41 * a big enough buffer to hold the entire capability chain. in s390_pci_update_dma_avail()
56 /* If the capability exists, update with the current value */ in s390_pci_update_dma_avail()
116 /* If capability not provided, just leave the defaults in place */ in s390_pci_read_base()
194 * If capability not provided or the underlying hostdev is simulated, just in s390_pci_read_group()
271 /* If capability not provided, just leave the defaults in place */ in s390_pci_read_util()
298 /* If capability not provided, just leave the defaults in place */ in s390_pci_read_pfip()
325 * if a fh could not be obtained (ioctl failed or capability version does
348 * found in the capability chain; defaults will remain for any CLP features not
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/android-tools/android-tools/core/
H A D0010-Use-linux-capability.h-on-linux-systems-too.patch4 Subject: [PATCH] Use linux/capability.h on linux systems too
21 #include <linux/capability.h>
/openbmc/openbmc/poky/meta/recipes-support/libcap-ng/
H A Dlibcap-ng.inc22 EXTRA_OECONF:append:class-target = " --with-capability_header=${STAGING_INCDIR}/linux/capability.h"
23 EXTRA_OECONF:append:class-nativesdk = " --with-capability_header=${STAGING_INCDIR}/linux/capability
/openbmc/u-boot/include/
H A Dpci.h36 #define PCI_STATUS_CAP_LIST 0x10 /* Support Capability List */
226 #define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */
313 /* Capability lists */
315 #define PCI_CAP_LIST_ID 0 /* Capability ID */
337 #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
338 #define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
365 #define PCI_AGP_RFU 3 /* Rest of capability flags */
408 #define PCI_MSI_RFU 3 /* Rest of capability flags */
426 #define PCI_EXT_CAP_ID_VC 0x02 /* Virtual Channel Capability */
432 #define PCI_EXT_CAP_ID_MFVC 0x08 /* Multi-Function VC Capability */
[all …]
/openbmc/u-boot/drivers/video/bridge/
H A DKconfig17 LVDS capability, or where LVDS requires too many signals to route
26 to an eDP output device such as an SoC that lacks LVDS capability,
/openbmc/qemu/tests/migration-stress/guestperf/
H A Dengine.py138 { "capability": "auto-converge",
147 { "capability": "postcopy-ram",
152 { "capability": "postcopy-ram",
165 { "capability": "compress",
172 { "capability": "compress",
181 { "capability": "xbzrle",
186 { "capability": "xbzrle",
204 { "capability": "multifd",
211 { "capability": "multifd",
230 { "capability": "dirty-limit",

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