Searched full:cacheability (Results 1 – 8 of 8) sorted by relevance
65 #define PMB_C 3 /* Cacheability */
58 orr r0, r12, #0x8 @ Outer Cacheability for table walks: WBWA
1747 * Note that QEMU ignores shareability and cacheability attributes, in get_phys_addr_lpae()2995 * Combine either inner or outer cacheability attributes for normal3021 * Combine the memory type and cacheability attributes of3041 /* Combine memory type and cacheability attributes */ in combined_attrs_nofwb()3057 /* Outer/inner cacheability combine independently */ in combined_attrs_nofwb()3067 * Given the 4 bits specifying the outer or inner cacheability in force_cacheattr_nibble_wb()3085 * Combine the memory type and cacheability attributes of3129 * Combine S1 and S2 cacheability/shareability attributes, per D4.5.43162 /* Combine memory type and cacheability attributes */ in combine_cacheattrs()
1541 /* Cacheability and shareability attributes for a memory access */
119 uint8_t c:1; /* cacheability */
173 #define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */286 #define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */
1948 * only affect cacheability, and we don't implement caching. in nvic_writel()1960 * only affect cacheability, and we don't implement caching. in nvic_writel()
82 #define SH7750_PTEL_C 0x00000008 /* Cacheability */