| /openbmc/linux/Documentation/devicetree/bindings/bus/ |
| H A D | renesas,bsc.yaml | 3 $id: http://devicetree.org/schemas/bus/renesas,bsc.yaml#
6 title: Renesas Bus State Controller (BSC)
12 The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
18 While the BSC is a fairly simple memory-mapped bus, it may be part of a
20 connected to the BSC can be accessed, the PM domain containing the BSC
21 must be powered on, and the functional clock driving the BSC must be
24 The bindings for the BSC extend the bindings for "simple-pm-bus".
33 - renesas,bsc-r8a73a4 # R-Mobile APE6 (r8a73a4)
34 - renesas,bsc-sh73a0 # SH-Mobile AG5 (sh73a0)
35 - const: renesas,bsc
[all …]
|
| /openbmc/u-boot/board/atmark-techno/armadillo-800eva/ |
| H A D | armadillo-800eva.c | 46 struct r8a7740_bsc *bsc = (struct r8a7740_bsc *)BSC_BASE; in s_init() local
85 /* BSC */ in s_init()
86 writel(0x0000001B, &bsc->cmncr); in s_init()
208 /* BSC */ in s_init()
209 writel(0x00410400, &bsc->cs0bcr); in s_init()
210 writel(0x00410400, &bsc->cs2bcr); in s_init()
211 writel(0x00410400, &bsc->cs5bbcr); in s_init()
212 writel(0x02CB0400, &bsc->cs6abcr); in s_init()
214 writel(0x00000440, &bsc->cs0wcr); in s_init()
215 writel(0x00000440, &bsc->cs2wcr); in s_init()
[all …]
|
| /openbmc/linux/drivers/staging/board/ |
| H A D | board.c | 122 int __init board_staging_register_clock(const struct board_staging_clk *bsc) in board_staging_register_clock() argument
126 pr_debug("Aliasing clock %s for con_id %s dev_id %s\n", bsc->clk, in board_staging_register_clock()
127 bsc->con_id, bsc->dev_id); in board_staging_register_clock()
128 error = clk_add_alias(bsc->con_id, bsc->dev_id, bsc->clk, NULL); in board_staging_register_clock()
130 pr_err("Failed to alias clock %s (%d)\n", bsc->clk, error); in board_staging_register_clock()
|
| H A D | board.h | 30 int board_staging_register_clock(const struct board_staging_clk *bsc);
|
| /openbmc/linux/Documentation/devicetree/bindings/i2c/ |
| H A D | brcm,brcmstb-i2c.yaml | 7 title: Broadcom STB BSC IIC Master Controller
25 - description: BSC register range
30 - const: bsc
92 reg-names = "bsc", "auto-i2c";
|
| /openbmc/linux/drivers/i2c/busses/ |
| H A D | i2c-brcmstb.c | 19 * PER_I2C/BSC count register mask depends on 1 byte/4 byte data register
28 /* BSC CTL register field definitions */
58 /* BSC data transfer direction */
61 /* BSC data transfer direction combined format */
68 /* BSC block register map structure to cache fields to be written */
195 /* Enable BSC CTL interrupt line */ in brcmstb_i2c_enable_disable_irq()
198 /* Disable BSC CTL interrupt line */ in brcmstb_i2c_enable_disable_irq()
293 /* enable BSC CTL interrupt line */ in brcmstb_send_i2c_cmd()
322 /* Actual data transfer through the BSC master */
635 /* disable the bsc interrupt line */ in brcmstb_i2c_probe()
|
| /openbmc/u-boot/board/kmc/kzm9g/ |
| H A D | kzm9g.c | 261 struct sh73a0_bsc *bsc = (struct sh73a0_bsc *)BSC_BASE; in board_early_init_f() local
265 writel(CS0BCR_D, &bsc->cs0bcr); in board_early_init_f()
266 writel(CS4BCR_D, &bsc->cs4bcr); in board_early_init_f()
267 writel(CS0WCR_D, &bsc->cs0wcr); in board_early_init_f()
268 writel(CS4WCR_D, &bsc->cs4wcr); in board_early_init_f()
270 clrsetbits_le32(&bsc->cmncr, ~CMNCR_BROMMD, CMNCR_BROMMD); in board_early_init_f()
|
| /openbmc/linux/arch/sh/include/cpu-sh4/cpu/ |
| H A D | sh7722.h | 10 * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10]
11 * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3]
148 /* BSC */
|
| H A D | sh7723.h | 10 * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10]
11 * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3]
247 /* BSC */
|
| H A D | sh7724.h | 10 * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10]
11 * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3]
113 /* BSC (PTA/PTB/PTJ/PTQ/PTR/PTT) */
|
| /openbmc/u-boot/drivers/pci/ |
| H A D | pci_sh7751.c | 107 /* Double-check some BSC config settings */ in pci_sh7751_init()
169 /* Copy BSC registers into PCI BSC */ in pci_sh7751_init()
|
| /openbmc/linux/arch/sh/kernel/cpu/sh2a/ |
| H A D | setup-sh7206.c | 30 CMT0, CMT1, BSC, WDT, enumerator
61 INTC_IRQ(BSC, 148), INTC_IRQ(WDT, 152),
112 { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { CMT0, CMT1, BSC, WDT } },
|
| H A D | setup-sh7203.c | 22 USB, LCDC, CMT0, CMT1, BSC, WDT, enumerator
63 INTC_IRQ(BSC, 144), INTC_IRQ(WDT, 145),
144 { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },
|
| /openbmc/u-boot/arch/arm/cpu/armv7/bcm235xx/ |
| H A D | Makefile | 8 obj-y += clk-bsc.o
|
| H A D | clk-bsc.c | 13 /* Enable appropriate clocks for a BSC/I2C port */
|
| /openbmc/u-boot/arch/arm/cpu/armv7/bcm281xx/ |
| H A D | Makefile | 9 obj-y += clk-bsc.o
|
| H A D | clk-bsc.c | 13 /* Enable appropriate clocks for a BSC/I2C port */
|
| /openbmc/u-boot/arch/sh/include/asm/ |
| H A D | cpu_sh7264.h | 19 /* BSC */
|
| H A D | cpu_sh7203.h | 19 /* BSC */
|
| H A D | cpu_sh7706.h | 22 /* BSC */
|
| H A D | cpu_sh7710.h | 22 /* BSC */
|
| /openbmc/u-boot/arch/arm/mach-rmobile/include/mach/ |
| H A D | sh73a0.h | 47 /* BSC */
260 /* BSC */
|
| /openbmc/linux/arch/sh/include/mach-common/mach/ |
| H A D | magicpanelr2.h | 30 /* BSC */
|
| /openbmc/linux/arch/sh/include/mach-ecovec24/mach/ |
| H A D | partner-jet-setup.txt | 29 LIST "BSC"
|
| /openbmc/linux/drivers/zorro/ |
| H A D | zorro.ids | 183 07fe BSC/Alfadata
185 0801 BSC/Alfadata
235 082c BSC/Alfadata
|