| /openbmc/openbmc/poky/meta-yocto-bsp/lib/oeqa/controllers/ |
| H A D | beaglebonetarget.py | 9 # image under test we interact with u-boot over serial, so for the
10 # BeagleBone Black you will need an additional TTL serial cable since a
11 # serial interface isn't automatically provided over the USB connection as
17 # a script which handles the serial device disappearing on power down, such
18 # as scripts/contrib/serdevtry in OE-Core.
32 …dtbs = {'uImage-am335x-bone.dtb': 'am335x-bone.dtb', 'uImage-am335x-boneblack.dtb': 'am335x-bonebl…
43 'mkdir -p /mnt/testrootfs',
44 'mount -L testrootfs /mnt/testrootfs',
45 'rm -rf /mnt/testrootfs/*',
46 'tar xvf ~/test-rootfs.%s -C /mnt/testrootfs' % self.image_fstype,
[all …]
|
| H A D | grubtarget.py | 9 # image under test we interact with grub over serial, so for the
10 # Generic PC you will need an additional serial cable and device under test
11 # needs to have a serial interface. The separate ext3
29 'mount -L boot /boot',
30 'mkdir -p /mnt/testrootfs',
31 'mount -L testrootfs /mnt/testrootfs',
32 'cp ~/test-kernel /boot',
33 'rm -rf /mnt/testrootfs/*',
34 'tar xvf ~/test-rootfs.%s -C /mnt/testrootfs' % self.image_fstype,
43 self.controller.run("umount /boot; umount /mnt/testrootfs;")
[all …]
|
| /openbmc/qemu/tests/qtest/ |
| H A D | meson.build | 2 'ahci-test': 150,
3 'aspeed_smc-test': 360,
4 'bios-tables-test' : 910,
5 'cdrom-test' : 610,
6 'device-introspect-test' : 720,
7 'ide-test' : 120,
8 'migration-test' : 480,
9 'npcm7xx_pwm-test': 300,
10 'npcm7xx_watchdog_timer-test': 120,
11 'qmp-cmd-test' : 120,
[all …]
|
| H A D | boot-serial-test.c | 2 * Test serial output of some machines.
7 * or later. See the COPYING file in the top-level directory.
9 * This test is used to check that the serial output of the firmware
10 * (that we provide for some machines) or some small mini-kernels that
18 #include "ppc-util.h"
34 0xff, 0xf3, 0xff, 0x53, /* b -16 # loop */
61 0xb8, 0x00, 0xff, 0xfc /* bri -4 loop */
69 0xfc, 0xff, 0x00, 0xb8 /* bri -4 loop */
78 0xff, 0xff, 0xff, 0xea, /* b -4 (loop) */
89 0xff, 0xff, 0xff, 0x17, /* b -4 (loop) */
[all …]
|
| /openbmc/u-boot/test/py/ |
| H A D | u_boot_console_exec_attach.py | 1 # SPDX-License-Identifier: GPL-2.0
3 # Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
5 # Logic to interact with U-Boot running on real hardware, typically via a
6 # physical serial port.
13 """Represents a physical connection to a U-Boot console, typically via a
14 serial port. This implementation executes a sub-process to attach to the
15 console, expecting that the stdin/out of the sub-process will be forwarded
16 to/from the physical hardware. This approach isolates the test infra-
17 structure from the user-/installation-specific details of how to
18 communicate with, and the identity of, serial ports etc."""
[all …]
|
| /openbmc/qemu/docs/system/i386/ |
| H A D | microvm.rst | 8 designed for short-lived guests. microvm also establishes a baseline
10 since it is optimized for both boot time and footprint.
14 -----------------
18 - ISA bus
19 - i8259 PIC (optional)
20 - i8254 PIT (optional)
21 - MC146818 RTC (optional)
22 - One ISA serial port (optional)
23 - LAPIC
24 - IOAPIC (with kernel-irqchip=split by default)
[all …]
|
| /openbmc/u-boot/doc/SPI/ |
| H A D | README.sandbox-spi | 4 U-Boot supports SPI and SPI flash emulation in sandbox. This must be enabled
5 using the --spi_sf paramter when starting U-Boot.
11 $ ./sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin
21 U-Boot it started you can use 'sf' commands as normal. For example:
23 $ ./b/sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin \
24 -c "sf probe; sf test 0 100000; sf read 0 1000 1000; \
28 U-Boot 2013.10-00237-gd4e0fdb (Nov 07 2013 - 20:08:15)
33 In: serial
34 Out: serial
35 Err: serial
[all …]
|
| H A D | README.ti_qspi_flash | 1 QSPI U-Boot support
2 ------------------
4 Host processor is connected to serial flash device via qpsi
14 -------
16 MLO/u-boot.img will be flashed from SD/MMC to the flash device
17 using serial flash erase and write commands. Then, switch settings
18 will be changed to qspi boot. Then, the ROM code will read MLO
21 u-boot.img from flash and execute it from SDRAM.
24 -------
32 -----------------------
[all …]
|
| /openbmc/u-boot/doc/ |
| H A D | README.m54418twr | 4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m54418twr/m54418twr.c Dram setup
13 - board/freescale/m54418twr/Makefile Makefile
14 - board/freescale/m54418twr/config.mk config make
15 - board/freescale/m54418twr/u-boot.lds Linker description
16 - board/freescale/m54418twr/sbf_dram_init.S
19 - arch/m68k/cpu/mcf5445x/cpu.c cpu specific code
20 - arch/m68k/cpu/mcf5445x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
21 - arch/m68k/cpu/mcf5445x/interrupts.c cpu specific interrupt support
22 - arch/m68k/cpu/mcf5445x/speed.c system, pci, flexbus, and cpu clock
[all …]
|
| H A D | README.ae350 | 5 base on RISC-V architecture.
10 AX25-AE350
13 AX25-AE350 is the SoC with AE350 hardcore CPU.
19 If you want to boot this system from SPI ROM and bypass e-bios (the
20 other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT
21 in "include/configs/ax25-ae350.h".
23 Build and boot steps
28 2. Use `make ae350_rv[32|64]_defconfig` in u-boot root to build the image for 32 or 64 bit.
45 1. Define CONFIG_SKIP_LOWLEVEL_INIT to build u-boot which is loaded via gdb from ram.
46 2. Undefine CONFIG_SKIP_LOWLEVEL_INIT to build u-boot which is booted from spi rom.
[all …]
|
| H A D | README.console | 1 SPDX-License-Identifier: GPL-2.0+
4 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
7 U-Boot console handling
11 ----------------------
13 At system startup U-Boot initializes a serial console. When U-Boot
27 setenv stdin serial <- To use the serial input
28 setenv stdout video <- To use the video console
34 ---------------------------------------------
44 tstc (to test for the presence of a char in stdin)
59 Remember that all FILE-related functions CANNOT be used before
[all …]
|
| /openbmc/u-boot/doc/uImage.FIT/ |
| H A D | signature.txt | 1 U-Boot FIT Signature Verification
5 ------------
12 key is kept secret and the public key is stored in a non-volatile place,
15 See verified-boot.txt for more general information on verified boot.
19 --------
24 - hash an image in the FIT
25 - sign the hash with a private key to produce a signature
26 - store the resulting signature in the FIT
30 - read the FIT
31 - obtain the public key
[all …]
|
| /openbmc/u-boot/include/configs/ |
| H A D | meson64.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
27 #define STDOUT_CFG "vidconsole,serial"
29 #define STDOUT_CFG "serial"
33 #define STDIN_CFG "usbkbd,serial"
36 #define STDIN_CFG "serial"
51 /* ROM USB boot support, auto-execute boot.scr at scriptaddr */
54 "if test \"${boot_source}\" = \"usb\" && " \
55 "test -n \"${scriptaddr}\"; then " \
56 "echo '(ROM USB boot)'; " \
|
| H A D | sunxi-common.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
5 * (C) Copyright 2007-2011
20 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
27 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
28 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
38 /* Serial & console */
43 # define CONFIG_SYS_NS16550_REG_SIZE -4
99 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
140 * This is actually (CONFIG_ENV_OFFSET -
[all …]
|
| H A D | xpedite550x.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Copyright 2007-2008 Freescale Semiconductor, Inc.
24 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
30 #define CONFIG_BPTR_VIRT_ADDR 0xee000000 /* virt boot page address */
85 * 0x8000_0000 0xbfff_ffff PCIe1 Mem 1G non-cacheable
86 * 0xe000_0000 0xe7ff_ffff SRAM/SSRAM/L1 Cache 128M non-cacheable
87 * 0xe800_0000 0xe87f_ffff PCIe1 IO 8M non-cacheable
88 * 0xee00_0000 0xee00_ffff Boot page translation 4K non-cacheable
89 * 0xef00_0000 0xef0f_ffff CCSR/IMMR 1M non-cacheable
90 * 0xef80_0000 0xef8f_ffff NAND Flash 1M non-cacheable
[all …]
|
| /openbmc/u-boot/doc/driver-model/ |
| H A D | README.txt | 4 This README contains high-level information about driver model, a unified
5 way of declaring and accessing drivers in U-Boot. The original work was done
20 -----------
22 Uclass - a group of devices which operate in the same way. A uclass provides
28 Driver - some code which talks to a peripheral and presents a higher-level
31 Device - an instance of a driver, tied to a particular port or peripheral.
35 -------------
37 Build U-Boot sandbox and run it:
41 ./u-boot -d u-boot.dtb
43 (type 'reset' to exit U-Boot)
[all …]
|
| H A D | serial-howto.txt | 1 How to port a serial driver to driver model
4 Almost all of the serial drivers have been converted as at January 2016. These
13 Here is a suggested approach for converting your serial driver over to driver
16 - #ifdef out all your own serial driver code (#ifndef CONFIG_DM_SERIAL)
17 - Define CONFIG_DM_SERIAL for your board, vendor or architecture
18 - If the board does not already use driver model, you need CONFIG_DM also
19 - Your board should then build, but will not boot since there will be no serial
21 - Add the U_BOOT_DRIVER piece at the end (e.g. copy serial_s5p.c for example)
22 - Add a private struct for the driver data - avoid using static variables
23 - Implement each of the driver methods, perhaps by calling your old methods
[all …]
|
| /openbmc/qemu/docs/system/riscv/ |
| H A D | sifive_u.rst | 4 SiFive HiFive Unleashed Development Board is the ultimate RISC-V development
5 board featuring the Freedom U540 multi-core RISC-V processor.
8 -----------------
15 * Platform-Level Interrupt Controller (PLIC)
17 * L2 Loosely Integrated Memory (L2-LIM)
22 * 1 One-Time Programmable (OTP) memory with stored serial number
30 1 E51 core and 4 U54 core combination and the RISC-V core boots in 64-bit mode.
32 is also possible to create a 32-bit variant with the same peripherals except
33 that the RISC-V cores are replaced by the 32-bit ones (E31 and U34), to help
34 testing of 32-bit guest software.
[all …]
|
| /openbmc/u-boot/drivers/serial/ |
| H A D | serial.c | 1 // SPDX-License-Identifier: GPL-2.0+
9 #include <serial.h>
25 * serial_null() - Void registration routine of a serial driver
27 * This routine implements a void registration routine of a serial
30 * U-Boot.
37 * on_baudrate() - Update the actual baudrate when the env var changes
64 if (gd->baudrate == baudrate) in on_baudrate()
83 gd->baudrate = baudrate; in on_baudrate()
106 * serial_initfunc() - Forward declare of driver registration routine
129 * serial_register() - Register serial driver with serial driver core
[all …]
|
| /openbmc/openbmc/poky/meta/recipes-core/initrdscripts/files/ |
| H A D | init-install-testfs.sh | 1 #!/bin/sh -e
3 # Copyright (C) 2008-2011 Intel
10 # We need 20 Mb for the boot partition
13 # 50% for the the test partition
33 if [ $device != $live_dev_name -a -e /dev/$device ]; then
43 echo "-------------------------------"
45 if [ -r /sys/block/$hdname/device/vendor ]; then
46 echo -n "VENDOR="
49 echo -n "MODEL="
55 echo -n "Do you want to install this image there? [y/n] "
[all …]
|
| /openbmc/qemu/tests/functional/ |
| H A D | test_mips_malta.py | 3 # Functional tests for the big-endian 32-bit MIPS Malta board
5 # Copyright (c) Philippe Mathieu-Daudé <f4bug@amsat.org>
7 # SPDX-License-Identifier: GPL-2.0-or-later
15 def mips_run_common_commands(test, prompt='#'): argument
16 exec_command_and_wait_for_pattern(test,
17 'uname -m',
19 exec_command_and_wait_for_pattern(test,
20 'grep XT-PIC /proc/interrupts',
22 wait_for_console_pattern(test, prompt)
23 exec_command_and_wait_for_pattern(test,
[all …]
|
| /openbmc/u-boot/arch/sandbox/dts/ |
| H A D | sandbox.dts | 1 /dts-v1/;
6 #address-cells = <1>;
7 #size-cells = <1>;
18 stdout-path = "/serial";
21 audio: audio-codec {
22 compatible = "sandbox,audio-codec";
23 #sound-dai-cells = <1>;
26 cros_ec: cros-ec {
28 u-boot,dm-pre-reloc;
29 compatible = "google,cros-ec-sandbox";
[all …]
|
| H A D | sandbox64.dts | 1 /dts-v1/;
6 #address-cells = <2>;
7 #size-cells = <2>;
17 stdout-path = "/serial";
20 cros_ec: cros-ec {
22 compatible = "google,cros-ec-sandbox";
29 image-pos = <0x08000000>;
31 erase-value = <0>;
35 image-pos = <0>;
38 wp-ro {
[all …]
|
| /openbmc/openbmc/poky/documentation/test-manual/ |
| H A D | runtime-testing.rst | 1 .. SPDX-License-Identifier: CC-BY-SA-2.0-UK
15 For information on the test and QA infrastructure available within the
16 Yocto Project, see the ":ref:`ref-manual/release-process:testing and quality assurance`"
28 ------------------------------
32 - *Set up to avoid interaction with sudo for networking:* To
35 - Add ``NOPASSWD`` for your user in ``/etc/sudoers`` either for all
36 commands or just for ``runqemu-ifup``. You must provide the full
45 - Manually configure a tap interface for your system.
47 - Run as root the script in ``scripts/runqemu-gen-tapdevs``, which
49 typically chosen for Autobuilder-type environments.
[all …]
|
| /openbmc/u-boot/board/sandbox/ |
| H A D | README.sandbox | 1 /* SPDX-License-Identifier: GPL-2.0+ */
6 Native Execution of U-Boot
9 The 'sandbox' architecture is designed to allow U-Boot to run under Linux on
10 almost any hardware. To achieve this it builds U-Boot (so far as possible)
13 All of U-Boot's architecture-specific code therefore cannot be built as part
14 of the sandbox U-Boot. The purpose of running U-Boot under Linux is to test
16 create unit tests which we can run to test this upper level code.
23 CONFIG_SANDBOX_BIG_ENDIAN should be defined when running on big-endian
26 There are two versions of the sandbox: One using 32-bit-wide integers, and one
27 using 64-bit-wide integers. The 32-bit version can be build and run on either
[all …]
|