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/openbmc/u-boot/board/ti/am335x/
H A DREADME12 - AM335x GP EVM
13 - AM335x EVM SK
14 - Beaglebone White
15 - Beaglebone Black
23 worth noting that aside from things such as NAND or MMC only being
27 - GPIO is only required if DDR3 power is controlled in a way similar to
29 - SPI is only required for SPI flash, or exposing the SPI bus.
32 - I2C, to talk with the PMIC and ensure that we do not run afoul of
38 define additional text blocks (such as for NAND or DFU strings). Also
43 NAND
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/openbmc/u-boot/doc/
H A DREADME.nand-boot-ppc4401 -----------------------------
2 NAND boot on PPC440 platforms
3 -----------------------------
5 This document describes the U-Boot NAND boot feature as it
8 The PPC440EP(x)/GR(x) cpu's can boot directly from NAND FLASH,
9 completely without NOR FLASH. This can be done by using the NAND
10 boot feature of the 440 NAND flash controller (NDFC).
12 Here a short description of the different boot stages:
15 ------------------------------------------------------
16 Will load first 4k from NAND (SPL) into cache and execute it from there.
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H A DREADME.ublimage1 ---------------------------------------------
2 UBL image Boot Image generation using mkimage
3 ---------------------------------------------
5 This document describes how to set up an U-Boot image that can be directly
6 booted by a DaVinci processor via NAND boot mode, using an UBL header,
9 For more details see section 11.2 "ARM ROM Boot Modes" of
13 --------------
14 ./tools/mkimage -l <u-boot_file>
17 ./tools/mkimage -T ublimage \
18 -n <board specific configuration file> \
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H A DREADME.mediatek1 # SPDX-License-Identifier: GPL-2.0+
7 This document describes how to compile the U-Boot and how to change U-Boot
13 -Set the cross compiler:
15 # export CROSS_COMPILE=/path/to/toolchain/arm-linux-gnueabi-
17 -Clean-up old residuals:
21 -Configure the U-Boot:
26 - For the MT7623n bananapi R2 board use "mt7623n_bpir2_defconfig"
27 - For the MT7629 reference board use "mt7629_rfb_defconfig"
30 Boot sequence
32 -Bootrom -> MTK preloader -> U-Boot
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H A DREADME.pblimage1 ------------------------------------------------------------------
2 Freescale PBL(pre-boot loader) Boot Image generation using mkimage
3 ------------------------------------------------------------------
5 The CoreNet SoC's can boot directly from eSPI FLASH, SD/MMC and
6 NAND, etc. These SoCs use PBL to load RCW and/or pre-initialization
7 instructions. For more details refer section 5 Pre-boot loader
11 Building PBL Boot Image and boot steps
12 --------------------------------------
14 1. Building PBL Boot Image.
15 The default Image is u-boot.pbl.
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H A DREADME.at914 - I. Board mapping & boot media
5 - II. NAND partition table
6 - III. watchdog support
8 I. Board mapping & boot media
9 ------------------------------------------------------------------------------
11 ------------------------------------------------------------------------------
14 0x20000000 - 23FFFFFF SDRAM (64 MB)
15 0xC0000000 - Cxxxxxxx Atmel Dataflash card (J13)
16 0xD0000000 - D07FFFFF Soldered Atmel Dataflash (AT45DB642)
20 U-Boot environment variables can be stored at different places:
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H A DREADME.davinci.nand_spl2 A "make boardname" will compile a u-boot.ubl, with UBL Header, which is
3 needed for the RBL to find the "UBL", which actually is a UBL-compatible
4 header, nand spl code and u-boot code.
7 As the RBL uses another read function as the "standard" u-boot,
11 (at the moment in board specific code) in the u-boot command
16 between the two NAND read/write modes.
26 On the cam_enc_4xx board we have a NAND flash with blocksize = 0x20000 and
27 pagesize = 0x800, so the u-boot.ubl image (which you get with:
54 After the spl code, there comes the "real" u-boot code
57 ------------------------------------------------------------------------
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H A DREADME.m54418twr4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m54418twr/m54418twr.c Dram setup
13 - board/freescale/m54418twr/Makefile Makefile
14 - board/freescale/m54418twr/config.mk config make
15 - board/freescale/m54418twr/u-boot.lds Linker description
16 - board/freescale/m54418twr/sbf_dram_init.S
19 - arch/m68k/cpu/mcf5445x/cpu.c cpu specific code
20 - arch/m68k/cpu/mcf5445x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
21 - arch/m68k/cpu/mcf5445x/interrupts.c cpu specific interrupt support
22 - arch/m68k/cpu/mcf5445x/speed.c system, pci, flexbus, and cpu clock
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/openbmc/u-boot/board/work-microwave/work_92105/
H A DREADME1 Work_92105 from Work Microwave is an LPC3250- based board with the
4 - 64MB SDR DRAM
5 - 1 GB SLC NAND, managed through MLC controller.
6 - Ethernet
7 - Ethernet + PHY SMSC8710
8 - I2C:
9 - EEPROM (24M01-compatible)
10 - RTC (DS1374-compatible)
11 - Temperature sensor (DS620)
12 - DACs (2 x MAX518)
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/openbmc/u-boot/board/gateworks/gw_ventana/
H A DREADME1 U-Boot for the Gateworks Ventana Product Family boards
3 This file contains information for the port of U-Boot to the Gateworks
7 is supported by a single bootloader build by using a common SPL and U-Boot
10 all of the various boot mediums available.
13 ---------------------------------
15 The i.MX6 has a BOOT ROM PPL (Primary Program Loader) which supports loading
16 an executable image from various boot devices.
19 will build the following artifacts from U-Boot source:
20 - SPL - Secondary Program Loader that the i.MX6 BOOT ROM (Primary Program
22 The DRAM controller, loads u-boot.img from the detected boot device,
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/openbmc/u-boot/drivers/mtd/nand/raw/
H A DKconfig2 menuconfig NAND config
3 bool "Raw NAND Device Support"
4 if NAND
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
19 bool "Support Atmel NAND controller"
22 Enable this driver for NAND flash platforms using an Atmel NAND
64 bool "Support TI Davinci NAND controller"
66 Enable this driver for NAND flash controllers available in TI Davinci
75 bool "Support Denali NAND controller as a DT device"
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/openbmc/u-boot/board/Barix/ipam390/
H A DREADME.ipam3903 The README is for the boot procedure on the ipam390 board
5 In the context of U-Boot, the board is booted in three stages. The initial
6 bootloader which executes upon reset is the ROM Boot Loader (RBL) and sits
9 controller (such as NAND) to continue the boot process by loading
11 further (some clocks, SDRAM). As on this board is used the falcon boot
19 spl code starts the u-boot image
29 it allows for additional flexibility (run-time detect of board revision,
34 run "tools/buildman/buildman -k ipam390" in the u-boot source tree.
35 Once this build completes you will have a ../current/ipam390/u-boot.ais file
36 that needs to be written to the nand flash.
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/openbmc/u-boot/board/davinci/da8xxevm/
H A DREADME.da8503 The README is for the boot procedure used for various DA850 (or compatible
6 In the context of U-Boot, the board is booted in three stages. The initial
7 bootloader which executes upon reset is the ROM Boot Loader (RBL) and sits
10 controller (such as SPI or NAND) to continue the boot process by loading
12 further (some clocks, SDRAM) and then load the full u-boot from a
13 predefined location in persistent storage to DDR and jumps to the u-boot
24 it allows for additional flexibility (run-time detect of board revision,
35 u-boot.ais file that needs to be written to the correct persistent
42 Assuming that the network is configured and enabled and the u-boot.ais file
45 U-Boot > sf probe 0
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/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Drockchip,nand-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoCs NAND FLASH Controller (NFC)
10 - $ref: nand-controller.yaml#
13 - Heiko Stuebner <heiko@sntech.de>
18 - const: rockchip,px30-nfc
19 - const: rockchip,rk2928-nfc
20 - const: rockchip,rv1108-nfc
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H A Dqcom,nandc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm NAND controller
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
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/openbmc/u-boot/doc/imx/common/
H A Dmxs.txt1 Booting U-Boot on a MXS processor
4 This document describes the MXS U-Boot port. This document mostly covers topics
8 -----------
14 into the unix command prompt in U-Boot source code root directory.
16 The (=>) introduces a snipped of code that should by typed into U-Boot command
20 --------
23 2) Compiling U-Boot for a MXS based board
24 3) Installation of U-Boot for a MXS based board to SD card
25 4) Installation of U-Boot into NAND flash on a MX28 based board
26 5) Installation of U-Boot into SPI NOR flash on a MX28 based board
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/openbmc/u-boot/board/freescale/mpc8313erdb/
H A DREADME2 -----------------------------------------
8 To boot the image at 0xFE000000 in NOR flash, use these DIP
11 +------+ +------+
14 +------+ ON +------+ ON
18 To boot the image at the beginning of NAND flash, use these
21 +------+ +------+
24 +------+ ON +------+ ON
28 When booting from NAND, use u-boot-nand.bin, not u-boot.bin.
38 0xe280_0000 0xe280_7fff NAND FLASH (CS1) 32K
44 When booting from NAND, NAND flash is CS0 and NOR flash
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/openbmc/u-boot/board/logicpd/omap3som/
H A DREADME4 The source for omap3logic.c encompases the OMAP35 and DM3730 SOM-LV and DM3730 Torpedo platforms, b…
8 omap3_logic_somlv_defconfig = DM37 SOM-LV
9 omap35_logic_somlv_defconfig = OMAP35 SOM-LV
23 U-Boot # mmc rescan
25 U-Boot # fatload mmc 0 ${loadaddr} uImage
26 U-Boot # run loadfdt
27 U-Boot # setenv optargs quiet
28 U-Boot # run mmcargs
29 U-Boot # run common_bootargs
30 U-Boot # spl export fdt ${loadaddr} - ${fdtaddr}
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/openbmc/u-boot/configs/
H A Dam43xx_hs_evm_defconfig25 CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
34 CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
35nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NA…
37 CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
38 CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
H A Dam43xx_evm_defconfig17 CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
28 CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
29nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NA…
31 CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
32 CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
H A Dam335x_evm_defconfig9 CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_co…
17 CONFIG_SPL_NET_VCI_STRING="AM33xx U-Boot SPL"
27 CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
28nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),256k(NA…
31 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
32 CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2"
H A Dchiliboard_defconfig16 CONFIG_DEFAULT_FDT_FILE="am335x-chiliboard.dtb"
30 CONFIG_MTDIDS_DEFAULT="nand0=8000000.nand"
31nand:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),256k(NAND
33 CONFIG_DEFAULT_DEVICE_TREE="am335x-chiliboard"
H A Dti816x_evm_defconfig33 CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
34nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),256k(NA…
38 CONFIG_DEFAULT_DEVICE_TREE="dm8168-evm"
H A Dam43xx_evm_rtconly_defconfig24 CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
25nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NA…
27 CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
28 CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
/openbmc/u-boot/board/freescale/mpc8315erdb/
H A DREADME2 -----------------------------------------
8 To boot the image at 0xFE000000 in NOR flash, use these DIP
11 +------+ +------+
14 +------+ ON +------+ ON
18 To boot the image at the beginning of NAND flash, use these
21 +------+ +------+
24 +------+ ON +------+ ON
28 When booting from NAND, use u-boot-nand.bin, not u-boot.bin.
38 0xe060_0000 0xe060_7fff NAND FLASH (CS1) 32K
41 When booting from NAND, NAND flash is CS0 and NOR flash
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