1887e2ec9SStefan Roese----------------------------- 2887e2ec9SStefan RoeseNAND boot on PPC440 platforms 3887e2ec9SStefan Roese----------------------------- 4887e2ec9SStefan Roese 5887e2ec9SStefan RoeseThis document describes the U-Boot NAND boot feature as it 6887e2ec9SStefan Roeseis implemented for the AMCC Sequoia (PPC440EPx) board. 7887e2ec9SStefan Roese 8887e2ec9SStefan RoeseThe PPC440EP(x)/GR(x) cpu's can boot directly from NAND FLASH, 9887e2ec9SStefan Roesecompletely without NOR FLASH. This can be done by using the NAND 10887e2ec9SStefan Roeseboot feature of the 440 NAND flash controller (NDFC). 11887e2ec9SStefan Roese 12*8fbc985bSAdrian FilipiHere a short description of the different boot stages: 13887e2ec9SStefan Roese 14887e2ec9SStefan Roesea) IPL (Initial Program Loader, integrated inside CPU) 15887e2ec9SStefan Roese------------------------------------------------------ 16887e2ec9SStefan RoeseWill load first 4k from NAND (SPL) into cache and execute it from there. 17887e2ec9SStefan Roese 18887e2ec9SStefan Roeseb) SPL (Secondary Program Loader) 19887e2ec9SStefan Roese--------------------------------- 20887e2ec9SStefan RoeseWill load special U-Boot version (NUB) from NAND and execute it. This SPL 21887e2ec9SStefan Roesehas to fit into 4kByte. It sets up the CPU and configures the SDRAM 22887e2ec9SStefan Roesecontroller and the NAND controller so that the special U-Boot image can be 23887e2ec9SStefan Roeseloaded from NAND to SDRAM. 24887e2ec9SStefan RoeseThis special image is build in the directory "nand_spl". 25887e2ec9SStefan Roese 26887e2ec9SStefan Roesec) NUB (NAND U-Boot) 27887e2ec9SStefan Roese-------------------- 28887e2ec9SStefan RoeseThis NAND U-Boot (NUB) is a special U-Boot version which can be started 29887e2ec9SStefan Roesefrom RAM. Therefore it mustn't (re-)configure the SDRAM controller. 30887e2ec9SStefan Roese 31887e2ec9SStefan RoeseOn 440EPx the SPL is copied to internal SRAM before the NAND controller 32887e2ec9SStefan Roeseis set up. While still running from cache, I experienced problems accessing 33887e2ec9SStefan Roesethe NAND controller. 34887e2ec9SStefan Roese 35887e2ec9SStefan Roese 36a73c8dbbSStefan RoeseExample: Build and install NAND boot image for Sequoia (440EPx): 37a73c8dbbSStefan Roese 38a73c8dbbSStefan Roesea) Configure for sequoia with NAND boot support: 39a73c8dbbSStefan Roese# make sequoia_nand_config 40a73c8dbbSStefan Roese 41a73c8dbbSStefan Roeseb) Build image(s) 42a73c8dbbSStefan Roese# make 43a73c8dbbSStefan Roese 44a73c8dbbSStefan RoeseThis will generate the SPL image in the "nand_spl" directory: 45a73c8dbbSStefan Roesenand_spl/u-boot-spl.bin 46a73c8dbbSStefan RoeseAlso another image is created spanning a whole NAND block (16kBytes): 47a73c8dbbSStefan Roesenand_spl/u-boot-spl-16k.bin 48a73c8dbbSStefan RoeseThe main NAND U-Boot image is generated in the toplevel directory: 49a73c8dbbSStefan Roeseu-boot.bin 50a73c8dbbSStefan RoeseA combined image of u-boot-spl-16k.bin and u-boot.bin is also created: 51a73c8dbbSStefan Roeseu-boot-nand.bin 52a73c8dbbSStefan Roese 53a73c8dbbSStefan RoeseThis image should be programmed at offset 0 in the NAND flash: 54a73c8dbbSStefan Roese 55a73c8dbbSStefan Roese# tftp 100000 /tftpboot/sequoia/u-boot-nand.bin 56a73c8dbbSStefan Roese# nand erase 0 60000 57a73c8dbbSStefan Roese# nand write 100000 0 60000 58a73c8dbbSStefan Roese 59a73c8dbbSStefan Roese 60887e2ec9SStefan RoeseSeptember 07 2006, Stefan Roese <sr@denx.de> 61