Home
last modified time | relevance | path

Searched +full:bcm2835 +full:- +full:dma (Results 1 – 25 of 58) sorted by relevance

123

/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2835-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * bcm2835, bcm2836 and bcm2837 implementations.
8 interrupt-parent = <&intc>;
11 dma: dma-controller@7e007000 { label
12 compatible = "brcm,bcm2835-dma";
25 /* dma channel 11-14 share one irq */
32 interrupt-names = "dma0",
47 "dma-shared-all";
48 #dma-cells = <1>;
49 brcm,dma-channel-mask = <0x7f35>;
[all …]
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
H A Dbcm2835.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "bcm2835-common.dtsi"
6 compatible = "brcm,bcm2835";
9 #address-cells = <1>;
10 #size-cells = <0>;
14 compatible = "arm,arm1176jzf-s";
16 /* Source for d/i-cache-line-size and d/i-cache-sets
18 * /h/level-one-memory-system/cache-organization?lang=en
20 * Source for d/i-cache-size
23 * NOTE: The BCM2835 has a L2 cache but it is dedicated to the GPU
[all …]
H A Dbcm2835-rpi.dtsi1 #include <dt-bindings/power/raspberrypi-power.h>
6 compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
7 #address-cells = <1>;
8 #size-cells = <1>;
11 dma-ranges;
15 compatible = "raspberrypi,bcm2835-power";
17 #power-domain-cells = <1>;
21 compatible = "brcm,bcm2835-vchiq";
41 pinctrl-names = "default";
42 pinctrl-0 = <&i2c0_gpio0>;
[all …]
H A Dbcm283x.dtsi1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/soc/bcm2835-pm.h>
8 /* firmware-provided startup stubs live here, where the secondary CPUs are
14 * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
15 * bcm2835.dtsi and bcm2836.dtsi.
19 compatible = "brcm,bcm2835";
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dbcm283x.dtsi1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
6 /* firmware-provided startup stubs live here, where the secondary CPUs are
12 * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
13 * bcm2835.dtsi and bcm2836.dtsi.
17 compatible = "brcm,bcm2835";
18 model = "BCM2835";
19 interrupt-parent = <&intc>;
[all …]
H A Dbcm2835.dtsi4 compatible = "brcm,bcm2835";
7 #address-cells = <1>;
8 #size-cells = <0>;
12 compatible = "arm,arm1176jzf-s";
19 dma-ranges = <0x40000000 0x00000000 0x20000000>;
21 arm-pmu {
22 compatible = "arm,arm1176-pmu";
28 coefficients = <(-538) 407000>;
33 compatible = "brcm,bcm2835-thermal";
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dbrcm,bcm2835-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/brcm,bcm2835-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: BCM2835 DMA controller
10 - Nicolas Saenz Julienne <nsaenz@kernel.org>
13 The BCM2835 DMA controller has 16 channels in total. Only the lower
19 - $ref: dma-controller.yaml#
23 const: brcm,bcm2835-dma
30 Should contain the DMA interrupts associated to the DMA channels in
[all …]
/openbmc/qemu/hw/arm/
H A Dbcm2835_peripherals.c9 * See the COPYING file in the top-level directory.
23 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
27 * According to Linux driver & DTS, dma channels 0--10 have separate IRQ,
28 * while channels 11--14 share one IRQ:
44 memory_region_add_subregion_overlap(&ps->peri_mr, ofs, in create_unimp()
45 sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000); in create_unimp()
54 object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG); in bcm2835_peripherals_init()
57 object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL); in bcm2835_peripherals_init()
60 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO); in bcm2835_peripherals_init()
62 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci", in bcm2835_peripherals_init()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dbrcm,bcm2835-sdhost.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/brcm,bcm2835-sdhost.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM2835 SDHOST controller
10 - Stefan Wahren <stefan.wahren@i2se.com>
13 - $ref: mmc-controller.yaml
17 const: brcm,bcm2835-sdhost
31 dma-names:
32 const: rx-tx
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dbrcm,bcm2835-i2s.txt1 * Broadcom BCM2835 SoC I2S/PCM module
4 - compatible: "brcm,bcm2835-i2s"
5 - reg: Should contain PCM registers location and length.
6 - clocks: the (PCM) clock to use
7 - dmas: List of DMA controller phandle and DMA request line ordered pairs.
8 - dma-names: Identifier string for each DMA request line in the dmas property.
11 One of the DMA channels will be responsible for transmission (should be
17 compatible = "brcm,bcm2835-i2s";
21 dmas = <&dma 2>,
22 <&dma 3>;
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-bcm2835.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Broadcom BCM2835 SPI Controllers
10 * spi-ath79.c, Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
11 * spi-atmel.c, Copyright (C) 2006 Atmel Corporation
18 #include <linux/dma-mapping.h>
74 #define DRV_NAME "spi-bcm2835"
83 * struct bcm2835_spi - BCM2835 SPI controller
94 * @tx_prologue: bytes transmitted without DMA if first TX sglist entry's
96 * @rx_prologue: bytes received without DMA if first RX sglist entry's
99 * @debugfs_dir: the debugfs directory - neede to remove debugfs when
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 dynamic device discovery; some are even write-only or read-only.
17 chips, analog to digital (and d-to-a) converters, and more.
44 If your system has an master-capable SPI controller (which
56 by providing a high-level interface to send memory-like commands.
145 supports spi-mem interface.
164 tristate "BCM2835 SPI controller"
168 This selects a driver for the Broadcom BCM2835 SPI master.
170 The BCM2835 contains two types of SPI master controller; the
176 tristate "BCM2835 SPI auxiliary controller"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dbrcm,bcm2835-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
14 const: brcm,bcm2835-hdmi
18 - description: HDMI register range
19 - description: HD register range
26 - description: The pixel clock
27 - description: The HDMI state machine clock
[all …]
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dbrcm,bcm2835-armctrl-ic.txt1 BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
3 The BCM2835 contains a custom top-level interrupt controller, which supports
4 72 interrupt sources using a 2-level register scheme. The interrupt
9 interrupts, but the per-CPU interrupt controller is the root, and an
14 - compatible : should be "brcm,bcm2835-armctrl-ic" or
15 "brcm,bcm2836-armctrl-ic"
16 - reg : Specifies base physical address and size of the registers.
17 - interrupt-controller : Identifies the node as an interrupt controller
18 - #interrupt-cells : Specifies the number of cells needed to encode an
28 Additional required properties for brcm,bcm2836-armctrl-ic:
[all …]
/openbmc/linux/drivers/dma/
H A Dbcm2835-dma.c1 // SPDX-License-Identifier: GPL-2.0+
3 * BCM2835 DMA engine support
11 * BCM2708 DMA Driver
17 * MARVELL MMP Peripheral DMA Driver
21 #include <linux/dma-mapping.h>
35 #include "virt-dma.h"
41 * struct bcm2835_dmadev - BCM2835 DMA controller
42 * @ddev: DMA device
108 /* DMA CS Control and Status bits */
109 #define BCM2835_DMA_ACTIVE BIT(0) /* activate the DMA */
[all …]
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 subdir-ccflags-$(CONFIG_DMADEVICES_DEBUG) := -DDEBUG
4 subdir-ccflags-$(CONFIG_DMADEVICES_VDEBUG) += -DVERBOSE_DEBUG
7 obj-$(CONFIG_DMA_ENGINE) += dmaengine.o
8 obj-$(CONFIG_DMA_VIRTUAL_CHANNELS) += virt-dma.o
9 obj-$(CONFIG_DMA_ACPI) += acpi-dma.o
10 obj-$(CONFIG_DMA_OF) += of-dma.o
13 obj-$(CONFIG_DMATEST) += dmatest.o
16 obj-$(CONFIG_ALTERA_MSGDMA) += altera-msgdma.o
17 obj-$(CONFIG_AMBA_PL08X) += amba-pl08x.o
[all …]
/openbmc/qemu/include/hw/ssi/
H A Dbcm2835_spi.h2 * BCM2835 SPI Master Controller
30 #define TYPE_BCM2835_SPI "bcm2835-spi"
34 * Though BCM2835 documentation says FIFOs have a capacity of 16,
36 * in non DMA mode.
/openbmc/linux/drivers/mailbox/
H A Dbcm2835-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2013-2014 Lubomir Rintel
8 * - arch/arm/mach-bcm2708/vcio.c file written by Gray Girling that was
9 * obtained from branch "rpi-3.6.y" of git://github.com/raspberrypi/
11 * - drivers/mailbox/bcm2835-ipc.c by Lubomir Rintel at
12 * https://github.com/hackerspace/rpi-linux/blob/lr-raspberry-pi/drivers/
13 * mailbox/bcm2835-ipc.c
14 * - documentation available on the following web site:
15 * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
19 #include <linux/dma-mapping.h>
[all …]
/openbmc/u-boot/drivers/mmc/
H A DKconfig31 Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
32 and non-removable (e.g. eMMC chip) devices are supported. These
33 appear as block devices in U-Boot and can support filesystems such
42 Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
43 and non-removable (e.g. eMMC chip) devices are supported. These
44 appear as block devices in U-Boot and can support filesystems such
161 you are reading this help text, you most likely have no idea :-)
185 PIO, internal DMA mode and external DMA mode.
213 as removeable SD and micro-SD cards.
256 This selects PCI-based MMC controllers.
[all …]
/openbmc/linux/sound/soc/bcm/
H A Dbcm2835-i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ALSA SoC I2S Audio Layer for Broadcom BCM2835 SoC
23 * Copyright 2007-2010 Freescale Semiconductor, Inc.
130 unsigned int provider = dev->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK; in bcm2835_i2s_start_clock()
132 if (dev->clk_prepared) in bcm2835_i2s_start_clock()
138 clk_prepare_enable(dev->clk); in bcm2835_i2s_start_clock()
139 dev->clk_prepared = true; in bcm2835_i2s_start_clock()
148 if (dev->clk_prepared) in bcm2835_i2s_stop_clock()
149 clk_disable_unprepare(dev->clk); in bcm2835_i2s_stop_clock()
150 dev->clk_prepared = false; in bcm2835_i2s_stop_clock()
[all …]
/openbmc/linux/drivers/mmc/host/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
42 This option will enable the dma to work correctly, if you are using
43 Qcom SOCs and MMC, you would probably need this option to get DMA working.
53 If you have a STM32 sdmmc host with internal DMA say Y here.
94 implements a hardware byte swapper using a 32-bit datum.
123 disabled, it will steal the MMC cards away - rendering them
375 bool "DMA support on S3C SDHCI"
378 Enable DMA support on the Samsung S3C SDHCI glue. The DMA
418 tristate "SDHCI support for the BCM2835 & iProc SD/MMC Controller"
427 If you have a BCM2835 or IPROC platform with SD or MMC devices,
[all …]
/openbmc/qemu/include/hw/dma/
H A Dbcm2835_dma.h5 * See the COPYING file in the top-level directory.
28 #define TYPE_BCM2835_DMA "bcm2835-dma"
/openbmc/qemu/tests/qtest/
H A Dbcm2835-dma-test.c2 * QTest testcase for BCM283x DMA engine (on Raspberry Pi 3)
7 * SPDX-License-Identifier: GPL-2.0-or-later
11 #include "libqtest-single.h"
19 /* DMA engine registers: */
28 /* DMA Transfer Info fields: */
85 /* Check that interrupt status is set both in DMA and IC controllers: */ in bcm2835_dma_test_interrupt()
101 /* DMA engines 0--10 have separate IRQ lines, 11--14 - only one: */ in bcm2835_dma_test_interrupts()
112 qtest_add_func("/bcm2835/dma/test_interrupts", in main()
114 qtest_start("-machine raspi3b"); in main()
/openbmc/qemu/include/hw/arm/
H A Dbcm2835_peripherals.h9 * See the COPYING file in the top-level directory.
19 #include "hw/dma/bcm2835_dma.h"
20 #include "hw/or-irq.h"
33 #include "hw/usb/hcd-dwc2.h"
40 #define TYPE_BCM_SOC_PERIPHERALS_BASE "bcm-soc-peripherals-base"
43 #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
64 BCM2835DMAState dma; member

123