/openbmc/sdeventplus/src/sdeventplus/source/ |
H A D | base.cpp | 3 #include <sdeventplus/source/base.hpp> 14 sd_event_source* Base::get() const in get() 19 const Event& Base::get_event() const in get_event() 21 return event; in get_event() 24 const char* Base::get_description() const in get_description() 28 event.getSdEvent()->sd_event_source_get_description( in get_description() 33 void Base::set_description(const char* description) const in set_description() 36 event.getSdEvent()->sd_event_source_set_description( in set_description() 40 void Base::set_prepare(Callback&& callback) in set_prepare() 45 event.getSdEvent()->sd_event_source_set_prepare( in set_prepare() [all …]
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H A D | base.hpp | 3 #include <systemd/sd-bus.h> 6 #include <sdeventplus/event.hpp> 24 * @brief Mapping of sdeventplus source enable values to the sd-event 39 /** @class Base 40 * @brief The base class for all sources implementing common source methods 43 class Base class 46 using Callback = fu2::unique_function<void(Base& source)>; 48 Base(Base&& other) = default; 49 Base& operator=(Base&& other) = default; 50 Base(const Base& other) = default; [all …]
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H A D | io.cpp | 14 IO::IO(const Event& event, int fd, uint32_t events, Callback&& callback) : in IO() argument 15 Base(event, create_source(event, fd, events), std::false_type()) in IO() 21 Base(other, sdeventplus::internal::NoOwn()) in IO() 33 event.getSdEvent()->sd_event_source_get_io_fd(get())); in get_fd() 39 event.getSdEvent()->sd_event_source_set_io_fd(get(), fd)); in set_fd() 47 event.getSdEvent()->sd_event_source_get_io_events(get(), &events)); in get_events() 55 event.getSdEvent()->sd_event_source_set_io_events(get(), events)); in set_events() 63 event.getSdEvent()->sd_event_source_get_io_revents(get(), &revents)); in get_revents() 69 return static_cast<detail::IOData&>(Base::get_userdata()); in get_userdata() 77 sd_event_source* IO::create_source(const Event& event, int fd, uint32_t events) in create_source() argument [all …]
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/openbmc/sdeventplus/test/source/ |
H A D | base.cpp | 1 #include <systemd/sd-event.h> 3 #include <sdeventplus/event.hpp> 6 #include <sdeventplus/source/base.hpp> 34 using UniqueEvent = std::unique_ptr<Event, std::function<void(Event*)>>; 38 class BaseImpl : public Base 41 BaseImpl(const Event& event, sd_event_source* source, std::false_type); 44 Base(other, sdeventplus::internal::NoOwn()) in BaseImpl() 47 using Base::get_prepare; 53 BaseImplData(const BaseImpl& base) : in BaseImplData() argument 54 BaseImpl(base, sdeventplus::internal::NoOwn()), BaseData(base) in BaseImplData() [all …]
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/openbmc/linux/drivers/perf/hisilicon/ |
H A D | hisi_uncore_sllc_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * HiSilicon SLLC uncore Hardware event counters support 8 * This code is based on the uncore PMUs like arm-cci and arm-ccn. 56 static void hisi_sllc_pmu_enable_tracetag(struct perf_event *event) in hisi_sllc_pmu_enable_tracetag() argument 58 struct hisi_pmu *sllc_pmu = to_hisi_pmu(event->pmu); in hisi_sllc_pmu_enable_tracetag() 59 u32 tt_en = hisi_get_tracetag_en(event); in hisi_sllc_pmu_enable_tracetag() 64 val = readl(sllc_pmu->base + SLLC_PERF_CTRL); in hisi_sllc_pmu_enable_tracetag() 66 writel(val, sllc_pmu->base + SLLC_PERF_CTRL); in hisi_sllc_pmu_enable_tracetag() 70 static void hisi_sllc_pmu_disable_tracetag(struct perf_event *event) in hisi_sllc_pmu_disable_tracetag() argument 72 struct hisi_pmu *sllc_pmu = to_hisi_pmu(event->pmu); in hisi_sllc_pmu_disable_tracetag() [all …]
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H A D | hisi_uncore_l3c_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * HiSilicon SoC L3C uncore Hardware event counters support 9 * This code is based on the uncore PMUs like arm-cci and arm-ccn. 34 * If the HW version only supports a 48-bit counter, then 35 * bits [63:48] are reserved, which are Read-As-Zero and 36 * Writes-Ignored. 40 /* L3C has 8-counters */ 63 static void hisi_l3c_pmu_config_req_tracetag(struct perf_event *event) in hisi_l3c_pmu_config_req_tracetag() argument 65 struct hisi_pmu *l3c_pmu = to_hisi_pmu(event->pmu); in hisi_l3c_pmu_config_req_tracetag() 66 u32 tt_req = hisi_get_tt_req(event); in hisi_l3c_pmu_config_req_tracetag() [all …]
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H A D | hisi_uncore_uc_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * HiSilicon SoC UC (unified cache) uncore Hardware event counters support 54 static int hisi_uc_pmu_check_filter(struct perf_event *event) in hisi_uc_pmu_check_filter() argument 56 struct hisi_pmu *uc_pmu = to_hisi_pmu(event->pmu); in hisi_uc_pmu_check_filter() 58 if (hisi_get_srcid_en(event) && !hisi_get_rd_req_en(event)) { in hisi_uc_pmu_check_filter() 59 dev_err(uc_pmu->dev, in hisi_uc_pmu_check_filter() 61 return -EINVAL; in hisi_uc_pmu_check_filter() 64 if (!hisi_get_uring_channel(event)) in hisi_uc_pmu_check_filter() 67 if ((HISI_GET_EVENTID(event) < HISI_UC_URING_EVENT_MIN) || in hisi_uc_pmu_check_filter() 68 (HISI_GET_EVENTID(event) > HISI_UC_URING_EVENT_MAX)) in hisi_uc_pmu_check_filter() [all …]
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H A D | hisi_uncore_hha_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * HiSilicon SoC HHA uncore Hardware event counters support 9 * This code is based on the uncore PMUs like arm-cci and arm-ccn. 32 * If the HW version only supports a 48-bit counter, then 33 * bits [63:48] are reserved, which are Read-As-Zero and 34 * Writes-Ignored. 59 static void hisi_hha_pmu_enable_tracetag(struct perf_event *event) in hisi_hha_pmu_enable_tracetag() argument 61 struct hisi_pmu *hha_pmu = to_hisi_pmu(event->pmu); in hisi_hha_pmu_enable_tracetag() 62 u32 tt_en = hisi_get_tracetag_en(event); in hisi_hha_pmu_enable_tracetag() 67 val = readl(hha_pmu->base + HHA_SRCID_CTRL); in hisi_hha_pmu_enable_tracetag() [all …]
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H A D | hisi_uncore_pa_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * HiSilicon PA uncore Hardware event counters support 8 * This code is based on the uncore PMUs like arm-cci and arm-ccn. 61 static void hisi_pa_pmu_enable_tracetag(struct perf_event *event) in hisi_pa_pmu_enable_tracetag() argument 63 struct hisi_pmu *pa_pmu = to_hisi_pmu(event->pmu); in hisi_pa_pmu_enable_tracetag() 64 u32 tt_en = hisi_get_tracetag_en(event); in hisi_pa_pmu_enable_tracetag() 69 val = readl(pa_pmu->base + PA_TT_CTRL); in hisi_pa_pmu_enable_tracetag() 71 writel(val, pa_pmu->base + PA_TT_CTRL); in hisi_pa_pmu_enable_tracetag() 75 static void hisi_pa_pmu_clear_tracetag(struct perf_event *event) in hisi_pa_pmu_clear_tracetag() argument 77 struct hisi_pmu *pa_pmu = to_hisi_pmu(event->pmu); in hisi_pa_pmu_clear_tracetag() [all …]
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H A D | hisi_uncore_ddrc_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * HiSilicon SoC DDRC uncore Hardware event counters support 9 * This code is based on the uncore PMUs like arm-cci and arm-ccn. 46 /* DDRC has 8-counters */ 54 * For PMU v1, there are eight-events and every event has been mapped 55 * to fixed-purpose counters which register offset is not consistent. 56 * Therefore there is no write event type and we assume that event 59 #define GET_DDRC_EVENTID(hwc) (hwc->config_base & 0x7) 84 return readl(ddrc_pmu->base + in hisi_ddrc_pmu_v1_read_counter() 85 hisi_ddrc_pmu_v1_get_counter_offset(hwc->idx)); in hisi_ddrc_pmu_v1_read_counter() [all …]
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/openbmc/linux/drivers/gpu/drm/vmwgfx/ |
H A D | vmwgfx_fence.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 4 * Copyright 2011-2023 VMware, Inc., Palo Alto, CA., USA 20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 50 struct ttm_base_object base; member 55 * struct vmw_event_fence_action - fence action that delivers a drm event. 58 * @event: A pointer to the pending event. 61 * @dev: Pointer to a struct drm_device so we can access the event stuff. 62 * @tv_sec: If non-null, the variable pointed to will be assigned 70 struct drm_pending_event *event; member 81 return container_of(fence->base.lock, struct vmw_fence_manager, lock); in fman_from_fence() [all …]
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/openbmc/linux/drivers/perf/ |
H A D | arm-ccn.c | 1 // SPDX-License-Identifier: GPL-2.0-only 112 #define CCN_TYPE_RND_1P 0x18 /* RN-D = RN-I + DVM */ 131 void __iomem *base; member 147 void __iomem *base; member 154 struct perf_event *event; member 171 void __iomem *base; member 224 return sysfs_emit(buf, "%s\n", (char *)ea->var); in arm_ccn_pmu_format_show() 232 static CCN_FORMAT_ATTR(node, "config:0-7"); 233 static CCN_FORMAT_ATTR(xp, "config:0-7"); 234 static CCN_FORMAT_ATTR(type, "config:8-15"); [all …]
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H A D | fsl_imx9_ddr_perf.c | 1 // SPDX-License-Identifier: GPL-2.0 32 * 32bit counters monitor counter-specific events in addition to counting reference events 58 void __iomem *base; member 75 {.compatible = "fsl,imx93-ddr-pmu", .data = &imx93_devtype_data}, 86 return sysfs_emit(page, "%s\n", pmu->devtype_data->identifier); in ddr_perf_identifier_show() 106 return cpumap_print_to_pagebuf(true, buf, cpumask_of(pmu->cpu)); in ddr_perf_cpumask_show() 127 return sysfs_emit(page, "event=0x%02llx\n", pmu_attr->id); in ddr_pmu_event_show() 137 /* counter0 cycles event */ 245 PMU_FORMAT_ATTR(event, "config:0-7"); 246 PMU_FORMAT_ATTR(counter, "config:8-15"); [all …]
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H A D | fsl_imx8_ddr_perf.c | 1 // SPDX-License-Identifier: GPL-2.0 86 { .compatible = "fsl,imx8-ddr-pmu", .data = &imx8_devtype_data}, 87 { .compatible = "fsl,imx8m-ddr-pmu", .data = &imx8m_devtype_data}, 88 { .compatible = "fsl,imx8mq-ddr-pmu", .data = &imx8mq_devtype_data}, 89 { .compatible = "fsl,imx8mm-ddr-pmu", .data = &imx8mm_devtype_data}, 90 { .compatible = "fsl,imx8mn-ddr-pmu", .data = &imx8mn_devtype_data}, 91 { .compatible = "fsl,imx8mp-ddr-pmu", .data = &imx8mp_devtype_data}, 98 void __iomem *base; member 116 return sysfs_emit(page, "%s\n", pmu->devtype_data->identifier); in ddr_perf_identifier_show() 126 if (!pmu->devtype_data->identifier) in ddr_perf_identifier_attr_visible() [all …]
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H A D | cxl_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 14 #include <linux/io-64-nonatomic-lo-hi.h> 66 /* CXL rev 3.0 Table 13-5 Events under CXL Vendor ID */ 97 void __iomem *base; member 115 * All CPMU counters are discoverable via the Event Capabilities Registers. 116 * Each Event Capability register contains a a VID / GroupID. 120 * - Fixed function counters refer to an Event Capabilities register. 121 * That event capability register is not then used for Configurable 127 void __iomem *base = info->base; in cxl_pmu_parse_caps() local 132 val = readq(base + CXL_PMU_CAP_REG); in cxl_pmu_parse_caps() [all …]
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H A D | marvell_cn10k_ddr_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0 36 /* 8 Generic event counter + 2 fixed event counters */ 44 /* Generic event counter registers */ 48 /* Two dedicated event counters for DDR reads and writes */ 53 * programmable events IDs in programmable event counters. 54 * DO NOT change these event-id numbers, they are used to 55 * program event bitmap in h/w. 104 /* Event counter value registers */ 108 /* Fixed event counter enable/disable register */ 113 /* Fixed event counter control register */ [all …]
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/openbmc/linux/include/uapi/linux/surface_aggregator/ |
H A D | dtx.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 3 * Surface DTX (clipboard detachment system driver) user-space interface. 6 * device allows user-space to control the clipboard detachment process on 9 * Copyright (C) 2020-2021 Maximilian Luz <luzmaximilian@gmail.com> 38 /* Base state values */ 42 /* Runtime errors (non-critical) */ 51 /* Base types */ 62 * enum sdtx_device_mode - Mode describing how (and if) the clipboard is 63 * attached to the base of the device. 64 * @SDTX_DEVICE_MODE_TABLET: The clipboard is detached from the base and the [all …]
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/openbmc/linux/drivers/fpga/ |
H A D | dfl-fme-perf.c | 1 // SPDX-License-Identifier: GPL-2.0 21 #include "dfl-fme.h" 88 * Performance Counter Registers for IOMMU / VT-D. 90 * VT-D Events are listed below as VTD_EVNT_* and VTD_SIP_EVNT_* 134 * struct fme_perf_priv - priv data structure for fme perf driver 137 * @ioaddr: mapped base address of mmio region. 163 * struct fme_perf_event_ops - callbacks for fme perf events 165 * @event_init: callback invoked during event init. 166 * @event_destroy: callback invoked during event destroy. 170 int (*event_init)(struct fme_perf_priv *priv, u32 event, u32 portid); [all …]
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/openbmc/linux/drivers/gpu/drm/i915/ |
H A D | i915_pmu.c | 2 * SPDX-License-Identifier: MIT 4 * Copyright © 2017-2018 Intel Corporation 32 static unsigned int i915_pmu_target_cpu = -1; 39 static u8 engine_event_sample(struct perf_event *event) in engine_event_sample() argument 41 return engine_config_sample(event->attr.config); in engine_event_sample() 44 static u8 engine_event_class(struct perf_event *event) in engine_event_class() argument 46 return (event->attr.config >> I915_PMU_CLASS_SHIFT) & 0xff; in engine_event_class() 49 static u8 engine_event_instance(struct perf_event *event) in engine_event_instance() argument 51 return (event->attr.config >> I915_PMU_SAMPLE_BITS) & 0xff; in engine_event_instance() 88 return -1; in other_bit() [all …]
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/openbmc/qemu/tests/qapi-schema/ |
H A D | qapi-schema-test.out | 11 module qapi-schema-test.json 24 base Empty1 25 object q_obj_Union-base 28 base q_obj_Union-base 34 command user-def-cmd0 Empty2 -> Empty2 41 base UserDefZero 75 member a-b: bool optional=True 77 base UserDefUnionBase 84 base UserDefZero 87 object q_obj_UserDefFlatUnion2-base [all …]
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/openbmc/linux/Documentation/driver-api/surface_aggregator/clients/ |
H A D | dtx.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 10 User-Space DTX (Clipboard Detachment System) Interface 14 and re-attachment handling. To this end, it provides the ``/dev/surface/dtx`` 15 device file, through which it can interface with a user-space daemon. This 17 actions, such as unmounting devices attached to the base, 18 unloading/reloading the graphics-driver, user-notifications, etc. 24 change. Commands are always driver-initiated, whereas events are always 35 * **Base:** 40 The mechanism keeping the clipboard attached to the base in normal 56 ------------ [all …]
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/openbmc/qemu/tests/qemu-iotests/ |
H A D | 030 | 37 qemu_img('create', '-f', iotests.imgfmt, 38 '-o', 'backing_file=%s' % backing_img, 39 '-F', 'raw', mid_img) 40 qemu_img('create', '-f', iotests.imgfmt, 41 '-o', 'backing_file=%s' % mid_img, 42 '-F', iotests.imgfmt, test_img) 43 qemu_io('-f', 'raw', '-c', 'write -P 0x1 0 512', backing_img) 44 qemu_io('-f', iotests.imgfmt, '-c', 'write -P 0x1 524288 512', mid_img) 46 "backing.node-name=mid," + 47 "backing.backing.node-name=base") [all …]
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H A D | 191.out | 5 Formatting 'TEST_DIR/t.IMGFMT.base', fmt=IMGFMT size=67108864 6 Formatting 'TEST_DIR/t.IMGFMT.mid', fmt=IMGFMT size=67108864 backing_file=TEST_DIR/t.IMGFMT.base ba… 19 { 'execute': 'block-commit', 20 'arguments': { 'job-id': 'commit0', 22 'base':'TEST_DIR/t.IMGFMT.base', 29 "event": "JOB_STATUS_CHANGE", 40 "event": "JOB_STATUS_CHANGE", 55 "event": "JOB_STATUS_CHANGE", 66 "event": "JOB_STATUS_CHANGE", 77 "event": "BLOCK_JOB_COMPLETED", [all …]
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/openbmc/qemu/hw/usb/ |
H A D | ccid-card-emulated.c | 12 * way, or it can use certificates. It requires the usb-ccid bus. 15 * qemu .. -usb -device usb-ccid -device ccid-card-emulated 20 * certutil -d /etc/pki/nssdb -x -t "CT,CT,CT" -S -s "CN=user$i" -n user$i 22 * qemu .. -usb -device usb-ccid \ 23 * -device ccid-card-emulated,cert1=user1,cert2=user2,cert3=user3 34 #include "qemu/main-loop.h" 37 #include "hw/qdev-properties.h" 43 if (lvl <= card->debug) {\ 44 printf("ccid-card-emul: %s: " fmt , __func__, ## __VA_ARGS__);\ 49 #define TYPE_EMULATED_CCID "ccid-card-emulated" [all …]
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/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_crtc.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 4 * Copyright (c) 2015-2021 The Linux Foundation. All rights reserved. 19 /* define the maximum number of in-flight frame events */ 26 * @NRT_CLIENT: Non-RealTime client like WB display 84 DPU_CRTC_CRC_SOURCE_INVALID = -1 103 * struct dpu_crtc_frame_event: stores crtc frame event for crtc processing 104 * @work: base work structure 105 * @crtc: Pointer to crtc handling this event 106 * @list: event list 108 * @event: event identifier [all …]
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