1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
225fdd593SJeykumar Sankaran /*
3*b1665047SJessica Zhang * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
478d9b458SJessica Zhang * Copyright (c) 2015-2021 The Linux Foundation. All rights reserved.
525fdd593SJeykumar Sankaran * Copyright (C) 2013 Red Hat
625fdd593SJeykumar Sankaran * Author: Rob Clark <robdclark@gmail.com>
725fdd593SJeykumar Sankaran */
825fdd593SJeykumar Sankaran
925fdd593SJeykumar Sankaran #ifndef _DPU_CRTC_H_
1025fdd593SJeykumar Sankaran #define _DPU_CRTC_H_
1125fdd593SJeykumar Sankaran
1225fdd593SJeykumar Sankaran #include <linux/kthread.h>
1325fdd593SJeykumar Sankaran #include <drm/drm_crtc.h>
1425fdd593SJeykumar Sankaran #include "dpu_kms.h"
1525fdd593SJeykumar Sankaran #include "dpu_core_perf.h"
1625fdd593SJeykumar Sankaran
1725fdd593SJeykumar Sankaran #define DPU_CRTC_NAME_SIZE 12
1825fdd593SJeykumar Sankaran
1925fdd593SJeykumar Sankaran /* define the maximum number of in-flight frame events */
2025fdd593SJeykumar Sankaran #define DPU_CRTC_FRAME_EVENT_SIZE 4
2125fdd593SJeykumar Sankaran
2225fdd593SJeykumar Sankaran /**
2325fdd593SJeykumar Sankaran * enum dpu_crtc_client_type: crtc client type
2425fdd593SJeykumar Sankaran * @RT_CLIENT: RealTime client like video/cmd mode display
2525fdd593SJeykumar Sankaran * voting through apps rsc
2625fdd593SJeykumar Sankaran * @NRT_CLIENT: Non-RealTime client like WB display
2725fdd593SJeykumar Sankaran * voting through apps rsc
2825fdd593SJeykumar Sankaran */
2925fdd593SJeykumar Sankaran enum dpu_crtc_client_type {
3025fdd593SJeykumar Sankaran RT_CLIENT,
3125fdd593SJeykumar Sankaran NRT_CLIENT,
3225fdd593SJeykumar Sankaran };
3325fdd593SJeykumar Sankaran
3425fdd593SJeykumar Sankaran /**
3525fdd593SJeykumar Sankaran * enum dpu_crtc_smmu_state: smmu state
3625fdd593SJeykumar Sankaran * @ATTACHED: all the context banks are attached.
3725fdd593SJeykumar Sankaran * @DETACHED: all the context banks are detached.
3825fdd593SJeykumar Sankaran * @ATTACH_ALL_REQ: transient state of attaching context banks.
3925fdd593SJeykumar Sankaran * @DETACH_ALL_REQ: transient state of detaching context banks.
4025fdd593SJeykumar Sankaran */
4125fdd593SJeykumar Sankaran enum dpu_crtc_smmu_state {
4225fdd593SJeykumar Sankaran ATTACHED = 0,
4325fdd593SJeykumar Sankaran DETACHED,
4425fdd593SJeykumar Sankaran ATTACH_ALL_REQ,
4525fdd593SJeykumar Sankaran DETACH_ALL_REQ,
4625fdd593SJeykumar Sankaran };
4725fdd593SJeykumar Sankaran
4825fdd593SJeykumar Sankaran /**
4925fdd593SJeykumar Sankaran * enum dpu_crtc_smmu_state_transition_type: state transition type
5025fdd593SJeykumar Sankaran * @NONE: no pending state transitions
5125fdd593SJeykumar Sankaran * @PRE_COMMIT: state transitions should be done before processing the commit
5225fdd593SJeykumar Sankaran * @POST_COMMIT: state transitions to be done after processing the commit.
5325fdd593SJeykumar Sankaran */
5425fdd593SJeykumar Sankaran enum dpu_crtc_smmu_state_transition_type {
5525fdd593SJeykumar Sankaran NONE,
5625fdd593SJeykumar Sankaran PRE_COMMIT,
5725fdd593SJeykumar Sankaran POST_COMMIT
5825fdd593SJeykumar Sankaran };
5925fdd593SJeykumar Sankaran
6025fdd593SJeykumar Sankaran /**
6125fdd593SJeykumar Sankaran * struct dpu_crtc_smmu_state_data: stores the smmu state and transition type
6225fdd593SJeykumar Sankaran * @state: current state of smmu context banks
6325fdd593SJeykumar Sankaran * @transition_type: transition request type
6425fdd593SJeykumar Sankaran * @transition_error: whether there is error while transitioning the state
6525fdd593SJeykumar Sankaran */
6625fdd593SJeykumar Sankaran struct dpu_crtc_smmu_state_data {
6725fdd593SJeykumar Sankaran uint32_t state;
6825fdd593SJeykumar Sankaran uint32_t transition_type;
6925fdd593SJeykumar Sankaran uint32_t transition_error;
7025fdd593SJeykumar Sankaran };
7125fdd593SJeykumar Sankaran
7225fdd593SJeykumar Sankaran /**
7378d9b458SJessica Zhang * enum dpu_crtc_crc_source: CRC source
7478d9b458SJessica Zhang * @DPU_CRTC_CRC_SOURCE_NONE: no source set
7578d9b458SJessica Zhang * @DPU_CRTC_CRC_SOURCE_LAYER_MIXER: CRC in layer mixer
76*b1665047SJessica Zhang * @DPU_CRTC_CRC_SOURCE_ENCODER: CRC in encoder
7778d9b458SJessica Zhang * @DPU_CRTC_CRC_SOURCE_INVALID: Invalid source
7878d9b458SJessica Zhang */
7978d9b458SJessica Zhang enum dpu_crtc_crc_source {
8078d9b458SJessica Zhang DPU_CRTC_CRC_SOURCE_NONE = 0,
8178d9b458SJessica Zhang DPU_CRTC_CRC_SOURCE_LAYER_MIXER,
82*b1665047SJessica Zhang DPU_CRTC_CRC_SOURCE_ENCODER,
8378d9b458SJessica Zhang DPU_CRTC_CRC_SOURCE_MAX,
8478d9b458SJessica Zhang DPU_CRTC_CRC_SOURCE_INVALID = -1
8578d9b458SJessica Zhang };
8678d9b458SJessica Zhang
8778d9b458SJessica Zhang /**
8825fdd593SJeykumar Sankaran * struct dpu_crtc_mixer: stores the map for each virtual pipeline in the CRTC
8925fdd593SJeykumar Sankaran * @hw_lm: LM HW Driver context
90cf6916f4SJeykumar Sankaran * @lm_ctl: CTL Path HW driver context
91e47616dfSKalyan Thota * @lm_dspp: DSPP HW driver context
9225fdd593SJeykumar Sankaran * @mixer_op_mode: mixer blending operation mode
9325fdd593SJeykumar Sankaran * @flush_mask: mixer flush mask for ctl, mixer and pipe
9425fdd593SJeykumar Sankaran */
9525fdd593SJeykumar Sankaran struct dpu_crtc_mixer {
9625fdd593SJeykumar Sankaran struct dpu_hw_mixer *hw_lm;
97cf6916f4SJeykumar Sankaran struct dpu_hw_ctl *lm_ctl;
98e47616dfSKalyan Thota struct dpu_hw_dspp *hw_dspp;
9925fdd593SJeykumar Sankaran u32 mixer_op_mode;
10025fdd593SJeykumar Sankaran };
10125fdd593SJeykumar Sankaran
10225fdd593SJeykumar Sankaran /**
10325fdd593SJeykumar Sankaran * struct dpu_crtc_frame_event: stores crtc frame event for crtc processing
10425fdd593SJeykumar Sankaran * @work: base work structure
10525fdd593SJeykumar Sankaran * @crtc: Pointer to crtc handling this event
10625fdd593SJeykumar Sankaran * @list: event list
10725fdd593SJeykumar Sankaran * @ts: timestamp at queue entry
10825fdd593SJeykumar Sankaran * @event: event identifier
10925fdd593SJeykumar Sankaran */
11025fdd593SJeykumar Sankaran struct dpu_crtc_frame_event {
11125fdd593SJeykumar Sankaran struct kthread_work work;
11225fdd593SJeykumar Sankaran struct drm_crtc *crtc;
11325fdd593SJeykumar Sankaran struct list_head list;
11425fdd593SJeykumar Sankaran ktime_t ts;
11525fdd593SJeykumar Sankaran u32 event;
11625fdd593SJeykumar Sankaran };
11725fdd593SJeykumar Sankaran
11825fdd593SJeykumar Sankaran /*
11925fdd593SJeykumar Sankaran * Maximum number of free event structures to cache
12025fdd593SJeykumar Sankaran */
12125fdd593SJeykumar Sankaran #define DPU_CRTC_MAX_EVENT_COUNT 16
12225fdd593SJeykumar Sankaran
12325fdd593SJeykumar Sankaran /**
12425fdd593SJeykumar Sankaran * struct dpu_crtc - virtualized CRTC data structure
12525fdd593SJeykumar Sankaran * @base : Base drm crtc structure
12625fdd593SJeykumar Sankaran * @name : ASCII description of this crtc
12725fdd593SJeykumar Sankaran * @event : Pointer to last received drm vblank event. If there is a
12825fdd593SJeykumar Sankaran * pending vblank event, this will be non-null.
12925fdd593SJeykumar Sankaran * @vsync_count : Running count of received vsync events
13025fdd593SJeykumar Sankaran * @drm_requested_vblank : Whether vblanks have been enabled in the encoder
13125fdd593SJeykumar Sankaran * @property_info : Opaque structure for generic property support
13225fdd593SJeykumar Sankaran * @property_defaults : Array of default values for generic property support
13325fdd593SJeykumar Sankaran * @vblank_cb_count : count of vblank callback since last reset
13425fdd593SJeykumar Sankaran * @play_count : frame count between crtc enable and disable
13525fdd593SJeykumar Sankaran * @vblank_cb_time : ktime at vblank count reset
13625fdd593SJeykumar Sankaran * @enabled : whether the DPU CRTC is currently enabled. updated in the
13725fdd593SJeykumar Sankaran * commit-thread, not state-swap time which is earlier, so
13825fdd593SJeykumar Sankaran * safe to make decisions on during VBLANK on/off work
13925fdd593SJeykumar Sankaran * @feature_list : list of color processing features supported on a crtc
14025fdd593SJeykumar Sankaran * @active_list : list of color processing features are active
14125fdd593SJeykumar Sankaran * @dirty_list : list of color processing features are dirty
14225fdd593SJeykumar Sankaran * @ad_dirty: list containing ad properties that are dirty
14325fdd593SJeykumar Sankaran * @ad_active: list containing ad properties that are active
14425fdd593SJeykumar Sankaran * @frame_pending : Whether or not an update is pending
14525fdd593SJeykumar Sankaran * @frame_events : static allocation of in-flight frame events
14625fdd593SJeykumar Sankaran * @frame_event_list : available frame event list
14725fdd593SJeykumar Sankaran * @spin_lock : spin lock for frame event, transaction status, etc...
14825fdd593SJeykumar Sankaran * @frame_done_comp : for frame_event_done synchronization
14925fdd593SJeykumar Sankaran * @event_thread : Pointer to event handler thread
15025fdd593SJeykumar Sankaran * @event_worker : Event worker queue
15125fdd593SJeykumar Sankaran * @event_lock : Spinlock around event handling code
15225fdd593SJeykumar Sankaran * @phandle: Pointer to power handler
15325fdd593SJeykumar Sankaran * @cur_perf : current performance committed to clock/bandwidth driver
15478d9b458SJessica Zhang * @crc_source : CRC source
15525fdd593SJeykumar Sankaran */
15625fdd593SJeykumar Sankaran struct dpu_crtc {
15725fdd593SJeykumar Sankaran struct drm_crtc base;
15825fdd593SJeykumar Sankaran char name[DPU_CRTC_NAME_SIZE];
15925fdd593SJeykumar Sankaran
16025fdd593SJeykumar Sankaran struct drm_pending_vblank_event *event;
16125fdd593SJeykumar Sankaran u32 vsync_count;
16225fdd593SJeykumar Sankaran
16325fdd593SJeykumar Sankaran u32 vblank_cb_count;
16425fdd593SJeykumar Sankaran u64 play_count;
16525fdd593SJeykumar Sankaran ktime_t vblank_cb_time;
16625fdd593SJeykumar Sankaran bool enabled;
16725fdd593SJeykumar Sankaran
16825fdd593SJeykumar Sankaran struct list_head feature_list;
16925fdd593SJeykumar Sankaran struct list_head active_list;
17025fdd593SJeykumar Sankaran struct list_head dirty_list;
17125fdd593SJeykumar Sankaran struct list_head ad_dirty;
17225fdd593SJeykumar Sankaran struct list_head ad_active;
17325fdd593SJeykumar Sankaran
17425fdd593SJeykumar Sankaran atomic_t frame_pending;
17525fdd593SJeykumar Sankaran struct dpu_crtc_frame_event frame_events[DPU_CRTC_FRAME_EVENT_SIZE];
17625fdd593SJeykumar Sankaran struct list_head frame_event_list;
17725fdd593SJeykumar Sankaran spinlock_t spin_lock;
17825fdd593SJeykumar Sankaran struct completion frame_done_comp;
17925fdd593SJeykumar Sankaran
18025fdd593SJeykumar Sankaran /* for handling internal event thread */
18125fdd593SJeykumar Sankaran spinlock_t event_lock;
18225fdd593SJeykumar Sankaran
18325fdd593SJeykumar Sankaran struct dpu_core_perf_params cur_perf;
18425fdd593SJeykumar Sankaran
18525fdd593SJeykumar Sankaran struct dpu_crtc_smmu_state_data smmu_state;
18625fdd593SJeykumar Sankaran };
18725fdd593SJeykumar Sankaran
18825fdd593SJeykumar Sankaran #define to_dpu_crtc(x) container_of(x, struct dpu_crtc, base)
18925fdd593SJeykumar Sankaran
19025fdd593SJeykumar Sankaran /**
19125fdd593SJeykumar Sankaran * struct dpu_crtc_state - dpu container for atomic crtc state
19225fdd593SJeykumar Sankaran * @base: Base drm crtc state structure
19325fdd593SJeykumar Sankaran * @bw_control : true if bw/clk controlled by core bw/clk properties
19425fdd593SJeykumar Sankaran * @bw_split_vote : true if bw controlled by llcc/dram bw properties
19525fdd593SJeykumar Sankaran * @lm_bounds : LM boundaries based on current mode full resolution, no ROI.
19625fdd593SJeykumar Sankaran * Origin top left of CRTC.
19725fdd593SJeykumar Sankaran * @property_state: Local storage for msm_prop properties
19825fdd593SJeykumar Sankaran * @property_values: Current crtc property values
19925fdd593SJeykumar Sankaran * @input_fence_timeout_ns : Cached input fence timeout, in ns
20025fdd593SJeykumar Sankaran * @new_perf: new performance state being requested
2019222cdd2SJeykumar Sankaran * @num_mixers : Number of mixers in use
2029222cdd2SJeykumar Sankaran * @mixers : List of active mixers
2039222cdd2SJeykumar Sankaran * @num_ctls : Number of ctl paths in use
2049222cdd2SJeykumar Sankaran * @hw_ctls : List of active ctl paths
20558fc5d18SJessica Zhang * @crc_source : CRC source
20658fc5d18SJessica Zhang * @crc_frame_skip_count: Number of frames skipped before getting CRC
20725fdd593SJeykumar Sankaran */
20825fdd593SJeykumar Sankaran struct dpu_crtc_state {
20925fdd593SJeykumar Sankaran struct drm_crtc_state base;
21025fdd593SJeykumar Sankaran
21125fdd593SJeykumar Sankaran bool bw_control;
21225fdd593SJeykumar Sankaran bool bw_split_vote;
21325fdd593SJeykumar Sankaran struct drm_rect lm_bounds[CRTC_DUAL_MIXERS];
21425fdd593SJeykumar Sankaran
21525fdd593SJeykumar Sankaran uint64_t input_fence_timeout_ns;
21625fdd593SJeykumar Sankaran
21725fdd593SJeykumar Sankaran struct dpu_core_perf_params new_perf;
2189222cdd2SJeykumar Sankaran
2199222cdd2SJeykumar Sankaran /* HW Resources reserved for the crtc */
2209222cdd2SJeykumar Sankaran u32 num_mixers;
2219222cdd2SJeykumar Sankaran struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS];
2229222cdd2SJeykumar Sankaran
2239222cdd2SJeykumar Sankaran u32 num_ctls;
2249222cdd2SJeykumar Sankaran struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS];
22578d9b458SJessica Zhang
22678d9b458SJessica Zhang enum dpu_crtc_crc_source crc_source;
22778d9b458SJessica Zhang int crc_frame_skip_count;
22825fdd593SJeykumar Sankaran };
22925fdd593SJeykumar Sankaran
23025fdd593SJeykumar Sankaran #define to_dpu_crtc_state(x) \
23125fdd593SJeykumar Sankaran container_of(x, struct dpu_crtc_state, base)
23225fdd593SJeykumar Sankaran
23325fdd593SJeykumar Sankaran /**
23425fdd593SJeykumar Sankaran * dpu_crtc_frame_pending - retun the number of pending frames
23525fdd593SJeykumar Sankaran * @crtc: Pointer to drm crtc object
23625fdd593SJeykumar Sankaran */
dpu_crtc_frame_pending(struct drm_crtc * crtc)23725fdd593SJeykumar Sankaran static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc)
23825fdd593SJeykumar Sankaran {
23958fba464SSean Paul return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL;
24025fdd593SJeykumar Sankaran }
24125fdd593SJeykumar Sankaran
24225fdd593SJeykumar Sankaran /**
24325fdd593SJeykumar Sankaran * dpu_crtc_vblank - enable or disable vblanks for this crtc
24425fdd593SJeykumar Sankaran * @crtc: Pointer to drm crtc object
24525fdd593SJeykumar Sankaran * @en: true to enable vblanks, false to disable
24625fdd593SJeykumar Sankaran */
24725fdd593SJeykumar Sankaran int dpu_crtc_vblank(struct drm_crtc *crtc, bool en);
24825fdd593SJeykumar Sankaran
24925fdd593SJeykumar Sankaran /**
250e4914867SSean Paul * dpu_crtc_vblank_callback - called on vblank irq, issues completion events
251e4914867SSean Paul * @crtc: Pointer to drm crtc object
252e4914867SSean Paul */
253e4914867SSean Paul void dpu_crtc_vblank_callback(struct drm_crtc *crtc);
254e4914867SSean Paul
255e4914867SSean Paul /**
25625fdd593SJeykumar Sankaran * dpu_crtc_commit_kickoff - trigger kickoff of the commit for this crtc
25725fdd593SJeykumar Sankaran * @crtc: Pointer to drm crtc object
25825fdd593SJeykumar Sankaran */
259b4bb9f15SRob Clark void dpu_crtc_commit_kickoff(struct drm_crtc *crtc);
26025fdd593SJeykumar Sankaran
26125fdd593SJeykumar Sankaran /**
26225fdd593SJeykumar Sankaran * dpu_crtc_complete_commit - callback signalling completion of current commit
26325fdd593SJeykumar Sankaran * @crtc: Pointer to drm crtc object
26425fdd593SJeykumar Sankaran */
26580b4b4a7SRob Clark void dpu_crtc_complete_commit(struct drm_crtc *crtc);
26625fdd593SJeykumar Sankaran
26725fdd593SJeykumar Sankaran /**
26825fdd593SJeykumar Sankaran * dpu_crtc_init - create a new crtc object
26925fdd593SJeykumar Sankaran * @dev: dpu device
27025fdd593SJeykumar Sankaran * @plane: base plane
27107ca1fc0SSravanthi Kollukuduru * @cursor: cursor plane
27225fdd593SJeykumar Sankaran * @Return: new crtc object or error
27325fdd593SJeykumar Sankaran */
27407ca1fc0SSravanthi Kollukuduru struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane,
27507ca1fc0SSravanthi Kollukuduru struct drm_plane *cursor);
27625fdd593SJeykumar Sankaran
27725fdd593SJeykumar Sankaran /**
27825fdd593SJeykumar Sankaran * dpu_crtc_register_custom_event - api for enabling/disabling crtc event
27925fdd593SJeykumar Sankaran * @kms: Pointer to dpu_kms
28025fdd593SJeykumar Sankaran * @crtc_drm: Pointer to crtc object
28125fdd593SJeykumar Sankaran * @event: Event that client is interested
28225fdd593SJeykumar Sankaran * @en: Flag to enable/disable the event
28325fdd593SJeykumar Sankaran */
28425fdd593SJeykumar Sankaran int dpu_crtc_register_custom_event(struct dpu_kms *kms,
28525fdd593SJeykumar Sankaran struct drm_crtc *crtc_drm, u32 event, bool en);
28625fdd593SJeykumar Sankaran
28725fdd593SJeykumar Sankaran /**
28825fdd593SJeykumar Sankaran * dpu_crtc_get_intf_mode - get interface mode of the given crtc
28925fdd593SJeykumar Sankaran * @crtc: Pointert to crtc
29025fdd593SJeykumar Sankaran */
29125fdd593SJeykumar Sankaran enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc);
29225fdd593SJeykumar Sankaran
29325fdd593SJeykumar Sankaran /**
29425fdd593SJeykumar Sankaran * dpu_crtc_get_client_type - check the crtc type- rt, nrt etc.
29525fdd593SJeykumar Sankaran * @crtc: Pointer to crtc
29625fdd593SJeykumar Sankaran */
dpu_crtc_get_client_type(struct drm_crtc * crtc)29725fdd593SJeykumar Sankaran static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(
29825fdd593SJeykumar Sankaran struct drm_crtc *crtc)
29925fdd593SJeykumar Sankaran {
30058fba464SSean Paul return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT;
30125fdd593SJeykumar Sankaran }
30225fdd593SJeykumar Sankaran
30325fdd593SJeykumar Sankaran #endif /* _DPU_CRTC_H_ */
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