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/openbmc/linux/drivers/iio/adc/
H A Dadi-axi-adc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Analog Devices Generic AXI ADC IP core
6 * Copyright 2012-2020 Analog Devices Inc.
21 #include <linux/fpga/adi-axi-common.h>
24 #include <linux/iio/buffer-dmaengine.h>
33 /* ADC controls */
40 /* ADC Channel controls */
44 #define ADI_AXI_REG_CHAN_CTRL_PN_SEL_OWR BIT(10)
69 ret = regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN, in axi_adc_enable()
75 return regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN, in axi_adc_enable()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # ADC drivers
10 bool "ST-Ericsson AB8500 GPADC driver"
25 tristate "Analog Device AD4130 ADC Driver"
33 Say yes here to build support for Analog Devices AD4130-8 SPI analog
34 to digital converters (ADC).
40 tristate "Analog Devices AD7091R5 ADC Driver"
44 Say yes here to build support for Analog Devices AD7091R-5 ADC.
47 tristate "Analog Devices AD7124 and similar sigma-delta ADCs driver"
51 Say yes here to build support for Analog Devices AD7124-4 and AD7124-8
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H A Dxilinx-xadc-core.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2013-2014 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
9 * - XADC hardmacro: Xilinx UG480
10 * - ZYNQ XADC interface: Xilinx UG585
11 * - AXI XADC interface: Xilinx PG019
36 #include "xilinx-xadc.h"
74 #define XADC_ZYNQ_STATUS_CFIFOE BIT(10)
88 /* AXI register definitions */
117 * overloaded by the interrupts that it soft-lockups. For this reason the driver
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/openbmc/u-boot/arch/arm/dts/
H A Dimx6sx.dtsi9 #include <dt-bindings/clock/imx6sx-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6sx-pinfunc.h"
55 #address-cells = <1>;
56 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
62 next-level-cache = <&L2>;
63 operating-points = <
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H A Dimx6ul.dtsi9 #include <dt-bindings/clock/imx6ul-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6ul-pinfunc.h"
54 #address-cells = <1>;
55 #size-cells = <0>;
58 compatible = "arm,cortex-a7";
61 clock-latency = <61036>; /* two CLK32 periods */
62 operating-points = <
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H A Dimx7s.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/clock/imx7d-clock.h>
45 #include <dt-bindings/power/imx7-power.h>
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include "imx7d-pinfunc.h"
52 #address-cells = <1>;
53 #size-cells = <1>;
56 * pre-existing /chosen node to be available to insert the
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H A Dimx6ull.dtsi2 * Copyright 2015-2016 Freescale Semiconductor, Inc.
9 #include <dt-bindings/clock/imx6ul-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6ull-pinfunc.h"
14 #include "imx6ull-pinfunc-snvs.h"
52 #address-cells = <1>;
53 #size-cells = <0>;
56 compatible = "arm,cortex-a7";
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/openbmc/u-boot/arch/sandbox/dts/
H A Dtest.dts1 /dts-v1/;
6 #address-cells = <1>;
7 #size-cells = <1>;
27 testfdt6 = "/e-test";
28 testbus3 = "/some-bus";
29 testfdt0 = "/some-bus/c-test@0";
30 testfdt1 = "/some-bus/c-test@1";
31 testfdt3 = "/b-test";
32 testfdt5 = "/some-bus/c-test@5";
33 testfdt8 = "/a-test";
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6sx-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6sx-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
60 #address-cells = <1>;
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H A Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
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H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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/openbmc/linux/arch/arc/boot/dts/
H A Dhsdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/reset/snps,hsdk-reset.h>
18 #address-cells = <2>;
19 #size-cells = <2>;
22 … "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
30 #address-cells = <1>;
31 #size-cells = <0>;
62 input_clk: input-clk {
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/openbmc/linux/drivers/clk/
H A Dclk-npcm8xx.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/clk-provider.h>
23 #include <dt-bindings/clock/nuvoton,npcm845-clk.h>
24 #include <soc/nuvoton/clock-npcm8xx.h>
43 #define PLLCON_OTDV1 GENMASK(10, 8)
168 { 10, 2, sucksel_mux_table, "serial_usb_mux", sucksel_mux_parents,
190 { NPCM8XX_CLKDIV1, 21, 5, "pre_adc", &npcm8xx_muxes[6].hw, CLK_DIVIDER_READ_ONLY, 0, -1 },
196 …{ NPCM8XX_CLKDIV1, 28, 3, "adc", &npcm8xx_pre_divs[0].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWE…
237 val = readl_relaxed(pll->pllcon); in npcm8xx_clk_pll_recalc_rate()
265 return ERR_PTR(-ENOMEM); in npcm8xx_clk_register_pll()
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H A Dclk-npcm7xx.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/clk-provider.h>
20 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
35 #define PLLCON_OTDV1 GENMASK(10, 8)
51 val = readl_relaxed(pll->pllcon); in npcm7xx_clk_pll_recalc_rate()
79 return ERR_PTR(-ENOMEM); in npcm7xx_clk_register_pll()
89 pll->pllcon = pllcon; in npcm7xx_clk_register_pll()
90 pll->hw.init = &init; in npcm7xx_clk_register_pll()
92 hw = &pll->hw; in npcm7xx_clk_register_pll()
142 * defined in include/dt-bindings/clock/nuvoton, NPCM7XX-clock.h for
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/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-cygnus.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
60 next-level-cache = <&L2>;
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/openbmc/linux/sound/soc/codecs/
H A Drt5631.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5631.c -- RT5631 ALSA Soc Audio driver
22 #include <sound/soc-dapm.h>
68 * rt5631_write_index - write index register of 2nd layer
78 * rt5631_read_index - read index register of 2nd layer
169 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
170 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0);
171 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
189 ucontrol->value.integer.value[0] = rt5631->dmic_used_flag; in rt5631_dmic_get()
200 rt5631->dmic_used_flag = ucontrol->value.integer.value[0]; in rt5631_dmic_put()
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/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1126.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rv1126-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rockchip,rv1126-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
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/openbmc/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-7000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "xlnx,zynq-7000";
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,cortex-a9";
20 clock-latency = <1000>;
21 cpu0-supply = <&regulator_vccpint>;
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/openbmc/linux/drivers/hwmon/
H A Daxi-fan-control.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/fpga/adi-axi-common.h>
11 #include <linux/hwmon-sysfs.h>
65 iowrite32(val, ctl->base + reg); in axi_iowrite()
71 return ioread32(ctl->base + reg); in axi_ioread()
76 * T = /raw * 509.3140064 / 65535) - 280.2308787
82 u32 temp = axi_ioread(attr->index, ctl); in axi_fan_control_show()
84 temp = DIV_ROUND_CLOSEST_ULL(temp * 509314ULL, 65535) - 280230; in axi_fan_control_show()
97 ret = kstrtou32(buf, 10, &temp); in axi_fan_control_store()
102 axi_iowrite(temp, attr->index, ctl); in axi_fan_control_store()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 sensors-detect script from the lm_sensors package. Read
21 <file:Documentation/hwmon/userspace-tools.rst> for details.
76 with SMpro co-processor.
290 will be called as370-hwmon.
310 AXI HDL FAN monitoring core.
313 will be called axi-fan-control
322 lm-sensors 2.10.1 for proper userspace support.
328 tristate "AMD Family 10h+ temperature sensor"
333 the AMD Family 10h and all revisions of the AMD Family 11h,
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/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
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/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g054.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g054-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
23 audio_clk2: audio2-clk {
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H A Dr9a07g044.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g044-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
23 audio_clk2: audio2-clk {
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/openbmc/u-boot/cmd/
H A DKconfig4 bool "Support U-Boot commands"
7 Enable U-Boot's command-line functions. This provides a means
8 to enter commands into U-Boot for a wide variety of purposes. It
12 substantially to the size of U-Boot.
71 U-Boot automatic booting process and bring the device
72 to the U-Boot prompt for user input.
103 autoboot starts booting, U-Boot gives a command prompt. The
104 U-Boot prompt will time out if CONFIG_BOOT_RETRY_TIME is
116 U-Boot gives a command prompt. The U-Boot prompt never
120 bool "Enable Ctrl-C autoboot interruption"
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