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/openbmc/qemu/hw/arm/
H A Dfsl-imx25.c42 object_initialize_child(obj, "avic", &s->avic, TYPE_IMX_AVIC); in fsl_imx25_init()
90 if (!sysbus_realize(SYS_BUS_DEVICE(&s->avic), errp)) { in fsl_imx25_realize()
93 sysbus_mmio_map(SYS_BUS_DEVICE(&s->avic), 0, FSL_IMX25_AVIC_ADDR); in fsl_imx25_realize()
94 sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 0, in fsl_imx25_realize()
96 sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 1, in fsl_imx25_realize()
124 qdev_get_gpio_in(DEVICE(&s->avic), in fsl_imx25_realize()
147 qdev_get_gpio_in(DEVICE(&s->avic), in fsl_imx25_realize()
168 qdev_get_gpio_in(DEVICE(&s->avic), in fsl_imx25_realize()
181 qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX25_FEC_IRQ)); in fsl_imx25_realize()
188 qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX25_RNGC_IRQ)); in fsl_imx25_realize()
[all …]
H A Dfsl-imx31.c38 object_initialize_child(obj, "avic", &s->avic, TYPE_IMX_AVIC); in fsl_imx31_init()
72 if (!sysbus_realize(SYS_BUS_DEVICE(&s->avic), errp)) { in fsl_imx31_realize()
75 sysbus_mmio_map(SYS_BUS_DEVICE(&s->avic), 0, FSL_IMX31_AVIC_ADDR); in fsl_imx31_realize()
76 sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 0, in fsl_imx31_realize()
78 sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 1, in fsl_imx31_realize()
104 qdev_get_gpio_in(DEVICE(&s->avic), in fsl_imx31_realize()
116 qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX31_GPT_IRQ)); in fsl_imx31_realize()
136 qdev_get_gpio_in(DEVICE(&s->avic), in fsl_imx31_realize()
159 qdev_get_gpio_in(DEVICE(&s->avic), in fsl_imx31_realize()
182 qdev_get_gpio_in(DEVICE(&s->avic), in fsl_imx31_realize()
H A Dkzm.c118 qdev_get_gpio_in(DEVICE(&s->soc.avic), 52)); in kzm_init()
123 qdev_get_gpio_in(DEVICE(&s->soc.avic), 52), in kzm_init()
/openbmc/linux/arch/x86/kvm/svm/
H A Davic.c37 * use whatever bits remain to assign arbitrary AVIC IDs to VMs. Note, the
95 * Note: KVM supports hybrid-AVIC mode, where KVM emulates x2APIC MSR in avic_activate_vmcb()
97 * achieved using AVIC doorbell. KVM disables the APIC access page in avic_activate_vmcb()
99 * AVIC in hybrid mode activates only the doorbell mechanism. in avic_activate_vmcb()
109 * mapping into the TLB while AVIC was disabled. in avic_activate_vmcb()
294 * Note, AVIC hardware walks the nested page table to check in avic_init_backing_page()
306 /* Setting AVIC backing page address in the phy APIC ID table */ in avic_init_backing_page()
353 * KVM inhibits AVIC if any vCPU ID diverges from the vCPUs APIC ID, in avic_kick_vcpu_by_physical_id()
453 * AVIC is inhibited if vCPUs aren't mapped 1:1 with logical in avic_kick_target_vcpus_fast()
505 * Emulate IPIs that are not handled by AVIC hardware, which in avic_incomplete_ipi_interception()
[all …]
H A Dsvm.h62 VMCB_AVIC, /* AVIC APIC_BAR, AVIC APIC_BACKING_PAGE,
63 * AVIC PHYSICAL_TABLE pointer,
64 * AVIC LOGICAL_TABLE pointer
99 /* Struct members for AVIC */
627 /* avic.c */
H A Dsvm.c133 * the AVIC hardware would generate GP fault. Therefore, always
226 * enable / disable AVIC. Because the defaults differ for APICv
229 static bool avic; variable
230 module_param(avic, bool, 0444);
1659 * The following fields are ignored when AVIC is enabled in svm_set_vintr()
3220 * If not running nested, for AVIC, the only reason to end up here is ExtINTs. in interrupt_window_interception()
3221 * In this case AVIC was temporarily disabled for in interrupt_window_interception()
3224 * If running nested, still remove the VM wide AVIC inhibit to in interrupt_window_interception()
3229 * AVIC still inhibited due to per-cpu AVIC inhibition. in interrupt_window_interception()
3685 * will automatically process AVIC interrupts at the next VMRUN. in svm_complete_interrupt_delivery()
[all …]
/openbmc/linux/arch/arm/mach-imx/
H A Davic.c97 * The LPIMR registers use 0 to allow an interrupt, the AVIC in avic_irq_suspend()
130 gc = irq_alloc_generic_chip("mxc-avic", 1, irq_start, avic_base, in avic_init_gc()
162 * This function initializes the AVIC hardware and disables all the
186 /* put the AVIC into the reset value with in mxc_init_irq()
203 np = of_find_compatible_node(NULL, NULL, "fsl,avic"); in mxc_init_irq()
236 IRQCHIP_DECLARE(imx_avic, "fsl,avic", imx_avic_init);
H A Dhardware.h49 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
57 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
63 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
H A Dmm-imx3.c75 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
116 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
H A Dmx3x.h19 * FC400000 68000000 128M AVIC
98 * ROMP and AVIC
H A DMakefile15 obj-$(CONFIG_MXC_AVIC) += avic.o
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx35.dtsi48 avic: avic-interrupt-controller@68000000 { label
49 compatible = "fsl,imx35-avic", "fsl,avic";
59 interrupt-parent = <&avic>;
H A Dimx31.dtsi44 avic: interrupt-controller@68000000 { label
45 compatible = "fsl,imx31-avic", "fsl,avic";
55 interrupt-parent = <&avic>;
/openbmc/qemu/docs/system/i386/
H A Dhyperv.rst180 ``hv-avic`` (``hv-apicv``)
181 The enlightenment allows to use Hyper-V SynIC with hardware APICv/AVIC enabled.
184 Note: enabling this feature on old hardware (without APICv/AVIC support) may
314 - ``hv-avic``/``hv-apicv`` should not be enabled if the hardware does not
315 support APIC virtualization (Intel APICv, AMD AVIC).
/openbmc/qemu/docs/system/arm/
H A Dkzm.rst12 - AVIC
H A Dimx25-pdk.rst10 - AVIC
/openbmc/linux/Documentation/devicetree/bindings/edac/
H A Daspeed-sdram-edac.txt19 - interrupts: should be AVIC interrupt #0
/openbmc/linux/tools/testing/selftests/kvm/x86_64/
H A Dxapic_state_test.c202 * the guest in order to test AVIC. KVM disallows changing CPUID after in main()
203 * KVM_RUN and AVIC is disabled if _any_ vCPU is allowed to use x2APIC. in main()
/openbmc/qemu/include/hw/intc/
H A Dimx_avic.h23 #define TYPE_IMX_AVIC "imx.avic"
/openbmc/linux/arch/x86/kvm/
H A DMakefile33 kvm-amd-y += svm/svm.o svm/vmenter.o svm/pmu.o svm/nested.o svm/avic.o \
/openbmc/linux/arch/x86/include/asm/
H A Dkvm_host.h1168 /* INHIBITs that are relevant to both Intel's APICv and AMD's AVIC. */
1191 * was enabled, to avoid AVIC/APICv bypassing it.
1210 /* INHIBITs that are relevant only to the AMD's AVIC. */
1214 * AVIC is inhibited on a vCPU because it runs a nested guest.
1217 * cannot use the doorbell mechanism to signal interrupts via AVIC when
1224 * which cannot be injected when the AVIC is enabled, thus AVIC
1231 * which AVIC doesn't support for edge triggered interrupts.
1236 * AVIC is disabled because SEV doesn't support it.
1241 * AVIC is disabled because not all vCPUs with a valid LDR have a 1:1
H A Dsvm.h247 /* AVIC */
277 * For AVIC, the max index allowed for physical APIC ID table is 0xfe (254), as
/openbmc/qemu/include/hw/arm/
H A Dfsl-imx31.h46 IMXAVICState avic; member
/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-simple.yaml80 # Shanghai AVIC Optoelectronics 7" 1024x600 color TFT-LCD panel
81 - avic,tm070ddh03
/openbmc/linux/include/linux/
H A Damd-iommu.h164 /* IOMMU AVIC Function */

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