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/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
31 static inline void __iomem *hdmi_av_base(struct hdmi_core_data *core) in hdmi_av_base() argument
33 return core->base + HDMI_CORE_AV; in hdmi_av_base()
36 static int hdmi_core_ddc_init(struct hdmi_core_data *core) in hdmi_core_ddc_init() argument
38 void __iomem *base = core->base; in hdmi_core_ddc_init()
51 return -ETIMEDOUT; in hdmi_core_ddc_init()
62 return -ETIMEDOUT; in hdmi_core_ddc_init()
72 return -ETIMEDOUT; in hdmi_core_ddc_init()
78 static int hdmi_core_ddc_edid(struct hdmi_core_data *core, in hdmi_core_ddc_edid() argument
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H A Dhdmi5_core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP5 HDMI CORE IP driver library
39 static void hdmi_core_ddc_init(struct hdmi_core_data *core) in hdmi_core_ddc_init() argument
41 void __iomem *base = core->base; in hdmi_core_ddc_init()
118 static void hdmi_core_ddc_uninit(struct hdmi_core_data *core) in hdmi_core_ddc_uninit() argument
120 void __iomem *base = core->base; in hdmi_core_ddc_uninit()
128 static int hdmi_core_ddc_edid(struct hdmi_core_data *core, u8 *pedid, u8 ext) in hdmi_core_ddc_edid() argument
130 void __iomem *base = core->base; in hdmi_core_ddc_edid()
164 return -EIO; in hdmi_core_ddc_edid()
176 return -EIO; in hdmi_core_ddc_edid()
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/openbmc/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
30 static inline void __iomem *hdmi_av_base(struct hdmi_core_data *core) in hdmi_av_base() argument
32 return core->base + HDMI_CORE_AV; in hdmi_av_base()
35 int hdmi4_core_ddc_init(struct hdmi_core_data *core) in hdmi4_core_ddc_init() argument
37 void __iomem *base = core->base; in hdmi4_core_ddc_init()
50 return -ETIMEDOUT; in hdmi4_core_ddc_init()
61 return -ETIMEDOUT; in hdmi4_core_ddc_init()
71 return -ETIMEDOUT; in hdmi4_core_ddc_init()
79 struct hdmi_core_data *core = data; in hdmi4_core_ddc_read() local
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H A Dhdmi5_core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP5 HDMI CORE IP driver library
5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
26 void hdmi5_core_ddc_init(struct hdmi_core_data *core) in hdmi5_core_ddc_init() argument
28 void __iomem *base = core->base; in hdmi5_core_ddc_init()
105 void hdmi5_core_ddc_uninit(struct hdmi_core_data *core) in hdmi5_core_ddc_uninit() argument
107 void __iomem *base = core->base; in hdmi5_core_ddc_uninit()
117 struct hdmi_core_data *core = data; in hdmi5_core_ddc_read() local
118 void __iomem *base = core->base; in hdmi5_core_ddc_read()
152 return -EIO; in hdmi5_core_ddc_read()
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/openbmc/linux/sound/hda/
H A Dhdac_stream.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * HD-audio stream operations
11 #include <sound/core.h>
26 * +--+-------+
28 * +--+----+--+
32 * +--+----+--+
34 * +--+----+--+
39 * +--+----+--+
41 * +--+----+--+
45 * +--+----+--+
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H A Dhdac_component.c1 // SPDX-License-Identifier: GPL-2.0
2 // hdac_component.c - routines for sync between HD-A core and DRM driver
8 #include <sound/core.h>
23 * snd_hdac_set_codec_wakeup - Enable / disable HDMI/DP codec wakeup
24 * @bus: HDA core bus
27 * This function is supposed to be used only by a HD-audio controller
37 struct drm_audio_component *acomp = bus->audio_component; in snd_hdac_set_codec_wakeup()
39 if (!acomp || !acomp->ops) in snd_hdac_set_codec_wakeup()
40 return -ENODEV; in snd_hdac_set_codec_wakeup()
42 if (!acomp->ops->codec_wake_override) in snd_hdac_set_codec_wakeup()
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H A Dhdac_i915.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * hdac_i915.c - routines for sync between HD-A core and i915 display driver
9 #include <sound/core.h>
15 * snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW
16 * @bus: HDA core bus
20 * are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
30 struct drm_audio_component *acomp = bus->audio_component; in snd_hdac_i915_set_bclk()
31 struct pci_dev *pci = to_pci_dev(bus->dev); in snd_hdac_i915_set_bclk()
35 if (!acomp || !acomp->ops || !acomp->ops->get_cdclk_freq) in snd_hdac_i915_set_bclk()
40 cdclk_freq = acomp->ops->get_cdclk_freq(acomp->dev); in snd_hdac_i915_set_bclk()
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H A Dhdac_controller.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * HD-audio controller helpers
9 #include <sound/core.h>
19 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp()
25 dev_err(bus->dev, "CORB reset timeout#1, CORBRP = %d\n", in azx_clear_corbrp()
29 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp()
35 dev_err(bus->dev, "CORB reset timeout#2, CORBRP = %d\n", in azx_clear_corbrp()
40 * snd_hdac_bus_init_cmd_io - set up CORB/RIRB buffers
41 * @bus: HD-audio core bus
45 WARN_ON_ONCE(!bus->rb.area); in snd_hdac_bus_init_cmd_io()
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,rpmsg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Audio RPMSG CPU DAI Controller
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 fsl_rpmsg is a virtual audio device. Mapping to real hardware devices
14 are SAI, MICFIL, DMA controlled by Cortex M core. What we see from
15 Linux side is a device which provides audio service by rpmsg channel.
18 Cortex-A and Cortex-M.
21 - $ref: sound-card-common.yaml#
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H A Dxlnx,audio-formatter.txt1 Device-Tree bindings for Xilinx PL audio formatter
3 The IP core supports DMA, data formatting(AES<->PCM conversion)
4 of audio samples.
7 - compatible: "xlnx,audio-formatter-1.0"
8 - interrupt-names: Names specified to list of interrupts in same
13 - interrupts-parent: Phandle for interrupt controller.
14 - interrupts: List of Interrupt numbers.
15 - reg: Base address and size of the IP core instance.
16 - clock-names: List of input clocks.
18 - clocks: Input clock specifier. Refer to common clock bindings.
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/openbmc/linux/sound/hda/ext/
H A Dhdac_ext_stream.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * hdac-ext-stream.c - HD-audio extended stream operations.
20 * snd_hdac_ext_stream_init - initialize each stream (aka device)
21 * @bus: HD-audio core bus
22 * @hext_stream: HD-audio ext core stream object to initialize
34 if (bus->ppcap) { in snd_hdac_ext_stream_init()
35 hext_stream->pphc_addr = bus->ppcap + AZX_PPHC_BASE + in snd_hdac_ext_stream_init()
38 hext_stream->pplc_addr = bus->ppcap + AZX_PPLC_BASE + in snd_hdac_ext_stream_init()
39 AZX_PPLC_MULTI * bus->num_streams + in snd_hdac_ext_stream_init()
43 hext_stream->decoupled = false; in snd_hdac_ext_stream_init()
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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,audiocc-sm8250.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPASS Audio Clock Controller on SM8250 SoCs
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
15 See include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h for the full list
16 of Audio Clock controller clock IDs.
20 const: qcom,sm8250-lpass-audiocc
25 '#clock-cells':
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H A Dqcom,aoncc-sm8250.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
15 See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list
16 of Audio Clock controller clock IDs.
20 const: qcom,sm8250-lpass-aoncc
25 '#clock-cells':
30 - description: LPASS Core voting clock
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H A Dmvebu-gated-clock.txt12 -----------------------------------
13 0 Audio AC97 Cntrl
29 -----------------------------------
35 8 audio Audio Cntrl
38 15 sata0_core SATA 0 Core
44 21 sata1_core SATA 1 Core
50 29 crypto0_core Cryptographic Unit Port 0 Core
52 31 crypto1_core Cryptographic Unit Port 1 Core
56 -----------------------------------
57 0 audio Audio
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/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,apr-services.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,apr-services.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
22 3 = DSP Core Service
23 4 = Audio Front End Service.
26 7 = Audio Stream Manager Service.
27 8 = Audio Device Manager Service.
29 10 = Core voice stream.
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/openbmc/linux/Documentation/devicetree/bindings/dsp/
H A Dmediatek,mt8195-dsp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8195-dsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek mt8195 DSP core
10 - YC Hung <yc.hung@mediatek.com>
13 Some boards from mt8195 contain a DSP core used for
14 advanced pre- and post- audio processing.
18 const: mediatek,mt8195-dsp
22 - description: Address and size of the DSP Cfg registers
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H A Dmediatek,mt8186-dsp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek mt8186 DSP core
10 - Tinghan Shen <tinghan.shen@mediatek.com>
13 MediaTek mt8186 SoC contains a DSP core used for
14 advanced pre- and post- audio processing.
19 - mediatek,mt8186-dsp
20 - mediatek,mt8188-dsp
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/openbmc/linux/Documentation/sound/soc/
H A Ddapm.rst2 Dynamic Audio Power Management for Portable Devices
8 Dynamic Audio Power Management (DAPM) is designed to allow portable
9 Linux devices to use the minimum amount of power within the audio
11 such, can easily co-exist with the other PM systems.
14 all power switching is done within the ASoC core. No code changes or
16 switching decisions based upon any audio stream (capture/playback)
17 activity and audio mixer settings within the device.
20 audio subsystem, this includes internal codec power blocks and machine
26 VREF, VMID (core codec and audio power)
39 audio subsystem signal paths
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/openbmc/linux/arch/parisc/kernel/
H A Dhardware.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Based on the document "PA-RISC 1.1 I/O Firmware Architecture
73 {HPHW_NPROC,0x312,0x4,0x81,"Strider-50 (715S/50)"},
74 {HPHW_NPROC,0x313,0x4,0x81,"Strider-33 (715S/33)"},
75 {HPHW_NPROC,0x314,0x4,0x81,"Trailways-50 (715T/50)"},
76 {HPHW_NPROC,0x315,0x4,0x81,"Trailways-33 (715T/33)"},
87 {HPHW_NPROC,0x482,0x4,0x81,"WB-80 (E35)"},
88 {HPHW_NPROC,0x483,0x4,0x81,"WB-96 (E45)"},
89 {HPHW_NPROC,0x484,0x4,0x81,"UL Proc L-100 (811/D210,D310)"},
90 {HPHW_NPROC,0x485,0x4,0x81,"UL Proc L-75 (801/D200)"},
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/openbmc/u-boot/board/freescale/p1022ds/
H A DREADME2 --------
3 P1022ds is a Low End Dual core platform supporting the P1022 processor
4 of QorIQ series. P1022 is an e500 based dual core SOC.
8 -------------------------------
12 'setenv hwconfig tdm' to enable TDM and disable Audio
13 'setenv hwconfig audclk:12' to enable Audio(codec clock sources is 12MHz)
15 'setenv hwconfig 'usb2;tdm' to enable USB2 and TDM, disable eTsec2 and Audio
16 'setenv hwconfig 'usb2;audclk:11' to enable USB2 and Audio(codec clock sources
19 Warning: TDM and AUDIO can not enable simultaneous !
20 and AUDIO codec clock sources only setting as 11MHz or 12MHz !
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/openbmc/linux/drivers/media/pci/cx88/
H A Dcx88-alsa.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for audio capture
14 #include "cx88-reg.h"
22 #include <linux/dma-mapping.h>
26 #include <sound/core.h>
37 chip->core->name, ##arg); \
41 * Data type declarations - Can be moded to a header file later
54 struct cx88_core *core; member
60 /* audio controls */
81 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
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/openbmc/linux/drivers/mfd/
H A Dwl1273-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * MFD driver for wl1273 FM radio and audio codec submodules.
9 #include <linux/mfd/wl1273-core.h>
13 #define DRIVER_DESC "WL1273 FM Radio Core"
21 static int wl1273_fm_read_reg(struct wl1273_core *core, u8 reg, u16 *value) in wl1273_fm_read_reg() argument
23 struct i2c_client *client = core->client; in wl1273_fm_read_reg()
29 dev_err(&client->dev, "%s: Read: %d fails.\n", __func__, reg); in wl1273_fm_read_reg()
30 return -EREMOTEIO; in wl1273_fm_read_reg()
38 static int wl1273_fm_write_cmd(struct wl1273_core *core, u8 cmd, u16 param) in wl1273_fm_write_cmd() argument
40 struct i2c_client *client = core->client; in wl1273_fm_write_cmd()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 tristate "AMD CS5535 and CS5536 southbridge core functions"
20 This is the core driver for CS5535/CS5536 MFD functions. This is
45 tristate "Active-semi ACT8945A"
50 Support for the ACT8945A PMIC from Active-semi. This device
51 features three step-down DC/DC converters and four low-dropout
67 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
70 called sun4i-gpadc.
82 tristate "Ampere Computing SMpro core driver"
101 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dsil,sii9022.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Boris Brezillon <bbrezillon@kernel.org>
15 - items:
16 - enum:
17 - sil,sii9022-cpi # CEC Programming Interface
18 - sil,sii9022-tpi # Transmitter Programming Interface
19 - const: sil,sii9022
20 - const: sil,sii9022
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/openbmc/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
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