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/openbmc/linux/Documentation/devicetree/bindings/serial/
H A D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: serial.yaml#
14 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
15 - if:
17 - required:
18 - aspeed,lpc-io-reg
19 - required:
20 - aspeed,lpc-interrupts
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dast2500.dtsi3 * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
9 compatible = "aspeed,ast2500";
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&vic>;
34 serial5 = &vuart;
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm1176jzf-s";
54 compatible = "simple-bus";
[all …]
/openbmc/linux/drivers/tty/serial/8250/
H A D8250_aspeed_vuart.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Serial Port driver for Aspeed VUART device
51 * The VUART is basically two UART 'front ends' connected by their FIFO
62 * to the host on the Host <-> BMC LPC bus. It could be different on a
66 static inline u8 aspeed_vuart_readb(struct aspeed_vuart *vuart, u8 reg) in aspeed_vuart_readb() argument
68 return readb(vuart->port->port.membase + reg); in aspeed_vuart_readb()
71 static inline void aspeed_vuart_writeb(struct aspeed_vuart *vuart, u8 val, u8 reg) in aspeed_vuart_writeb() argument
73 writeb(val, vuart->port->port.membase + reg); in aspeed_vuart_writeb()
79 struct aspeed_vuart *vuart = dev_get_drvdata(dev); in lpc_address_show() local
82 addr = (aspeed_vuart_readb(vuart, ASPEED_VUART_ADDRH) << 8) | in lpc_address_show()
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
7 compatible = "aspeed,ast2500";
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
32 serial5 = &vuart;
36 #address-cells = <1>;
37 #size-cells = <0>;
[all …]
H A Daspeed-bmc-tyan-s8036.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s8036-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
[all …]
H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
[all …]
H A Daspeed-bmc-tyan-s7106.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s7106-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
[all …]
H A Daspeed-bmc-arm-stardragon4800-rep2.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
9 compatible = "hxt,stardragon4800-rep2-bmc", "aspeed,ast2500";
12 stdout-path = &uart5;
20 iio-hwmon {
21 compatible = "iio-hwmon";
22 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
26 iio-hwmon-battery {
[all …]
H A Daspeed-bmc-opp-nicole.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
9 compatible = "yadro,nicole-bmc", "aspeed,ast2500";
12 stdout-path = &uart5;
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
26 no-map;
[all …]
H A Daspeed-bmc-facebook-yosemitev2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/i2c/i2c.h>
9 compatible = "facebook,yosemitev2-bmc", "aspeed,ast2500";
14 stdout-path = &uart5;
21 iio-hwmon {
23 compatible = "iio-hwmon";
24 io-channels = <&adc 0> , <&adc 1> , <&adc 2> , <&adc 3> ,
35 m25p,fast-read;
[all …]
H A Daspeed-bmc-opp-romulus.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ibm,romulus-bmc", "aspeed,ast2500";
11 stdout-path = &uart5;
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
25 no-map;
[all …]
H A Daspeed-bmc-asrock-e3c246d4i.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "asrock,e3c246d4i-bmc", "aspeed,ast2500";
18 stdout-path = &uart5;
27 compatible = "gpio-leds";
32 linux,default-trigger = "timer";
[all …]
H A Daspeed-bmc-opp-lanyang.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
10 compatible = "inventec,lanyang-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 no-map;
[all …]
H A Daspeed-bmc-asrock-romed8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "asrock,romed8hm3-bmc", "aspeed,ast2500";
17 stdout-path = &uart5;
26 compatible = "gpio-leds";
30 linux,default-trigger = "timer";
33 system-fault {
[all …]
H A Daspeed-bmc-amd-daytonax.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "amd,daytonax-bmc", "aspeed,ast2500";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
24 compatible = "shared-dma-pool";
[all …]
H A Daspeed-bmc-amd-ethanolx.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
18 reserved-memory {
19 #address-cells = <1>;
20 #size-cells = <1>;
26 compatible = "shared-dma-pool";
[all …]
H A Daspeed-bmc-asrock-spc621d8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "asrock,spc621d8hm3-bmc", "aspeed,ast2500";
21 stdout-path = &uart5;
30 compatible = "gpio-leds";
34 linux,default-trigger = "timer";
[all …]
H A Daspeed-bmc-asrock-x570d4u.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/common.h>
9 compatible = "asrock,x570d4u-bmc", "aspeed,ast2500";
19 stdout-path = &uart5;
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
[all …]
H A Daspeed-bmc-inspur-fp5280g2.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/leds-pca955x.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "inspur,fp5280g2-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
[all …]
H A Daspeed-bmc-opp-mowgli.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/leds-pca955x.h>
9 compatible = "ibm,mowgli-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
[all …]
H A Daspeed-bmc-opp-zaius.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ingrasys,zaius-bmc", "aspeed,ast2500";
19 stdout-path = &uart5;
27 reserved-memory {
28 #address-cells = <1>;
29 #size-cells = <1>;
33 no-map;
[all …]
H A Daspeed-bmc-inspur-nf5280m6.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "inspur,nf5280m6-bmc", "aspeed,ast2500";
15 stdout-path = &uart5;
23 reserved-memory {
24 #address-cells = <1>;
[all …]
H A Daspeed-bmc-opp-witherspoon.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/leds-pca955x.h>
9 compatible = "ibm,witherspoon-bmc", "aspeed,ast2500";
12 stdout-path = &uart5;
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
[all …]
/openbmc/libmctp/docs/bindings/
H A Dvendor-ibm-astlpc.md18 …<https://www.intel.com/content/dam/www/program/design/us/en/documents/low-pin-count-interface-spec…
29 MCTP-compliant endpoints must accept.
33 A hardware-defined flag bit in a KCS device's Status Register (STR). The IBF
42 ### KCS: Keyboard-Controller-Style
48 systems. This interface is available built-in to several commercially available
49 microcontrollers. Data is transferred across the KCS interface using a per-byte
68 values larger than the BTU may improve throughput for data-intensive transfers.
72 A hardware-defined flag bit in a KCS device's Status Register (STR). The OBF
84 BMC-controlled, eight-bit register exposed to both the BMC and the host for
86 Bits that are not defined by hardware can be software-controlled in a manner
[all …]
/openbmc/
Dopengrok1.0.log1 2025-03-18 03:00:46.767-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-03-18 03:00:46.892-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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