| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | aspeed-lpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Aspeed Low Pin Count (LPC) Bus Controller
11 - Andrew Jeffery <andrew@aj.id.au>
12 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
17 primary use case of the Aspeed LPC controller is as a slave on the bus
21 The LPC controller is represented as a multi-function device to account for the
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| /openbmc/linux/Documentation/devicetree/bindings/ipmi/ |
| H A D | aspeed,ast2400-kcs-bmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
13 The Aspeed BMC SoCs typically use the Keyboard-Controller-Style (KCS)
14 interfaces on the LPC bus for in-band IPMI communication with their host.
19 - description: Channel ID derived from reg
22 - aspeed,ast2400-kcs-bmc-v2
23 - aspeed,ast2500-kcs-bmc-v2
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| /openbmc/u-boot/arch/arm/mach-aspeed/ |
| H A D | Kconfig | 21 The Aspeed AST2400 is a ARM-based SoC with arm926ejs CPU.
23 which is enabled by support of LPC and eSPI peripherals.
26 bool "Support Aspeed AST2500 SoC"
30 The Aspeed AST2500 is a ARM-based SoC with arm1176 CPU.
32 which is enabled by support of LPC and eSPI peripherals.
43 The Aspeed AST2600 is a ARM-based SoC with Cortex-A7 CPU.
45 which is enabled by support of LPC and eSPI peripherals.
60 bool "Enable built-in AST2x00 Super I/O hardware"
63 The Aspeed AST2400 and AST2500 include a built-in Super I/O
67 the host read access to the BMC's entire address space.
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | ast2500.dtsi | 3 * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
9 compatible = "aspeed,ast2500";
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&vic>;
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm1176jzf-s";
54 compatible = "simple-bus";
55 #address-cells = <1>;
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| H A D | ast2600.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
3 #include <dt-bindings/gpio/aspeed-gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&gic>;
46 #address-cells = <1>;
47 #size-cells = <0>;
48 enable-method = "aspeed,ast2600-smp";
51 compatible = "arm,cortex-a7";
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| /openbmc/linux/drivers/soc/aspeed/ |
| H A D | aspeed-lpc-ctrl.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/aspeed-lpc-ctrl.h>
19 #define DEVICE_NAME "aspeed-lpc-ctrl"
45 return container_of(file->private_data, struct aspeed_lpc_ctrl, in file_aspeed_lpc_ctrl()
52 unsigned long vsize = vma->vm_end - vma->vm_start; in aspeed_lpc_ctrl_mmap()
53 pgprot_t prot = vma->vm_page_prot; in aspeed_lpc_ctrl_mmap()
55 if (vma->vm_pgoff + vma_pages(vma) > lpc_ctrl->mem_size >> PAGE_SHIFT) in aspeed_lpc_ctrl_mmap()
56 return -EINVAL; in aspeed_lpc_ctrl_mmap()
61 if (remap_pfn_range(vma, vma->vm_start, in aspeed_lpc_ctrl_mmap()
62 (lpc_ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff, in aspeed_lpc_ctrl_mmap()
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| H A D | aspeed-lpc-snoop.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Provides a simple driver to control the ASPEED LPC snoop interface which
7 * the host to an arbitrary LPC I/O port.
9 * Typically used by the BMC to "watch" host boot progress via port
26 #define DEVICE_NAME "aspeed-lpc-snoop"
54 /* The ast2400 has bits 14 and 15 as reserved, whereas the ast2500
75 return container_of(file->private_data, in snoop_file_to_chan()
87 if (kfifo_is_empty(&chan->fifo)) { in snoop_file_read()
88 if (file->f_flags & O_NONBLOCK) in snoop_file_read()
89 return -EAGAIN; in snoop_file_read()
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| /openbmc/linux/Documentation/devicetree/bindings/soc/aspeed/ |
| H A D | uart-routing.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 ---
6 $id: http://devicetree.org/schemas/soc/aspeed/uart-routing.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Oskar Senft <osk@google.com>
13 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
17 the built-in UARTS and physical serial I/O ports.
20 This can be used to enable Host <-> BMC communication via UARTs, e.g. to
21 allow access to the Host's serial console.
30 - enum:
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| /openbmc/libmctp/docs/bindings/ |
| H A D | vendor-ibm-astlpc.md | 1 # Management Component Transport Protocol (MCTP) LPC Transport Binding Specification for ASPEED BMC…
6 host and BMC over the LPC bus on ASPEED BMC platforms.
17 2. Intel (R) Low Pin Count (LPC) Interface Specification 1.1,
18 …<https://www.intel.com/content/dam/www/program/design/us/en/documents/low-pin-count-interface-spec…
29 MCTP-compliant endpoints must accept.
33 A hardware-defined flag bit in a KCS device's Status Register (STR). The IBF
34 flag indicates that a value has been written by the host to the corresponding
40 byte buffer which is written by the host and read by the BMC.
42 ### KCS: Keyboard-Controller-Style
48 systems. This interface is available built-in to several commercially available
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| /openbmc/qemu/include/hw/misc/ |
| H A D | aspeed_scu.h | 9 * the COPYING file in the top-level directory.
19 #define TYPE_ASPEED_2400_SCU TYPE_ASPEED_SCU "-ast2400"
20 #define TYPE_ASPEED_2500_SCU TYPE_ASPEED_SCU "-ast2500"
21 #define TYPE_ASPEED_2600_SCU TYPE_ASPEED_SCU "-ast2600"
22 #define TYPE_ASPEED_2700_SCU TYPE_ASPEED_SCU "-ast2700"
23 #define TYPE_ASPEED_2700_SCUIO TYPE_ASPEED_SCU "io" "-ast2700"
24 #define TYPE_ASPEED_1030_SCU TYPE_ASPEED_SCU "-ast1030"
84 * arch/arm/mach-aspeed/include/mach/regs-scu.h
86 * Copyright (C) 2012-2020 ASPEED Technology Inc.
104 * 22:20 LPC Host LHCLK divider selection
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| /openbmc/linux/drivers/char/ipmi/ |
| H A D | kcs_bmc_aspeed.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2018, Intel Corporation.
6 #define pr_fmt(fmt) "aspeed-kcs-bmc: " fmt
27 #define DEVICE_NAME "ast-kcs-bmc"
34 * LPCyE Enable LPC channel y
35 * IBFIEy Input Buffer Full IRQ Enable for LPC channel y
36 * IRQxEy Assert SerIRQ x for LPC channel y (Deprecated, use IDyIRQX, IRQXEy)
37 * IDyIRQX Use the specified 4-bit SerIRQ for LPC channel y
38 * SELyIRQX SerIRQ polarity for LPC channel y (low: 0, high: 1)
39 * IRQXEy Assert the SerIRQ specified in IDyIRQX for LPC channel y
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| /openbmc/linux/arch/arm/boot/dts/aspeed/ |
| H A D | aspeed-bmc-amd-ethanolx.dts | 1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
18 reserved-memory {
19 #address-cells = <1>;
20 #size-cells = <1>;
26 compatible = "shared-dma-pool";
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| H A D | aspeed-bmc-amd-daytonax.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "amd,daytonax-bmc", "aspeed,ast2500";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
24 compatible = "shared-dma-pool";
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| H A D | aspeed-bmc-facebook-tiogapass.dts | 1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
39 stdout-path = &uart5;
47 iio-hwmon {
48 compatible = "iio-hwmon";
49 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
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| /openbmc/linux/drivers/clk/ |
| H A D | clk-aspeed.c | 1 // SPDX-License-Identifier: GPL-2.0+
4 #define pr_fmt(fmt) "clk-aspeed: " fmt
13 #include <dt-bindings/clock/aspeed-clock.h>
15 #include "clk-aspeed.h"
49 [ASPEED_CLK_GATE_ECLK] = { 0, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
50 [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
51 [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
52 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */
53 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", CLK_IS_CRITICAL }, /* PCIe/PCI */
54 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */
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| /openbmc/linux/drivers/tty/serial/8250/ |
| H A D | 8250_aspeed_vuart.c | 1 // SPDX-License-Identifier: GPL-2.0+
53 * controller) and one is on the host CPU side.
55 * It allows the BMC to provide to the host a "UART" that pipes into
61 * at what IO port and interrupt number the host side will appear
62 * to the host on the Host <-> BMC LPC bus. It could be different on a
68 return readb(vuart->port->port.membase + reg); in aspeed_vuart_readb()
73 writeb(val, vuart->port->port.membase + reg); in aspeed_vuart_writeb()
91 return -EINVAL; in aspeed_vuart_set_lpc_address()
135 return -EINVAL; in aspeed_vuart_set_sirq()
251 struct aspeed_vuart *vuart = uart_8250_port->port.private_data; in aspeed_vuart_startup()
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| /openbmc/hiomapd/Documentation/ |
| H A D | protocol.md | 7 http://www.apache.org/licenses/LICENSE-2.0
17 mediation between the host and the Baseboard Management Controller (BMC).
20 BMC to the host. Usually, the flash device of interest is the host's firmware
21 flash device - in some platform designs this is owned by the BMC to enable
22 lights-out updates of the host firmware.
24 As the flash is owned by the BMC, access by the host to its firmware must be
28 2. Conflict of access between the host and the BMC to the flash controller
33 flash data in the LPC firmware space, communicated via functions in the LPC IO
40 written to the flash by the host firmware.
42 The definition of transport-specific parameters, for example selection of IPMI
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| /openbmc/u-boot/drivers/i2c/ |
| H A D | Kconfig | 23 Enable old-style I2C functions for compatibility with existing code.
35 I2C or LPC). Some Chromebooks use this when the hardware design
41 ---help---
43 often dealt with by using an I2C pass-through interface provided by
44 the EC. On some unfortunate models (e.g. Spring) the pass-through
71 configuration is given by the device tree. Kernel-style device tree
73 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
82 i2c-gpio driver unless your system can cope with this limitation.
83 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
96 Say yes here to select Cadence I2C Host Controller. This controller is
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| /openbmc/linux/drivers/pinctrl/aspeed/ |
| H A D | pinctrl-aspeed-g5.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include "../pinctrl-utils.h"
22 #include "pinctrl-aspeed.h"
32 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
35 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
37 * reset control and MAC clock configuration registers. The AST2500 goes a step
45 #define SCU80 0x80 /* Multi-function Pin Control #1 */
46 #define SCU84 0x84 /* Multi-function Pin Control #2 */
47 #define SCU88 0x88 /* Multi-function Pin Control #3 */
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| /openbmc/qemu/hw/gpio/ |
| H A D | aspeed_gpio.c | 4 * Copyright (C) 2017-2019 IBM Corp.
6 * SPDX-License-Identifier: GPL-2.0-or-later
10 #include "qemu/host-utils.h"
36 * -----------------------------
37 * | 0 | 0 | 0 | falling-edge
38 * | 0 | 0 | 1 | rising-edge
39 * | 0 | 1 | 0 | level-low
40 * | 0 | 1 | 1 | level-high
41 * | 1 | X | X | dual-edge
168 /* AST2600 only - 1.8V gpios */
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| /openbmc/linux/drivers/hwmon/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
20 sensors-detect script from the lm_sensors package. Read
21 <file:Documentation/hwmon/userspace-tools.rst> for details.
76 with SMpro co-processor.
290 will be called as370-hwmon.
313 will be called axi-fan-control
322 lm-sensors 2.10.1 for proper userspace support.
361 Only Intel-based Apple's computers are supported (MacBook Pro,
368 the laptop to act as a pinball machine-esque joystick.
383 will be called scmi-hwmon.
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| /openbmc/linux/ |
| H A D | MAINTAINERS | 5 ----------
[all...] |
| H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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| /openbmc/ |
| D | opengrok1.0.log | 1 2025-01-07 03:00:34.968-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-01-07 03:00:35.081-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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| D | opengrok2.0.log | 1 2025-01-06 03:00:36.640-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-01-06 03:00:36.753-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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