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/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
7 compatible = "aspeed,ast2500";
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
[all …]
H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
[all …]
H A Daspeed-bmc-facebook-wedge400.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include "ast2500-facebook-netbmc-common.dtsi"
10 compatible = "facebook,wedge400-bmc", "aspeed,ast2500";
14 * PCA9548 (2-0070) provides 8 channels connecting to
27 * PCA9548 (8-0070) provides 8 channels connecting to
40 * PCA9548 (11-0076) provides 8 channels connecting to
56 stdout-path = &uart1;
60 ast-adc-hwmon {
[all …]
H A Daspeed-bmc-facebook-yosemitev2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/i2c/i2c.h>
9 compatible = "facebook,yosemitev2-bmc", "aspeed,ast2500";
14 stdout-path = &uart5;
21 iio-hwmon {
23 compatible = "iio-hwmon";
24 io-channels = <&adc 0> , <&adc 1> , <&adc 2> , <&adc 3> ,
35 m25p,fast-read;
[all …]
H A Daspeed-bmc-vegman-sx20.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-bmc-vegman.dtsi"
9 compatible = "yadro,vegman-sx20-bmc", "aspeed,ast2500";
14 gpio-line-names =
15 …/*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","…
16 /*B0-B7*/ "","","","","","","","",
17 /*C0-C7*/ "","","","","","","","",
18 /*D0-D7*/ "","","","","","","","",
19 /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","","","",
[all …]
H A Daspeed-bmc-vegman-n110.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-bmc-vegman.dtsi"
9 compatible = "yadro,vegman-n110-bmc", "aspeed,ast2500";
14 gpio-line-names =
15 …/*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","…
16 /*B0-B7*/ "","","","","","","","",
17 /*C0-C7*/ "","","","","","","","",
18 /*D0-D7*/ "","","","","","","","",
19 /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","","","",
[all …]
H A Daspeed-bmc-facebook-minipack.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2500-facebook-netbmc-common.dtsi"
9 compatible = "facebook,minipack-bmc", "aspeed,ast2500";
23 * i2c switch 2-0070, pca9548, 8 child channels assigned
24 * with bus number 16-23.
36 * i2c switch 8-0070, pca9548, 8 child channels assigned
37 * with bus number 24-31.
49 * i2c switch 9-0070, pca9548, 8 child channels assigned
50 * with bus number 32-39.
[all …]
H A Daspeed-bmc-facebook-cmm.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2500-facebook-netbmc-common.dtsi"
9 compatible = "facebook,cmm-bmc", "aspeed,ast2500";
22 * PCA9548 (1-0077) provides 8 channels for connecting to
35 * PCA9548 (2-0071) provides 8 channels for connecting to
48 * PCA9548 (8-0077) provides 8 channels and the first 4
61 * 2 PCA9548 (18-0070 & 18-0073), 16 channels connecting
82 * 2 PCA9548 (19-0070 & 19-0073), 16 channels connecting
103 * 2 PCA9548 (20-0070 & 20-0073), 16 channels connecting
[all …]
H A Daspeed-bmc-vegman-rx20.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-bmc-vegman.dtsi"
9 compatible = "yadro,vegman-rx20-bmc", "aspeed,ast2500";
12 compatible = "gpio-leds";
16 default-state = "off";
22 default-state = "off";
28 default-state = "off";
34 default-state = "off";
42 gpio-line-names =
[all …]
H A Daspeed-bmc-facebook-tiogapass.dts1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
18 * Hardcode the bus number of i2c switches' channels to
39 stdout-path = &uart5;
47 iio-hwmon {
48 compatible = "iio-hwmon";
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/openbmc/u-boot/arch/arm/dts/
H A Dast2500.dtsi3 * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
9 compatible = "aspeed,ast2500";
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&vic>;
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm1176jzf-s";
54 compatible = "simple-bus";
55 #address-cells = <1>;
[all …]
/openbmc/qemu/tests/functional/
H A Dtest_arm_aspeed_ast2500.py5 # SPDX-License-Identifier: GPL-2.0-or-later
15 ('https://github.com/legoater/qemu-aspeed-boot/raw/master/'
16 'images/ast2500-evb/buildroot-2023.11/flash.img'),
20 self.set_machine('ast2500-evb')
24 self.vm.add_args('-device',
25 'tmp105,bus=aspeed.i2c.bus.3,address=0x4d,id=tmp-test');
27 'ast2500-evb login:')
30 'echo lm75 0x4d > /sys/class/i2c-dev/i2c-3/device/new_device',
31 'i2c i2c-3: new_device: Instantiated device lm75 at 0x4d');
34 self.vm.cmd('qom-set', path='/machine/peripheral/tmp-test',
[all …]
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Daspeed,i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs
10 - Rayn Chen <rayn_chen@aspeedtech.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - aspeed,ast2400-i2c-bus
19 - aspeed,ast2500-i2c-bus
20 - aspeed,ast2600-i2c-bus
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/openbmc/qemu/docs/system/arm/
H A Daspeed.rst1 …ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, `…
6 Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
7 AST2500 with an ARM1176JZS CPU (800MHz), the AST2600
8 with dual cores ARM Cortex-A7 CPUs (1.2GHz) and more recently the AST2700
9 with quad cores ARM Cortex-A35 64 bits CPUs (1.6GHz)
11 The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
16 - ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC
17 - ``quanta-q71l-bmc`` OpenBMC Quanta BMC
18 - ``supermicrox11-bmc`` Supermicro X11 BMC (ARM926EJ-S)
19 - ``supermicrox11spi-bmc`` Supermicro X11 SPI BMC (ARM1176)
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/openbmc/linux/drivers/char/ipmi/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate 'IPMI top-level message handler'
17 See <file:Documentation/driver-api/ipmi.rst> for more details on the driver.
72 depends on I2C
75 have a driver that must be accessed over an I2C bus instead of a
76 standard interface. This module requires I2C support.
80 depends on I2C && I2C_SLAVE
82 Provides a driver for a system running right on the IPMB bus.
84 bus, and it also supports direct messaging on the bus using
85 IPMB direct messages. This module requires I2C support.
[all …]
/openbmc/qemu/hw/arm/
H A Daspeed.c9 * the COPYING file in the top-level directory.
19 #include "hw/i2c/i2c_mux_pca954x.h"
20 #include "hw/i2c/smbus_eeprom.h"
25 #include "hw/qdev-properties.h"
26 #include "sysemu/block-backend.h"
29 #include "qemu/error-report.h"
31 #include "hw/qdev-clock.h"
35 .board_id = -1, /* device-tree-only board */
52 /* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
97 /* AST2500 evb hardware value: 0xF100C2E6 */
[all …]
/openbmc/linux/drivers/net/mdio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate "MDIO bus device drivers"
20 loadable module or built-in.
27 FWNODE MDIO bus (Ethernet PHY) accessors
35 OpenFirmware MDIO bus (Ethernet PHY) accessors
42 ACPI MDIO bus (Ethernet PHY) accessors
58 tristate "APM X-Gene SoC MDIO bus controller"
62 APM X-Gene SoC's.
65 tristate "ASPEED MDIO bus controller"
70 This module provides a driver for the independent MDIO bus
[all …]
/openbmc/linux/drivers/fsi/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 FSI - the FRU Support Interface - is a simple bus for low-level
12 access to POWER-based hardware.
29 symlinks in /dev/fsi/by-path when this option is enabled.
32 tristate "GPIO-based FSI master"
52 This option enables a FSI master using the AST2400 and AST2500 GPIO
66 tristate "IBM I2C Responder virtual FSI master"
67 depends on I2C
70 behind an IBM I2C Responder (I2CR) chip. The I2CR is an I2C device
71 that translates I2C commands to CFAM or SCOM operations, effectively
[all …]
/openbmc/linux/drivers/irqchip/
H A Dirq-aspeed-i2c-ic.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Aspeed 24XX/25XX I2C Interrupt Controller.
5 * Copyright (C) 2012-2017 ASPEED Technology Inc.
28 * The aspeed chip provides a single hardware interrupt for all of the I2C
30 * into multiple interrupts, each associated with a single I2C bus.
39 status = readl(i2c_ic->base); in aspeed_i2c_ic_irq_handler()
41 generic_handle_domain_irq(i2c_ic->irq_domain, bit); in aspeed_i2c_ic_irq_handler()
54 irq_set_chip_data(irq, domain->host_data); in aspeed_i2c_ic_map_irq_domain()
71 return -ENOMEM; in aspeed_i2c_ic_of_init()
73 i2c_ic->base = of_iomap(node, 0); in aspeed_i2c_ic_of_init()
[all …]
/openbmc/openbmc/meta-ampere/meta-jade/recipes-ampere/platform/ampere-utils/
H A Dampere_firmware_upgrade.sh5 FRU_DEVICE="/sys/bus/i2c/devices/3-0050/eeprom"
7 if ! command -v ampere_fru_upgrade;
12 ampere_fru_upgrade -d $FRU_DEVICE -f "$IMAGE"
21 if ! command -v ampere_eeprom_prog;
28 chassisstate=$(obmcutil chassisstate | awk -F. '{print $NF}')
37 while [ "$cnt" -gt 0 ];
39 cnt=$((cnt - 1))
42 chassisstate_off=$(obmcutil chassisstate | awk -F. '{print $NF}')
50 echo "--- Error : Failed turning the Chassis off"
57 gpioset $(gpiofind host0-special-boot)=1
[all …]
/openbmc/u-boot/drivers/i2c/
H A DKconfig2 # I2C subsystem configuration
5 menu "I2C support"
8 bool "Enable Driver Model for I2C drivers"
11 Enable driver model for I2C. The I2C uclass interface: probe, read,
12 write and speed, is implemented with the bus drivers operations,
13 which provide methods for bus setting and data transfer. Each chip
14 device (bus child) info is kept as parent platdata. The interface
15 is defined in include/i2c.h. When i2c bus driver supports the i2c
20 bool "Enable I2C compatibility layer"
23 Enable old-style I2C functions for compatibility with existing code.
[all …]
H A Dast_i2c.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2012-2020 ASPEED Technology Inc.
13 #include <i2c.h>
32 /* I2C speed in Hz */
50 scl_low = (divider_ratio >> 1) - 1; in get_clk_reg_val()
51 scl_high = divider_ratio - scl_low - 2; in get_clk_reg_val()
64 writel(~0, &priv->regs->isr); in ast_i2c_clear_interrupts()
72 writel(0, &priv->regs->fcr); in ast_i2c_init_bus()
73 /* Enable Master Mode. Assuming single-master */ in ast_i2c_init_bus()
77 &priv->regs->fcr); in ast_i2c_init_bus()
[all …]
/openbmc/qemu/include/hw/i2c/
H A Daspeed_i2c.h2 * ASPEED AST2400 I2C Controller
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
24 #include "hw/i2c/i2c.h"
29 #define TYPE_ASPEED_I2C "aspeed.i2c"
30 #define TYPE_ASPEED_2400_I2C TYPE_ASPEED_I2C "-ast2400"
31 #define TYPE_ASPEED_2500_I2C TYPE_ASPEED_I2C "-ast2500"
32 #define TYPE_ASPEED_2600_I2C TYPE_ASPEED_I2C "-ast2600"
33 #define TYPE_ASPEED_1030_I2C TYPE_ASPEED_I2C "-ast1030"
34 #define TYPE_ASPEED_2700_I2C TYPE_ASPEED_I2C "-ast2700"
68 /* I2C Global Register */
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/openbmc/linux/drivers/i2c/busses/
H A Di2c-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Aspeed 24XX/25XX I2C Controller.
5 * Copyright (C) 2012-2017 ASPEED Technology Inc.
14 #include <linux/i2c.h>
28 /* I2C Register */
39 /* 0x00 : I2C Interrupt Status Register */
40 /* 0x08 : I2C Interrupt Target Assignment */
163 /* Multi-master */
171 static int aspeed_i2c_reset(struct aspeed_i2c_bus *bus);
173 /* precondition: bus.lock has been acquired. */
[all …]
/openbmc/qemu/hw/i2c/
H A Daspeed_i2c.c2 * ARM Aspeed I2C controller
27 #include "qemu/error-report.h"
29 #include "hw/i2c/aspeed_i2c.h"
31 #include "hw/qdev-properties.h"
38 static inline void aspeed_i2c_bus_raise_interrupt(AspeedI2CBus *bus) in aspeed_i2c_bus_raise_interrupt() argument
40 AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(bus->controller); in aspeed_i2c_bus_raise_interrupt()
41 uint32_t reg_intr_sts = aspeed_i2c_bus_intr_sts_offset(bus); in aspeed_i2c_bus_raise_interrupt()
42 uint32_t intr_ctrl_reg = aspeed_i2c_bus_intr_ctrl_offset(bus); in aspeed_i2c_bus_raise_interrupt()
43 uint32_t intr_ctrl_mask = bus->regs[intr_ctrl_reg] | in aspeed_i2c_bus_raise_interrupt()
49 aspeed_i2c_bus_pkt_mode_en(bus) && in aspeed_i2c_bus_raise_interrupt()
[all …]

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