| /openbmc/qemu/tests/qtest/ |
| H A D | ahci-test.c | 2 * AHCI test cases
30 #include "libqos/ahci.h"
52 static void ahci_test_port_spec(AHCIQState *ahci, uint8_t port);
53 static void ahci_test_pci_spec(AHCIQState *ahci);
54 static void ahci_test_pci_caps(AHCIQState *ahci, uint16_t header,
56 static void ahci_test_satacap(AHCIQState *ahci, uint8_t offset);
57 static void ahci_test_msicap(AHCIQState *ahci, uint8_t offset);
58 static void ahci_test_pmcap(AHCIQState *ahci, uint8_t offset);
81 static void verify_state(AHCIQState *ahci, uint64_t hba_old) in verify_state() argument
88 ahci_fingerprint = qpci_config_readl(ahci->dev, PCI_VENDOR_ID); in verify_state()
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| /openbmc/qemu/tests/qtest/libqos/ |
| H A D | ahci.c | 2 * libqos AHCI functions
28 #include "ahci.h"
104 uint64_t ahci_alloc(AHCIQState *ahci, size_t bytes) in ahci_alloc() argument
106 g_assert(ahci); in ahci_alloc()
107 g_assert(ahci->parent); in ahci_alloc()
108 return qmalloc(ahci->parent, bytes); in ahci_alloc()
111 void ahci_free(AHCIQState *ahci, uint64_t addr) in ahci_free() argument
113 g_assert(ahci); in ahci_free()
114 g_assert(ahci->parent); in ahci_free()
115 qfree(ahci->parent, addr); in ahci_free()
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| H A D | ahci.h | 5 * AHCI qtest library functions and definitions
40 /*** Recognized AHCI Device Types ***/
44 /*** AHCI/HBA Register Offsets and Bitmasks ***/
308 /* AHCI Command Header Flags & Masks*/
475 /* Opaque, defined within ahci.c */
505 /* Helpers for reading/writing AHCI HBA register values */
507 static inline uint32_t ahci_mread(AHCIQState *ahci, size_t offset) in ahci_mread() argument
509 return qpci_io_readl(ahci->dev, ahci->hba_bar, offset); in ahci_mread()
512 static inline void ahci_mwrite(AHCIQState *ahci, size_t offset, uint32_t value) in ahci_mwrite() argument
514 qpci_io_writel(ahci->dev, ahci->hba_bar, offset, value); in ahci_mwrite()
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| /openbmc/linux/Documentation/devicetree/bindings/ata/ |
| H A D | ahci-platform.yaml | 4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
7 title: AHCI SATA Controller
26 - brcm,iproc-ahci
27 - cavium,octeon-7130-ahci
28 - hisilicon,hisi-ahci
29 - ibm,476gtr-ahci
30 - marvell,armada-3700-ahci
31 - marvell,armada-8k-ahci
32 - marvell,berlin2q-ahci
33 - socionext,uniphier-pro4-ahci
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| H A D | brcm,sata-brcm.yaml | 7 title: Broadcom SATA3 AHCI Controller
17 - $ref: ahci-common.yaml#
24 - brcm,bcm7216-ahci
25 - brcm,bcm7445-ahci
26 - brcm,bcm7425-ahci
27 - brcm,bcm63138-ahci
28 - const: brcm,sata3-ahci
30 - const: brcm,bcm-nsp-ahci
37 - const: ahci
48 - brcm,bcm7216-ahci
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| H A D | ahci-common.yaml | 4 $id: http://devicetree.org/schemas/ata/ahci-common.yaml#
7 title: Common Properties for Serial ATA AHCI controllers
14 This document defines device tree properties for a common AHCI SATA
19 defines a set of common properties for the AHCI-compatible devices.
29 Generic AHCI registers space conforming to the Serial ATA AHCI
35 const: ahci
39 Generic AHCI state change interrupt. Can be implemented either as a
45 ahci-supply:
46 description: Power regulator for AHCI controller
77 $ref: '#/$defs/ahci-port'
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| H A D | snps,dwc-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml#
7 title: Synopsys DWC AHCI SATA controller
14 implementation of the AHCI SATA controller.
20 - snps,dwc-ahci
21 - snps,spear-ahci
26 - $ref: snps,dwc-ahci-common.yaml#
31 - description: Synopsys AHCI SATA-compatible devices
32 const: snps,dwc-ahci
33 - description: SPEAr1340 AHCI SATA device
34 const: snps,spear-ahci
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| H A D | rockchip,dwc-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
7 title: Synopsys DWC AHCI SATA controller for Rockchip devices
14 implementation of the AHCI SATA controller found in Rockchip
22 - rockchip,rk3568-dwc-ahci
23 - rockchip,rk3588-dwc-ahci
31 - rockchip,rk3568-dwc-ahci
32 - rockchip,rk3588-dwc-ahci
33 - const: snps,dwc-ahci
39 $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
59 - $ref: snps,dwc-ahci-common.yaml#
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| H A D | allwinner,sun8i-r40-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/allwinner,sun8i-r40-ahci.yaml#
7 title: Allwinner R40 AHCI SATA Controller
15 const: allwinner,sun8i-r40-ahci
22 - description: AHCI Bus Clock
23 - description: AHCI Module Clock
32 const: ahci
34 ahci-supply:
35 description: Regulator for the AHCI controller
56 ahci: sata@1c18000 {
57 compatible = "allwinner,sun8i-r40-ahci";
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| H A D | nvidia,tegra-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/nvidia,tegra-ahci.yaml#
7 title: Tegra AHCI SATA Controller
16 - nvidia,tegra124-ahci
17 - nvidia,tegra132-ahci
18 - nvidia,tegra210-ahci
19 - nvidia,tegra186-ahci
24 - description: AHCI registers
102 - nvidia,tegra124-ahci
103 - nvidia,tegra132-ahci
124 - nvidia,tegra210-ahci
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| H A D | snps,dwc-ahci-common.yaml | 4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci-common.yaml#
7 title: Synopsys DWC AHCI SATA controller properties
14 AHCI controller properties.
19 - $ref: ahci-common.yaml#
30 Basic DWC AHCI SATA clock sources like application AXI/AHB BIU clock,
61 normally supported by the DWC AHCI SATA controller.
83 $ref: '#/$defs/dwc-ahci-port'
88 dwc-ahci-port:
89 $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
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| H A D | allwinner,sun4i-a10-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/allwinner,sun4i-a10-ahci.yaml#
7 title: Allwinner A10 AHCI SATA Controller
15 const: allwinner,sun4i-a10-ahci
22 - description: AHCI Bus Clock
23 - description: AHCI Module Clock
41 ahci: sata@1c18000 {
42 compatible = "allwinner,sun4i-a10-ahci";
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| H A D | baikal,bt1-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#
7 title: Baikal-T1 SoC AHCI SATA controller
13 AHCI SATA controller embedded into the Baikal-T1 SoC is based on the
14 DWC AHCI SATA v4.10a IP-core.
17 - $ref: snps,dwc-ahci-common.yaml#
21 const: baikal,bt1-ahci
50 $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
86 compatible = "baikal,bt1-ahci";
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| H A D | ahci-mtk.txt | 4 - compatible : Must be "mediatek,<chip>-ahci", "mediatek,mtk-ahci".
5 When using "mediatek,mtk-ahci" compatible strings, you
7 - "mediatek,mt7622-ahci"
16 - ports-implemented : See ./ahci-platform.txt for details.
31 compatible = "mediatek,mt7622-ahci",
32 "mediatek,mtk-ahci";
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| /openbmc/qemu/hw/ide/ |
| H A D | trace-events | 65 # ahci.c
66 ahci_port_read(void *s, int port, const char *reg, int offset, uint32_t ret) "ahci(%p)[%d]: port re…
67 ahci_port_read_default(void *s, int port, const char *reg, int offset) "ahci(%p)[%d]: unimplemented…
68 ahci_irq_raise(void *s) "ahci(%p): raise irq"
69 ahci_irq_lower(void *s) "ahci(%p): lower irq"
70 ahci_check_irq(void *s, uint32_t old, uint32_t new) "ahci(%p): check irq 0x%08x --> 0x%08x"
71 …har *name, uint32_t val, uint32_t old, uint32_t new, uint32_t effective) "ahci(%p)[%d]: trigger ir…
72 ahci_port_write(void *s, int port, const char *reg, int offset, uint32_t val) "ahci(%p)[%d]: port w…
73 ahci_port_write_unimpl(void *s, int port, const char *reg, int offset, uint32_t val) "ahci(%p)[%d]:…
74 ahci_mem_read_32(void *s, uint64_t addr, uint32_t val) "ahci(%p): mem read @ 0x%"PRIx64": 0x%08x"
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| H A D | ich.c | 23 …poration 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA AHCI Controller [8086:2922] (rev 02) (prog-if 01 …
24 …* Subsystem: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA AHCI Controller [80…
42 * Kernel driver in use: ahci
43 * Kernel modules: ahci
72 #include "hw/ide/ahci-pci.h"
73 #include "ahci-internal.h"
89 VMSTATE_AHCI(ahci, AHCIPCIState),
98 ahci_reset(&d->ahci); in pci_ich9_reset()
105 ahci_init(&d->ahci, DEVICE(obj)); in pci_ich9_ahci_init()
116 d->ahci.ports = 6; in pci_ich9_ahci_realize()
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| /openbmc/linux/Documentation/devicetree/bindings/soc/socionext/ |
| H A D | socionext,uniphier-ahci-glue.yaml | 4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml#
7 title: Socionext UniPhier SoC AHCI glue layer
13 AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband
14 logic handling signals to AHCI host controller inside AHCI component.
20 - socionext,uniphier-pro4-ahci-glue
21 - socionext,uniphier-pxs2-ahci-glue
22 - socionext,uniphier-pxs3-ahci-glue
41 $ref: /schemas/phy/socionext,uniphier-ahci-phy.yaml#
52 compatible = "socionext,uniphier-pxs3-ahci-glue", "simple-mfd";
59 compatible = "socionext,uniphier-pxs3-ahci-reset";
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| /openbmc/u-boot/drivers/ata/ |
| H A D | Kconfig | 1 config AHCI config
6 types can use this, such as AHCI/SATA. It does not provide any standard
38 bool "Support for PCI-based AHCI controller"
41 Enables support for the PCI-based AHCI controller.
45 depends on AHCI
50 AHCI 1.3 specifications with hot-plug detect feature.
54 bool "Enable Synopsys DWC AHCI driver support"
60 Synopsys DWC AHCI module.
103 bool "Marvell EBU AHCI SATA support"
105 depends on AHCI
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| /openbmc/linux/Documentation/devicetree/bindings/phy/ |
| H A D | socionext,uniphier-ahci-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml#
7 title: Socionext UniPhier AHCI PHY
11 AHCI controller implemented on Socionext UniPhier SoCs.
19 - socionext,uniphier-pro4-ahci-phy
20 - socionext,uniphier-pxs2-ahci-phy
21 - socionext,uniphier-pxs3-ahci-phy
46 const: socionext,uniphier-pro4-ahci-phy
71 const: socionext,uniphier-pxs2-ahci-phy
89 const: socionext,uniphier-pxs3-ahci-phy
121 compatible = "socionext,uniphier-pxs3-ahci-phy";
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| /openbmc/linux/drivers/ata/ |
| H A D | ahci_platform.c | 3 * AHCI SATA platform driver
21 #include "ahci.h"
23 #define DRV_NAME "ahci"
59 if (device_is_compatible(dev, "hisilicon,hisi-ahci")) in ahci_probe()
81 { .compatible = "generic-ahci", },
83 { .compatible = "ibm,476gtr-ahci", },
84 { .compatible = "hisilicon,hisi-ahci", },
85 { .compatible = "cavium,octeon-7130-ahci", },
110 MODULE_DESCRIPTION("AHCI SATA platform driver");
113 MODULE_ALIAS("platform:ahci");
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| H A D | ahci.c | 3 * ahci.c - AHCI SATA support
14 * AHCI hardware documentation:
32 #include <linux/ahci-remap.h>
34 #include "ahci.h"
36 #define DRV_NAME "ahci"
106 AHCI_SHT("ahci"),
298 { PCI_VDEVICE(INTEL, 0x3b22), board_ahci }, /* PCH AHCI */
299 { PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */
302 { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_low_power }, /* PCH M AHCI */
305 { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
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| H A D | Kconfig | 110 tristate "AHCI SATA support"
114 This option enables support for AHCI Serial ATA.
140 tristate "Platform AHCI SATA support"
143 This option enables support for Platform AHCI Serial ATA
149 tristate "Broadcom AHCI SATA support"
154 This option enables support for the AHCI SATA3 controller found on
160 tristate "DaVinci DA850 AHCI SATA support"
165 onboard AHCI SATA.
170 tristate "DaVinci DM816 AHCI SATA support"
175 onboard AHCI SATA controller.
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| /openbmc/qemu/include/hw/ide/ |
| H A D | ahci-sysbus.h | 2 * QEMU AHCI Emulation (MMIO-mapped devices)
11 #include "hw/ide/ahci.h"
13 #define TYPE_SYSBUS_AHCI "sysbus-ahci"
19 AHCIState ahci; member
22 #define TYPE_ALLWINNER_AHCI "allwinner-ahci"
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| /openbmc/u-boot/arch/x86/cpu/ivybridge/ |
| H A D | sata.c | 8 #include <ahci.h>
55 if (!mode || !strcmp(mode, "ahci")) { in bd82x6x_sata_init()
58 debug("SATA: Controller in AHCI mode\n"); in bd82x6x_sata_init()
73 /* Initialize AHCI memory-mapped space */ in bd82x6x_sata_init()
101 /* No AHCI: clear AHCI base */ in bd82x6x_sata_init()
103 /* And without AHCI BAR no memory decoding */ in bd82x6x_sata_init()
125 /* No AHCI: clear AHCI base */ in bd82x6x_sata_init()
128 /* And without AHCI BAR no memory decoding */ in bd82x6x_sata_init()
203 if (mode && !strcmp(mode, "ahci")) in bd82x6x_sata_enable()
247 { .compatible = "intel,pantherpoint-ahci" },
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| /openbmc/u-boot/doc/device-tree-bindings/ata/ |
| H A D | intel-sata.txt | 8 - compatible = "intel,pantherpoint-ahci"
10 "ahci" : Use AHCI mode (default)
22 compatible = "intel,pantherpoint-ahci";
23 intel,sata-mode = "ahci";
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