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/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dnvidia,tegra20-hsuart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/nvidia,tegra20-hsuart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-hsuart
18 - nvidia,tegra30-hsuart
19 - nvidia,tegra186-hsuart
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/openbmc/linux/drivers/tty/serial/
H A Dserial-tegra.c1 // SPDX-License-Identifier: GPL-2.0
5 * High-speed serial driver for NVIDIA Tegra SoCs
7 * Copyright (c) 2012-2019, NVIDIA CORPORATION. All rights reserved.
16 #include <linux/dma-mapping.h>
159 return readl(tup->uport.membase + (reg << tup->uport.regshift)); in tegra_uart_read()
165 writel(val, tup->uport.membase + (reg << tup->uport.regshift)); in tegra_uart_write()
178 * RI - Ring detector is active in tegra_uart_get_mctrl()
179 * CD/DCD/CAR - Carrier detect is always active. For some reason in tegra_uart_get_mctrl()
181 * DSR - Data Set ready is active as the hardware doesn't support it. in tegra_uart_get_mctrl()
183 * CTS - Clear to send. Always set to active, as the hardware handles in tegra_uart_get_mctrl()
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H A Dsh-sci.c1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 * Copyright (C) 2002 - 2011 Paul Mundt
9 * based off of the old drivers/char/sh-sci.c by:
26 #include <linux/dma-mapping.h>
58 #include "sh-sci.h"
60 /* Offsets into the sci_port->irqs array */
74 ((port)->irqs[SCIx_ERI_IRQ] == \
75 (port)->irqs[SCIx_RXI_IRQ]) || \
76 ((port)->irqs[SCIx_ERI_IRQ] && \
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/openbmc/u-boot/include/
H A Dserial.h122 SERIAL_CHIP_UNKNOWN = -1,
132 * struct serial_device_info - structure to hold serial device info
140 * @baudrate: baud rate
155 * struct struct dm_serial_ops - Driver model serial operations
162 * setbrg() - Set up the baud rate generator
164 * Adjust baud rate divisors to set up a new baud rate for this
165 * device. Not all devices will support all rates. If the rate
167 * available rate. or return -EINVAL if this is not possible.
170 * @baudrate: New baud rate to use
171 * @return 0 if OK, -ve on error
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/openbmc/linux/drivers/usb/serial/
H A Ddigi_acceleport.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Digi AccelePort USB-4 and USB-2 Serial Converters
7 * Shamelessly based on Brian Warner's keyspan_pda.c and Greg Kroah-Hartman's
8 * usb-serial driver.
31 #define DRIVER_DESC "Digi AccelePort USB-2/USB-4 Serial Converter driver"
33 /* port output buffer length -- must be <= transfer buffer length - 2 */
37 /* port input buffer length -- must be >= transfer buffer length - 3 */
54 #define DIGI_2_ID 0x0002 /* USB-2 */
55 #define DIGI_4_ID 0x0004 /* USB-4 */
58 * "INB": can be used on the in-band endpoint
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/openbmc/linux/drivers/tty/serial/jsm/
H A Djsm_neo.c1 // SPDX-License-Identifier: GPL-2.0+
25 * a non-destructive, read-only location on the Neo card.
27 * In this case, we are reading the DVID (Read-only Device Identification)
32 readb(bd->re_map_membase + 0x8D); in neo_pci_posting_flush()
38 ier = readb(&ch->ch_neo_uart->ier); in neo_set_cts_flow_control()
39 efr = readb(&ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
41 jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting CTSFLOW\n"); in neo_set_cts_flow_control()
51 writeb(0, &ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
54 writeb(efr, &ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
57 writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), &ch->ch_neo_uart->fctr); in neo_set_cts_flow_control()
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-nexus7-grouper-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/power/summit,smb347-charger.h>
6 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
11 #include "tegra30-asus-lvds-display.dtsi"
27 * pre-existing /chosen node to be available to insert the
33 trusted-foundations {
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H A Dtegra30-asus-transformer-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
8 #include "tegra30-cpu-opp.dtsi"
9 #include "tegra30-cpu-opp-microvolt.dtsi"
12 chassis-type = "convertible";
31 * pre-existing /chosen node to be available to insert the
37 trusted-foundations {
38 compatible = "tlm,trusted-foundations";
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H A Dtegra30-pegatron-chagall.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
11 #include "tegra30-asus-lvds-display.dtsi"
16 chassis-type = "tablet";
35 * pre-existing /chosen node to be available to insert the
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H A Dtegra30-ouya.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
26 stdout-path = "serial0:115200n8";
30 trusted-foundations {
31 compatible = "tlm,trusted-foundations";
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