| /openbmc/linux/Documentation/filesystems/ |
| H A D | qnx6.rst | 56 data and the addressing levels in that specific tree.
60 Level 1 adds an additional indirect addressing level where each indirect
61 addressing block holds up to blocksize / 4 bytes pointers to data blocks.
62 Level 2 adds an additional indirect addressing block level (so, already up
66 indirect addressing blocks or inodes.
97 For more than 16 blocks an indirect addressing in form of another tree is
143 Long filenames are stored in a separate addressing tree. The staring point
165 smaller than addressing space in the bitmap.
183 Bitmap blocks, Inode blocks and indirect addressing blocks for those two
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| /openbmc/linux/arch/m68k/math-emu/ |
| H A D | fp_decode.h | 59 * addressing mode (e.g. pc relative modes as destination), as long
60 * as it only means a new addressing mode, which should not appear
112 | extract the addressing mode
128 | extract the register for the addressing mode
214 | addressing mode: data register direct
220 | addressing mode: address register indirect
244 | addressing mode: address register indirect with postincrement
263 | addressing mode: address register indirect with predecrement
289 | addressing mode: address register/programm counter indirect
331 | all other indirect addressing modes will finally end up here
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| H A D | fp_scan.S | 133 | decode addressing mode for source
141 | addressing mode: data register direct
171 | addressing mode: address register indirect
176 | addressing mode: address register indirect with postincrement
181 | addressing mode: address register indirect with predecrement
186 | addressing mode: address register/programm counter indirect
192 | all other indirect addressing modes will finally end up here
197 | all pc relative addressing modes and immediate/absolute modes end up here
211 | addressing mode: absolute short
216 | addressing mode: absolute long
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| H A D | fp_move.S | 64 | encode addressing mode for dest
72 | addressing mode: data register direct
135 | addressing mode: address register indirect
140 | addressing mode: address register indirect with postincrement
145 | addressing mode: address register indirect with predecrement
150 | addressing mode: address register indirect with 16bit displacement
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| /openbmc/linux/arch/s390/kvm/ |
| H A D | gaccess.h | 56 * rules of the addressing mode defined by bits 31 and 32 of the given PSW
57 * (extendended/basic addressing mode).
59 * Depending on the addressing mode, the upper 40 bits (24 bit addressing
60 * mode), 33 bits (31 bit addressing mode) or no bits (64 bit addressing
79 * applying the rules of the vcpu's addressing mode defined by PSW bits 31
80 * and 32 (extendended/basic addressing mode).
82 * Depending on the vcpu's addressing mode the upper 40 bits (24 bit addressing
83 * mode), 33 bits (31 bit addressing mode) or no bits (64 bit addressing mode)
227 * The addressing mode of the PSW is also inspected, so that address wrap
228 * around is taken into account for 24-, 31- and 64-bit addressing mode,
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| /openbmc/linux/Documentation/scsi/ |
| H A D | aha152x.rst | 126 The BIOS uses a cylinder/head/sector addressing scheme (C/H/S)
128 C/H/S addressing.
131 as base for requests in C/H/S addressing. SCSI only knows about the
135 geometry just to be able to support that addressing scheme. The geometry
141 instead of C/H/S addressing. Unfortunately C/H/S addressing is also used
145 Moreover there are certain limitations to the C/H/S addressing scheme,
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| /openbmc/linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/ |
| H A D | instruction.json | 120 …is event counts architecturally executed operations that uses 'pre-index' as its addressing mode.",
123 …his event counts architecturally executed operations that uses 'pre-index' as its addressing mode."
126 …s event counts architecturally executed operations that uses 'post-index' as its addressing mode.",
129 …is event counts architecturally executed operations that uses 'post-index' as its addressing mode."
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| /openbmc/u-boot/arch/arm/mach-omap2/ |
| H A D | emif-common.c | 568 * Find addressing table index based on the device's type(S2 or S4) and
591 debug("emif: addressing table index %d\n", index); in addressing_table_index()
640 const struct lpddr2_addressing *addressing, in get_sdram_config_reg() argument
653 config_reg |= addressing->row_sz[cs0_device->io_width] << in get_sdram_config_reg()
656 config_reg |= addressing->num_banks << EMIF_REG_IBANK_SHIFT; in get_sdram_config_reg()
661 config_reg |= addressing->col_sz[cs0_device->io_width] << in get_sdram_config_reg()
668 const struct lpddr2_addressing *addressing) in get_sdram_ref_ctrl() argument
676 val = addressing->t_REFI_us_x10 * freq_khz / 10000; in get_sdram_ref_ctrl()
684 const struct lpddr2_addressing *addressing) in get_sdram_tim_1_reg() argument
690 if (addressing->num_banks == BANKS8) in get_sdram_tim_1_reg()
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| /openbmc/linux/Documentation/driver-api/serial/ |
| H A D | serial-rs485.rst | 107 5. Multipoint Addressing
110 The Linux kernel provides addressing mode for multipoint RS-485 serial
111 communications line. The addressing mode is enabled with
117 - ``SER_RS485_ADDRB``: Enabled addressing mode (sets also ADDRB in termios).
130 Note: not all devices supporting RS485 support multipoint addressing.
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| /openbmc/linux/Documentation/arch/x86/x86_64/ |
| H A D | fsgs.rst | 7 memory can use segment register based addressing mode. The following
38 applications. GCC and Clang support GS based addressing via address space
85 more flexible usage of the FS/GS addressing modes in user space
141 Compiler support for FS/GS based addressing
144 GCC version 6 and newer provide support for FS/GS based addressing via
189 FS/GS based addressing with inline assembly
193 be used for FS/GS based addressing mode::
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| /openbmc/linux/arch/m68k/include/asm/ |
| H A D | mcfdma.h | 84 #define MCFDMA_DMR_DSTM 0x00002000L /* Destination addressing mask */
85 #define MCFDMA_DMR_DSTM_SA 0x00000000L /* Destination uses static addressing */
86 #define MCFDMA_DMR_DSTM_IA 0x00002000L /* Destination uses incremental addressing */
96 #define MCFDMA_DMR_SRCM 0x00000020L /* Source addressing mask */
97 #define MCFDMA_DMR_SRCM_SA 0x00000000L /* Source uses static addressing */
98 #define MCFDMA_DMR_SRCM_IA 0x00000020L /* Source uses incremental addressing */
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| /openbmc/qemu/hw/ppc/ |
| H A D | pnv_chiptod.c | 237 if (val & PPC_BIT(35)) { /* SCOM addressing */ in chiptod_power9_tx_ttype_target()
242 qemu_log_mask(LOG_GUEST_ERROR, "pnv_chiptod: SCOM addressing: " in chiptod_power9_tx_ttype_target()
249 } else { /* Core ID addressing */ in chiptod_power9_tx_ttype_target()
260 * work correctly. For this reason only SCOM addressing is implemented. in chiptod_power10_tx_ttype_target()
262 if (val & PPC_BIT(35)) { /* SCOM addressing */ in chiptod_power10_tx_ttype_target()
267 qemu_log_mask(LOG_GUEST_ERROR, "pnv_chiptod: SCOM addressing: " in chiptod_power10_tx_ttype_target()
273 * This may not deal with P10 big-core addressing at the moment. in chiptod_power10_tx_ttype_target()
279 } else { /* Core ID addressing */ in chiptod_power10_tx_ttype_target()
281 "addressing is not implemented for POWER10\n"); in chiptod_power10_tx_ttype_target()
312 * should be used. ChipTOD has a "SCOM addressing" mode which fully in pnv_chiptod_xscom_write()
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| /openbmc/linux/include/uapi/linux/can/ |
| H A D | isotp.h | 78 __u8 ext_address; /* set address for extended addressing */
87 __u8 rx_ext_address; /* set address for extended addressing */
128 #define CAN_ISOTP_EXTEND_ADDR 0x0002 /* enable extended addressing */
136 #define CAN_ISOTP_RX_EXT_ADDR 0x0200 /* different rx extended addressing */
138 #define CAN_ISOTP_SF_BROADCAST 0x0800 /* 1-to-N functional addressing */
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| /openbmc/linux/arch/sh/mm/ |
| H A D | Kconfig | 66 # Physical addressing modes
77 bool "Support 32-bit physical addressing through PMB"
82 If you say Y here, physical addressing will be extended to
84 29-bit physical addressing will be used.
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| /openbmc/linux/drivers/scsi/sym53c8xx_2/ |
| H A D | sym53c8xx.h | 32 * DMA addressing mode.
34 * 0 : 32 bit addressing for all chips.
35 * 1 : 40 bit addressing when supported by chip.
36 * 2 : 64 bit addressing when supported by chip,
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| /openbmc/linux/drivers/mtd/spi-nor/ |
| H A D | xilinx.c | 133 * Default addressing mode). It can be changed to a more standard in xilinx_nor_setup()
136 * and the page size cannot be changed back to default addressing in xilinx_nor_setup()
139 * The current addressing mode can be read from the XRDSR register in xilinx_nor_setup()
150 /* Flash in Default addressing mode */ in xilinx_nor_setup()
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| /openbmc/qemu/tests/tcg/hexagon/ |
| H A D | load_align.c | 27 * There are 8 addressing modes and byte and half word variants, for a
50 * _io addressing mode (addr + offset)
85 * _ur addressing mode (index << offset + base)
120 * _ap addressing mode (addr = base)
159 * _rp addressing mode (addr ++ modifer-reg)
201 * _pbr addressing mode (addr ++ modifer-reg:brev)
240 * _pi addressing mode (addr ++ inc)
279 * _pci addressing mode (addr ++ inc:circ)
323 * _pcr addressing mode (addr ++ I:circ(modifier-reg))
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| H A D | load_unpack.c | 25 * For each addressing mode, there are 4 tests
30 * There are 8 addressing modes, for a total of 32 instructions to test
53 * _io addressing mode (addr + offset)
94 * _ur addressing mode (index << offset + base)
134 * _ap addressing mode (addr = base)
178 * _rp addressing mode (addr ++ modifer-reg)
225 * _pbr addressing mode (addr ++ modifer-reg:brev)
269 * _pi addressing mode (addr ++ inc)
313 * _pci addressing mode (addr ++ inc:circ)
362 * _pcr addressing mode (addr ++ I:circ(modifier-reg))
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| /openbmc/linux/drivers/media/dvb-frontends/drx39xyj/ |
| H A D | drx_dap_fasi.h | 37 * Fast access, because of short addressing format (16 instead of 32 bits addr)
64 * Comments about short/long addressing format:
98 #error At least one of short- or long-addressing format must be allowed.
135 * in combination with short and long addressing format. All text below
136 * assumes long addressing format. The table also includes information
137 * for short ADDRessing format.
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| /openbmc/linux/drivers/staging/fbtft/ |
| H A D | fb_ssd1305.c | 72 /* Set Memory Addressing Mode */ in init_display()
74 /* Vertical addressing mode */ in init_display()
124 /* Set Lower Column Start Address for Page Addressing Mode */ in set_addr_win()
126 /* Set Higher Column Start Address for Page Addressing Mode */ in set_addr_win()
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| H A D | fb_ssd1306.c | 73 /* Set Memory Addressing Mode */ in init_display()
75 /* Vertical addressing mode */ in init_display()
138 /* Set Lower Column Start Address for Page Addressing Mode */ in set_addr_win()
140 /* Set Higher Column Start Address for Page Addressing Mode */ in set_addr_win()
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| /openbmc/linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap4-cpu-thermal.dtsi | 16 * See 44xx files for single sensor addressing, omap5 and dra7 need
17 * also sensor ID for addressing.
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| /openbmc/linux/Documentation/networking/ |
| H A D | j1939.rst | 11 sophisticated addressing scheme and extends the maximum packet size above 8
32 addressing and transport methods used by J1939.
34 * **Addressing:** when a process on an ECU communicates via J1939, it should
42 * **Dynamic addressing:** Address Claiming in J1939 is time critical.
46 results in a consistent J1939 bus with proper addressing.
132 Addressing section in J1939 concepts
135 Both static and dynamic addressing methods can be used.
141 For dynamic addressing, so-called Address Claiming, extra support is foreseen
341 Dynamic Addressing
423 Static Addressing
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| /openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
| H A D | dma.h | 29 * support two DMA engines: 32 bits address or 64 bit addressing
34 /* 32 bits addressing */
43 /* 64 bits addressing */
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| /openbmc/linux/include/uapi/linux/ |
| H A D | serial.h | 115 * @addr_recv: Receive filter for RS485 addressing mode
117 * @addr_dest: Destination address for RS485 addressing mode
137 * * %SER_RS485_ADDRB - Enable RS485 addressing mode.
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