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/openbmc/qemu/tests/qtest/
H A Dtpm-tis-util.c36 DPRINTF("%s: %d: locty=%d l=%d access=0x%02x pending_request_flag=0x%x\n", \
37 __func__, __LINE__, locty, l, access, pending_request_flag)
48 uint8_t access; in tpm_tis_test_check_localities() local
55 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_localities()
56 g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS | in tpm_tis_test_check_localities()
78 uint8_t access; in tpm_tis_test_check_access_reg() local
82 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg()
83 g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS | in tpm_tis_test_check_access_reg()
89 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg()
90 g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS | in tpm_tis_test_check_access_reg()
[all …]
H A Dtpm-tis-i2c-test.c33 DPRINTF("%s: %d: locty=%d l=%d access=0x%02x pending_request_flag=0x%x\n", \
34 __func__, __LINE__, locty, l, access, pending_request_flag)
94 uint8_t access; in tpm_tis_i2c_test_basic() local
99 * active locality. Therefore, ensure access is released. in tpm_tis_i2c_test_basic()
103 access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS); in tpm_tis_i2c_test_basic()
104 g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS | in tpm_tis_i2c_test_basic()
150 /* release access */ in tpm_tis_i2c_test_basic()
163 uint8_t access; in tpm_tis_i2c_test_check_localities() local
169 access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); in tpm_tis_i2c_test_check_localities()
170 g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS | in tpm_tis_i2c_test_check_localities()
[all …]
/openbmc/qemu/gdb-xml/
H A Ds390-acr.xml10 <reg name="acr0" bitsize="32" type="uint32" group="access"/>
11 <reg name="acr1" bitsize="32" type="uint32" group="access"/>
12 <reg name="acr2" bitsize="32" type="uint32" group="access"/>
13 <reg name="acr3" bitsize="32" type="uint32" group="access"/>
14 <reg name="acr4" bitsize="32" type="uint32" group="access"/>
15 <reg name="acr5" bitsize="32" type="uint32" group="access"/>
16 <reg name="acr6" bitsize="32" type="uint32" group="access"/>
17 <reg name="acr7" bitsize="32" type="uint32" group="access"/>
18 <reg name="acr8" bitsize="32" type="uint32" group="access"/>
19 <reg name="acr9" bitsize="32" type="uint32" group="access"/>
[all …]
/openbmc/skeleton/libopenbmc_intf/
H A Dopenbmc_intf.xml3 <property name="poll_interval" type="i" access="read"/>
4 <property name="sysfs_path" type="s" access="read"/>
5 <property name="scale" type="i" access="read"/>
17 <property name="speed" type="i" access="readwrite"/>
18 <property name="cooling_zone" type="i" access="readwrite"/>
19 <property name="pwm_num" type="i" access="readwrite"/>
34 <property name="value" type="v" access="read"/>
35 <property name="units" type="s" access="read"/>
36 <property name="poll_interval" type="i" access="readwrite"/>
37 <property name="heatbeat" type="i" access="read"/>
[all …]
/openbmc/hiomapd/vpnor/
H A DREADME.md7 Enabling the feature virtualises both the host's access to the flash (the mbox
8 protocol), and the BMC's access to the flash (via some filesystem on top of the
28 1. The FFS ToC defines the set of valid access ranges in terms of partitions
31 4. Read access to valid ranges must be granted
32 5. Write access to valid ranges may be granted
33 6. Access ranges that are valid may map into a backing file associated with the
35 7. A read of a valid access range that maps into the backing file will render
37 8. A read of a valid access range that does not map into the backing file will
39 9. A read of an invalid access range will appear erased
40 10. A write to a valid access range that maps into the backing file will update
[all …]
/openbmc/u-boot/drivers/spi/
H A DKconfig12 the SPI uclass. Drivers provide methods to access the SPI
32 access the SPI NOR flash on platforms embedding this Altera
41 used to access the SPI NOR flash on boards using the Aspeed
55 used to access the SPI flash on AE3XX and AE250 platforms embedding
63 to access SPI NOR flash and other SPI peripherals. This driver
72 many AT91 (ARM) chips. This driver can be used to access
80 access the SPI NOR flash on platforms embedding this Broadcom
88 access the SPI NOR flash on platforms embedding these Broadcom
95 be used to access the SPI flash on platforms embedding this
102 used to access the SPI NOR flash on platforms embedding this
[all …]
/openbmc/u-boot/doc/
H A DREADME.unaligned-memory-access.txt8 when it comes to memory access. This document presents some details about
13 The definition of an unaligned access
20 access.
22 The above may seem a little vague, as memory access can happen in different
26 which will compile to multiple-byte memory access instructions, namely when
41 of memory access. However, we must consider ALL supported architectures;
46 Why unaligned access is bad
49 The effects of performing an unaligned memory access vary from architecture
56 happen. The exception handler is able to correct the unaligned access,
60 unaligned access to be corrected.
[all …]
/openbmc/phosphor-mboxd/vpnor/
H A DREADME.md8 Enabling the feature virtualises both the host's access to the flash (the mbox
9 protocol), and the BMC's access to the flash (via some filesystem on top of the
32 1. The FFS ToC defines the set of valid access ranges in terms of partitions
35 4. Read access to valid ranges must be granted
36 5. Write access to valid ranges may be granted
37 6. Access ranges that are valid may map into a backing file associated with
39 7. A read of a valid access range that maps into the backing file will render
41 8. A read of a valid access range that does not map into the backing file will
43 9. A read of an invalid access range will appear erased
44 10. A write to a valid access range that maps into the backing file will update
[all …]
/openbmc/phosphor-webui/app/access-control/
H A Dindex.js2 * A module for the access control
4 * @module app/access-control/index
5 * @exports app/access-control/index
13 // Route access-control
18 .when('/access-control', {
23 .when('/access-control/ldap', {
28 .when('/access-control/local-users', {
33 .when('/access-control/ssl-certificates', {
/openbmc/qemu/target/arm/tcg/
H A Dtlb-insns.c514 .opc1 = CP_ANY, .opc2 = 0, .access = PL1_W, .writefn = tlbiall_write,
517 .opc1 = CP_ANY, .opc2 = 1, .access = PL1_W, .writefn = tlbimva_write,
520 .opc1 = CP_ANY, .opc2 = 2, .access = PL1_W, .writefn = tlbiasid_write,
523 .opc1 = CP_ANY, .opc2 = 3, .access = PL1_W, .writefn = tlbimvaa_write,
530 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
533 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
536 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
540 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
543 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
546 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
[all …]
/openbmc/openbmc/meta-security/recipes-mac/smack/udp-smack-test/
H A Dtest_smack_udp_sockets.sh25 # make sure no access is granted
29 # checking access for sockets with different labels
44 # granting access between different labels
47 # checking access for sockets with different labels, but having a rule granting rw
58 echo "Sockets with different labels, but having rw access, should communicate on udp"
62 # checking access for sockets with the same label
77 # checking access on socket labeled star (*)
89 echo "Should have access on udp socket labeled star (*)"
93 # checking access from socket labeled star (*)
94 # all access from subject star should be denied
[all …]
/openbmc/openbmc/meta-security/recipes-mac/smack/tcp-smack-test/
H A Dtest_smack_tcp_sockets.sh5 # make sure no access is granted
28 # checking access for sockets with different labels
45 # granting access between different labels
48 # checking access for sockets with different labels, but having a rule granting rw
59 echo "Sockets with different labels, but having rw access, should communicate on tcp"
63 # checking access for sockets with the same label
78 # checking access on socket labeled star (*)
90 echo "Should have access on tcp socket labeled star (*)"
94 # checking access from socket labeled star (*)
95 # all access from subject star should be denied
[all …]
/openbmc/qemu/target/arm/
H A Dcortex-regs.c32 .access = PL1_RW, .readfn = l2ctlr_read,
36 .access = PL1_RW, .readfn = l2ctlr_read,
40 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
43 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
46 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
49 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
52 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
55 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
58 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
61 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
[all …]
/openbmc/u-boot/arch/arm/include/asm/mach-imx/
H A Dregs-common.h15 * The i.MXS has interesting feature when it comes to register access. There
16 * are four kinds of access to one particular register. Those are:
18 * 1) Common read/write access. To use this mode, just write to the address of
20 * 2) Set bits only access. To set bits, write which bits you want to set to the
22 * 3) Clear bits only access. To clear bits, write which bits you want to clear
24 * 4) Toggle bits only access. To toggle bits, write which bits you want to
28 * can be set/cleared by pure write as in access type 1, some need to be
29 * explicitly set/cleared by using access type 2-3.
31 * The following macros and structures allow the user to either access the
/openbmc/libcper/include/libcper/sections/
H A Dcper-section-dmar-generic.h17 "DMT Access Error", "DMT Reserved Bit Invalid", \
19 "Invalid Device Request", "ATT Access Error", \
21 "Command Buffer Access Error" \
27 "DMAr unit's attempt to access the domain mapping table resulted in an error.", \
29 "DMA request to access an address beyond the device address width.", \
30 "Invalid read or write access.", \
32 "DMAr unit's attempt to access the address translation table resulted in an error.", \
35 "DMAr unit's attempt to access the command buffer resulted in an error." \
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/pipewire/pipewire-media-session/
H A D0001-pass-right-types-to-methods.patch10 src/access-flatpak.c | 2 +-
11 src/access-portal.c | 2 +-
15 diff --git a/src/access-flatpak.c b/src/access-flatpak.c
17 --- a/src/access-flatpak.c
18 +++ b/src/access-flatpak.c
28 diff --git a/src/access-portal.c b/src/access-portal.c
30 --- a/src/access-portal.c
31 +++ b/src/access-portal.c
/openbmc/openbmc/meta-openembedded/meta-python/recipes-devtools/python/python3-flask-cors/
H A DCVE-2024-6221.patch23 …Access-Control-Request-Headers` request header (usually part of the preflight OPTIONS request) mat…
26 + If True, the response header :http:header:`Access-Control-Allow-Private-Network`
28 + :http:header:`Access-Control-Request-Private-Network` has a value 'true'.
30 + If False, the reponse header :http:header:`Access-Control-Allow-Private-Network`
32 + :http:header:`Access-Control-Request-Private-Network` has a value of 'true'.
34 + If the request header :http:header:`Access-Control-Request-Private-Network` is
36 + :http:header:`Access-Control-Allow-Private-Network` will not be set.
92 + If True, the response header `Access-Control-Allow-Private-Network`
94 + `Access-Control-Request-Private-Network` has a value 'true'.
96 + If False, the reponse header `Access-Control-Allow-Private-Network`
[all …]
/openbmc/openbmc-test-automation/ipmi/
H A Dtest_ipmi_disable.robot16 ... AND Run Inband IPMI Standard Command lan set ${CHANNEL_NUMBER} access on
19 Run Inband IPMI Standard Command lan set ${CHANNEL_NUMBER} access off
24 Run Inband IPMI Standard Command lan set ${CHANNEL_NUMBER} access on
36 ... AND Run Inband IPMI Standard Command lan set ${CHANNEL_NUMBER} access on
40 ... Run External IPMI Standard Command lan set ${CHANNEL_NUMBER} access off
41 …Should Contain any ${resp} ${EMPTY} Set Channel Access for channel ${CHANNEL_NUMBER} was succes…
46 Run Inband IPMI Standard Command lan set ${CHANNEL_NUMBER} access on
58 ... AND Run Inband IPMI Standard Command lan set ${CHANNEL_NUMBER} access on
61 Run Inband IPMI Standard Command lan set ${CHANNEL_NUMBER} access off
H A Dtest_ipmi_payload.robot92 Verify Set User Access Payload For Standard Payload SOL
95 [Teardown] Run Keywords Set User Access Payload For Given User ${user_id_in_hex}
103 # Get default user access payload values.
104 …${default_user_access_payload}= Get User Access Payload For Given Channel ${userid_in_hex_format}
106 # Disable Standard payload 1 via set user access payload command.
107 Set User Access Payload For Given User ${user_id_in_hex} Disable
112 Verify Set User Access Payload For Operator Privileged User
113 [Documentation] Try to set user access payload using operator privileged user and expect error.
126 Verify Set User Access Payload For Invalid User
127 [Documentation] Verify set user access payload IPMI command for invalid user.
[all …]
/openbmc/docs/designs/
H A Dexpired-password.md14 periods, effectively giving unrestricted access to the BMC.
22 Various BMC interfaces require authentication before access is granted. The
26 1. Success, when the access credentials (such as username and password) are
28 2. Failure, when either the access credentials are invalid or the account being
31 3. PasswordChangeRequired, when the access credentials are correct and the
50 The meaning of the term "access" varies by context. It could mean:
52 1. Access to the BMC's network interfaces.
53 2. Access to the BMC's authentication mechanisms together with correct
56 3. Access to the BMC's function via an authenticated interface, for example,
58 4. Access to the BMC's function via an unauthenticated interface such as host
[all …]
/openbmc/openbmc/meta-security/recipes-mac/smack/smack-test/
H A Dsmack_test_file_access.sh18 # Remove pre-existent rules for "TheOne TheOther <access>"
22 echo "Process with different label than the test file and no read access on it can read it"
26 # adding read access
30 echo "Process with different label than the test file but with read access on it cannot read it"
34 # Remove pre-existent rules for "TheOne TheOther <access>"
37 # according to SMACK documentation, read access on a * object is always permitted
46 # according to SMACK documentation, every access requested by a star labeled subject is rejected
51 echo "Process with label '*' should not have any access"
/openbmc/openbmc/meta-ibm/recipes-phosphor/images/
H A Dobmc-phosphor-image.bbappend20 # accounting purposes and for debugging service access.
22 # SystemAdministrator. Admin users have access to interfaces including:
23 # Redfish, REST APIs, Web. No access to the BMC via: the BMC's physical
25 # IPMI access is not granted by default, but admins can authorize
27 # The admin has access to the host console: ssh -p2200 admin@${bmc}.
30 # known as customer engineers or CEs) access to the BMC. The role is
31 # OemIBMServiceAgent. The service user has full admin access, plus access
33 # SSH access to the BMC's command line.
/openbmc/phosphor-host-ipmid/user_channel/
H A Dchannelcommands.cpp34 /** @brief implements the set channel access command
38 * @ param accessMode - access mode for IPMI messaging
42 * @ param chanAccess - channel access
57 lg2::debug("Set channel access - Invalid field in request"); in ipmiSetChannelAccess()
66 lg2::debug("Set channel access - No support on channel: {CHANNEL}", in ipmiSetChannelAccess()
103 lg2::debug("Set channel access - Invalid access set mode"); in ipmiSetChannelAccess()
124 lg2::debug("Set channel access - Invalid access priv mode"); in ipmiSetChannelAccess()
133 lg2::debug("Set channel access - Failed to set access data"); in ipmiSetChannelAccess()
143 lg2::debug("Set channel access - Failed to set access data"); in ipmiSetChannelAccess()
151 /** @brief implements the get channel access command
[all …]
/openbmc/u-boot/arch/arm/mach-rockchip/rk3288/
H A DKconfig9 WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to
20 keyboard and mouse access.
29 EC (Cortex-M3) to provide access to the keyboard and battery
40 EC (Cortex-M3) to provide access to the keyboard and battery
51 provide access to display pins, I2C, SPI, UART and GPIOs.
60 provide access to display pins, I2C, SPI, UART and GPIOs.
69 provide access to display pins, I2C, SPI, UART and GPIOs.
77 has 1 or 2 GiB SDRAM. Expansion connectors provide access to
95 2GB DDR3. Expansion connectors provide access to I2C, SPI, UART,
121 provide access to display pins, I2C, SPI, UART and GPIOs.
[all …]
/openbmc/qemu/docs/specs/
H A Dacpi_pci_hotplug.rst7 ACPI GPE block (IO ports 0xafe0-0xafe3, byte access)
13 PCI slot injection notification pending (IO port 0xae00-0xae03, 4-byte access)
21 PCI slot removal notification (IO port 0xae04-0xae07, 4-byte access)
29 PCI device eject (IO port 0xae08-0xae0b, 4-byte access)
38 - Read-only "up" register @0xae00, 4-byte access, bit per slot
39 - Read-only "down" register @0xae04, 4-byte access, bit per slot
40 - Read/write "eject" register @0xae08, 4-byte access,
42 - Read-only hotplug capable register @0xae0c, 4-byte access, bit per slot
44 PCI removability status (IO port 0xae0c-0xae0f, 4-byte access)

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